arch/s390/include/asm/lowcore.h

   1 /*
   2  *    Copyright IBM Corp. 1999, 2012
   3  *    Author(s): Hartmut Penner <hp@de.ibm.com>,
   4  *               Martin Schwidefsky <schwidefsky@de.ibm.com>,
   5  *               Denis Joseph Barrow,
   6  */
   7
   8 #ifndef _ASM_S390_LOWCORE_H
   9 #define _ASM_S390_LOWCORE_H
  10
  11 #include <linux/types.h>
  12 #include <asm/ptrace.h>
  13 #include <asm/cpu.h>
  14
  15 #ifdef CONFIG_32BIT
  16
  17 #define LC_ORDER 0
  18 #define LC_PAGES 1
  19
  20 struct save_area {
  21         u32     ext_save;
  22         u64     timer;
  23         u64     clk_cmp;
  24         u8      pad1[24];
  25         u8      psw[8];
  26         u32     pref_reg;
  27         u8      pad2[20];
  28         u32     acc_regs[16];
  29         u64     fp_regs[4];
  30         u32     gp_regs[16];
  31         u32     ctrl_regs[16];
  32 } __packed;
  33
  34 struct _lowcore {
  35         psw_t   restart_psw;                    /* 0x0000 */
  36         psw_t   restart_old_psw;                /* 0x0008 */
  37         __u8    pad_0x0010[0x0014-0x0010];      /* 0x0010 */
  38         __u32   ipl_parmblock_ptr;              /* 0x0014 */
  39         psw_t   external_old_psw;               /* 0x0018 */
  40         psw_t   svc_old_psw;                    /* 0x0020 */
  41         psw_t   program_old_psw;                /* 0x0028 */
  42         psw_t   mcck_old_psw;                   /* 0x0030 */
  43         psw_t   io_old_psw;                     /* 0x0038 */
  44         __u8    pad_0x0040[0x0058-0x0040];      /* 0x0040 */
  45         psw_t   external_new_psw;               /* 0x0058 */
  46         psw_t   svc_new_psw;                    /* 0x0060 */
  47         psw_t   program_new_psw;                /* 0x0068 */
  48         psw_t   mcck_new_psw;                   /* 0x0070 */
  49         psw_t   io_new_psw;                     /* 0x0078 */
  50         __u32   ext_params;                     /* 0x0080 */
  51         __u16   ext_cpu_addr;                   /* 0x0084 */
  52         __u16   ext_int_code;                   /* 0x0086 */
  53         __u16   svc_ilc;                        /* 0x0088 */
  54         __u16   svc_code;                       /* 0x008a */
  55         __u16   pgm_ilc;                        /* 0x008c */
  56         __u16   pgm_code;                       /* 0x008e */
  57         __u32   trans_exc_code;                 /* 0x0090 */
  58         __u16   mon_class_num;                  /* 0x0094 */
  59         __u16   per_perc_atmid;                 /* 0x0096 */
  60         __u32   per_address;                    /* 0x0098 */
  61         __u32   monitor_code;                   /* 0x009c */
  62         __u8    exc_access_id;                  /* 0x00a0 */
  63         __u8    per_access_id;                  /* 0x00a1 */
  64         __u8    op_access_id;                   /* 0x00a2 */
  65         __u8    ar_access_id;                   /* 0x00a3 */
  66         __u8    pad_0x00a4[0x00b8-0x00a4];      /* 0x00a4 */
  67         __u16   subchannel_id;                  /* 0x00b8 */
  68         __u16   subchannel_nr;                  /* 0x00ba */
  69         __u32   io_int_parm;                    /* 0x00bc */
  70         __u32   io_int_word;                    /* 0x00c0 */
  71         __u8    pad_0x00c4[0x00c8-0x00c4];      /* 0x00c4 */
  72         __u32   stfl_fac_list;                  /* 0x00c8 */
  73         __u8    pad_0x00cc[0x00d4-0x00cc];      /* 0x00cc */
  74         __u32   extended_save_area_addr;        /* 0x00d4 */
  75         __u32   cpu_timer_save_area[2];         /* 0x00d8 */
  76         __u32   clock_comp_save_area[2];        /* 0x00e0 */
  77         __u32   mcck_interruption_code[2];      /* 0x00e8 */
  78         __u8    pad_0x00f0[0x00f4-0x00f0];      /* 0x00f0 */
  79         __u32   external_damage_code;           /* 0x00f4 */
  80         __u32   failing_storage_address;        /* 0x00f8 */
  81         __u8    pad_0x00fc[0x0100-0x00fc];      /* 0x00fc */
  82         psw_t   psw_save_area;                  /* 0x0100 */
  83         __u32   prefixreg_save_area;            /* 0x0108 */
  84         __u8    pad_0x010c[0x0120-0x010c];      /* 0x010c */
  85
  86         /* CPU register save area: defined by architecture */
  87         __u32   access_regs_save_area[16];      /* 0x0120 */
  88         __u32   floating_pt_save_area[8];       /* 0x0160 */
  89         __u32   gpregs_save_area[16];           /* 0x0180 */
  90         __u32   cregs_save_area[16];            /* 0x01c0 */
  91
  92         /* Save areas. */
  93         __u32   save_area_sync[8];              /* 0x0200 */
  94         __u32   save_area_async[8];             /* 0x0220 */
  95         __u32   save_area_restart[1];           /* 0x0240 */
  96         __u8    pad_0x0244[0x0248-0x0244];      /* 0x0244 */
  97
  98         /* Return psws. */
  99         psw_t   return_psw;                     /* 0x0248 */
 100         psw_t   return_mcck_psw;                /* 0x0250 */
 101
 102         /* CPU time accounting values */
 103         __u64   sync_enter_timer;               /* 0x0258 */
 104         __u64   async_enter_timer;              /* 0x0260 */
 105         __u64   mcck_enter_timer;               /* 0x0268 */
 106         __u64   exit_timer;                     /* 0x0270 */
 107         __u64   user_timer;                     /* 0x0278 */
 108         __u64   system_timer;                   /* 0x0280 */
 109         __u64   steal_timer;                    /* 0x0288 */
 110         __u64   last_update_timer;              /* 0x0290 */
 111         __u64   last_update_clock;              /* 0x0298 */
 112         __u64   int_clock;                      /* 0x02a0 */
 113         __u64   mcck_clock;                     /* 0x02a8 */
 114         __u64   clock_comparator;               /* 0x02b0 */
 115
 116         /* Current process. */
 117         __u32   current_task;                   /* 0x02b8 */
 118         __u32   thread_info;                    /* 0x02bc */
 119         __u32   kernel_stack;                   /* 0x02c0 */
 120
 121         /* Interrupt, panic and restart stack. */
 122         __u32   async_stack;                    /* 0x02c4 */
 123         __u32   panic_stack;                    /* 0x02c8 */
 124         __u32   restart_stack;                  /* 0x02cc */
 125
 126         /* Restart function and parameter. */
 127         __u32   restart_fn;                     /* 0x02d0 */
 128         __u32   restart_data;                   /* 0x02d4 */
 129         __u32   restart_source;                 /* 0x02d8 */
 130
 131         /* Address space pointer. */
 132         __u32   kernel_asce;                    /* 0x02dc */
 133         __u32   user_asce;                      /* 0x02e0 */
 134         __u32   current_pid;                    /* 0x02e4 */
 135
 136         /* SMP info area */
 137         __u32   cpu_nr;                         /* 0x02e8 */
 138         __u32   softirq_pending;                /* 0x02ec */
 139         __u32   percpu_offset;                  /* 0x02f0 */
 140         __u32   machine_flags;                  /* 0x02f4 */
 141         __u32   ftrace_func;                    /* 0x02f8 */
 142         __u8    pad_0x02fc[0x0300-0x02fc];      /* 0x02fc */
 143
 144         /* Interrupt response block */
 145         __u8    irb[64];                        /* 0x0300 */
 146
 147         __u8    pad_0x0340[0x0e00-0x0340];      /* 0x0340 */
 148
 149         /*
 150          * 0xe00 contains the address of the IPL Parameter Information
 151          * block. Dump tools need IPIB for IPL after dump.
 152          * Note: do not change the position of any fields in 0x0e00-0x0f00
 153          */
 154         __u32   ipib;                           /* 0x0e00 */
 155         __u32   ipib_checksum;                  /* 0x0e04 */
 156         __u32   vmcore_info;                    /* 0x0e08 */
 157         __u8    pad_0x0e0c[0x0e18-0x0e0c];      /* 0x0e0c */
 158         __u32   os_info;                        /* 0x0e18 */
 159         __u8    pad_0x0e1c[0x0f00-0x0e1c];      /* 0x0e1c */
 160
 161         /* Extended facility list */
 162         __u64   stfle_fac_list[32];             /* 0x0f00 */
 163 } __packed;
 164
 165 #else /* CONFIG_32BIT */
 166
 167 #define LC_ORDER 1
 168 #define LC_PAGES 2
 169
 170 struct save_area {
 171         u64     fp_regs[16];
 172         u64     gp_regs[16];
 173         u8      psw[16];
 174         u8      pad1[8];
 175         u32     pref_reg;
 176         u32     fp_ctrl_reg;
 177         u8      pad2[4];
 178         u32     tod_reg;
 179         u64     timer;
 180         u64     clk_cmp;
 181         u8      pad3[8];
 182         u32     acc_regs[16];
 183         u64     ctrl_regs[16];
 184 } __packed;
 185
 186 struct _lowcore {
 187         __u8    pad_0x0000[0x0014-0x0000];      /* 0x0000 */
 188         __u32   ipl_parmblock_ptr;              /* 0x0014 */
 189         __u8    pad_0x0018[0x0080-0x0018];      /* 0x0018 */
 190         __u32   ext_params;                     /* 0x0080 */
 191         __u16   ext_cpu_addr;                   /* 0x0084 */
 192         __u16   ext_int_code;                   /* 0x0086 */
 193         __u16   svc_ilc;                        /* 0x0088 */
 194         __u16   svc_code;                       /* 0x008a */
 195         __u16   pgm_ilc;                        /* 0x008c */
 196         __u16   pgm_code;                       /* 0x008e */
 197         __u32   data_exc_code;                  /* 0x0090 */
 198         __u16   mon_class_num;                  /* 0x0094 */
 199         __u16   per_perc_atmid;                 /* 0x0096 */
 200         __u64   per_address;                    /* 0x0098 */
 201         __u8    exc_access_id;                  /* 0x00a0 */
 202         __u8    per_access_id;                  /* 0x00a1 */
 203         __u8    op_access_id;                   /* 0x00a2 */
 204         __u8    ar_access_id;                   /* 0x00a3 */
 205         __u8    pad_0x00a4[0x00a8-0x00a4];      /* 0x00a4 */
 206         __u64   trans_exc_code;                 /* 0x00a8 */
 207         __u64   monitor_code;                   /* 0x00b0 */
 208         __u16   subchannel_id;                  /* 0x00b8 */
 209         __u16   subchannel_nr;                  /* 0x00ba */
 210         __u32   io_int_parm;                    /* 0x00bc */
 211         __u32   io_int_word;                    /* 0x00c0 */
 212         __u8    pad_0x00c4[0x00c8-0x00c4];      /* 0x00c4 */
 213         __u32   stfl_fac_list;                  /* 0x00c8 */
 214         __u8    pad_0x00cc[0x00e8-0x00cc];      /* 0x00cc */
 215         __u32   mcck_interruption_code[2];      /* 0x00e8 */
 216         __u8    pad_0x00f0[0x00f4-0x00f0];      /* 0x00f0 */
 217         __u32   external_damage_code;           /* 0x00f4 */
 218         __u64   failing_storage_address;        /* 0x00f8 */
 219         __u8    pad_0x0100[0x0110-0x0100];      /* 0x0100 */
 220         __u64   breaking_event_addr;            /* 0x0110 */
 221         __u8    pad_0x0118[0x0120-0x0118];      /* 0x0118 */
 222         psw_t   restart_old_psw;                /* 0x0120 */
 223         psw_t   external_old_psw;               /* 0x0130 */
 224         psw_t   svc_old_psw;                    /* 0x0140 */
 225         psw_t   program_old_psw;                /* 0x0150 */
 226         psw_t   mcck_old_psw;                   /* 0x0160 */
 227         psw_t   io_old_psw;                     /* 0x0170 */
 228         __u8    pad_0x0180[0x01a0-0x0180];      /* 0x0180 */
 229         psw_t   restart_psw;                    /* 0x01a0 */
 230         psw_t   external_new_psw;               /* 0x01b0 */
 231         psw_t   svc_new_psw;                    /* 0x01c0 */
 232         psw_t   program_new_psw;                /* 0x01d0 */
 233         psw_t   mcck_new_psw;                   /* 0x01e0 */
 234         psw_t   io_new_psw;                     /* 0x01f0 */
 235
 236         /* Save areas. */
 237         __u64   save_area_sync[8];              /* 0x0200 */
 238         __u64   save_area_async[8];             /* 0x0240 */
 239         __u64   save_area_restart[1];           /* 0x0280 */
 240         __u8    pad_0x0288[0x0290-0x0288];      /* 0x0288 */
 241
 242         /* Return psws. */
 243         psw_t   return_psw;                     /* 0x0290 */
 244         psw_t   return_mcck_psw;                /* 0x02a0 */
 245
 246         /* CPU accounting and timing values. */
 247         __u64   sync_enter_timer;               /* 0x02b0 */
 248         __u64   async_enter_timer;              /* 0x02b8 */
 249         __u64   mcck_enter_timer;               /* 0x02c0 */
 250         __u64   exit_timer;                     /* 0x02c8 */
 251         __u64   user_timer;                     /* 0x02d0 */
 252         __u64   system_timer;                   /* 0x02d8 */
 253         __u64   steal_timer;                    /* 0x02e0 */
 254         __u64   last_update_timer;              /* 0x02e8 */
 255         __u64   last_update_clock;              /* 0x02f0 */
 256         __u64   int_clock;                      /* 0x02f8 */
 257         __u64   mcck_clock;                     /* 0x0300 */
 258         __u64   clock_comparator;               /* 0x0308 */
 259
 260         /* Current process. */
 261         __u64   current_task;                   /* 0x0310 */
 262         __u64   thread_info;                    /* 0x0318 */
 263         __u64   kernel_stack;                   /* 0x0320 */
 264
 265         /* Interrupt, panic and restart stack. */
 266         __u64   async_stack;                    /* 0x0328 */
 267         __u64   panic_stack;                    /* 0x0330 */
 268         __u64   restart_stack;                  /* 0x0338 */
 269
 270         /* Restart function and parameter. */
 271         __u64   restart_fn;                     /* 0x0340 */
 272         __u64   restart_data;                   /* 0x0348 */
 273         __u64   restart_source;                 /* 0x0350 */
 274
 275         /* Address space pointer. */
 276         __u64   kernel_asce;                    /* 0x0358 */
 277         __u64   user_asce;                      /* 0x0360 */
 278         __u64   current_pid;                    /* 0x0368 */
 279
 280         /* SMP info area */
 281         __u32   cpu_nr;                         /* 0x0370 */
 282         __u32   softirq_pending;                /* 0x0374 */
 283         __u64   percpu_offset;                  /* 0x0378 */
 284         __u64   vdso_per_cpu_data;              /* 0x0380 */
 285         __u64   machine_flags;                  /* 0x0388 */
 286         __u64   ftrace_func;                    /* 0x0390 */
 287         __u64   gmap;                           /* 0x0398 */
 288         __u8    pad_0x03a0[0x0400-0x03a0];      /* 0x03a0 */
 289
 290         /* Interrupt response block. */
 291         __u8    irb[64];                        /* 0x0400 */
 292
 293         /* Per cpu primary space access list */
 294         __u32   paste[16];                      /* 0x0440 */
 295
 296         __u8    pad_0x0480[0x0e00-0x0480];      /* 0x0480 */
 297
 298         /*
 299          * 0xe00 contains the address of the IPL Parameter Information
 300          * block. Dump tools need IPIB for IPL after dump.
 301          * Note: do not change the position of any fields in 0x0e00-0x0f00
 302          */
 303         __u64   ipib;                           /* 0x0e00 */
 304         __u32   ipib_checksum;                  /* 0x0e08 */
 305         __u64   vmcore_info;                    /* 0x0e0c */
 306         __u8    pad_0x0e14[0x0e18-0x0e14];      /* 0x0e14 */
 307         __u64   os_info;                        /* 0x0e18 */
 308         __u8    pad_0x0e20[0x0f00-0x0e20];      /* 0x0e20 */
 309
 310         /* Extended facility list */
 311         __u64   stfle_fac_list[32];             /* 0x0f00 */
 312         __u8    pad_0x1000[0x11b8-0x1000];      /* 0x1000 */
 313
 314         /* 64 bit extparam used for pfault/diag 250: defined by architecture */
 315         __u64   ext_params2;                    /* 0x11B8 */
 316         __u8    pad_0x11c0[0x1200-0x11C0];      /* 0x11C0 */
 317
 318         /* CPU register save area: defined by architecture */
 319         __u64   floating_pt_save_area[16];      /* 0x1200 */
 320         __u64   gpregs_save_area[16];           /* 0x1280 */
 321         psw_t   psw_save_area;                  /* 0x1300 */
 322         __u8    pad_0x1310[0x1318-0x1310];      /* 0x1310 */
 323         __u32   prefixreg_save_area;            /* 0x1318 */
 324         __u32   fpt_creg_save_area;             /* 0x131c */
 325         __u8    pad_0x1320[0x1324-0x1320];      /* 0x1320 */
 326         __u32   tod_progreg_save_area;          /* 0x1324 */
 327         __u32   cpu_timer_save_area[2];         /* 0x1328 */
 328         __u32   clock_comp_save_area[2];        /* 0x1330 */
 329         __u8    pad_0x1338[0x1340-0x1338];      /* 0x1338 */
 330         __u32   access_regs_save_area[16];      /* 0x1340 */
 331         __u64   cregs_save_area[16];            /* 0x1380 */
 332         __u8    pad_0x1400[0x1800-0x1400];      /* 0x1400 */
 333
 334         /* Transaction abort diagnostic block */
 335         __u8    pgm_tdb[256];                   /* 0x1800 */
 336
 337         /* align to the top of the prefix area */
 338         __u8    pad_0x1900[0x2000-0x1900];      /* 0x1900 */
 339 } __packed;
 340
 341 #endif /* CONFIG_32BIT */
 342
 343 #define S390_lowcore (*((struct _lowcore *) 0))
 344
 345 extern struct _lowcore *lowcore_ptr[];
 346
 347 static inline void set_prefix(__u32 address)
 348 {
 349         asm volatile("spx %0" : : "m" (address) : "memory");
 350 }
 351
 352 static inline __u32 store_prefix(void)
 353 {
 354         __u32 address;
 355
 356         asm volatile("stpx %0" : "=m" (address));
 357         return address;
 358 }
 359
 360 #endif /* _ASM_S390_LOWCORE_H */