arch/ppc/platforms/prpmc800.c

   1 /*
   2  * arch/ppc/platforms/prpmc800.c
   3  *
   4  * Author: Dale Farnsworth <dale.farnsworth@mvista.com>
   5  *
   6  * 2001-2004 (c) MontaVista, Software, Inc.  This file is licensed under
   7  * the terms of the GNU General Public License version 2.  This program
   8  * is licensed "as is" without any warranty of any kind, whether express
   9  * or implied.
  10  */
  11
  12 #include <linux/config.h>
  13 #include <linux/stddef.h>
  14 #include <linux/kernel.h>
  15 #include <linux/init.h>
  16 #include <linux/errno.h>
  17 #include <linux/reboot.h>
  18 #include <linux/pci.h>
  19 #include <linux/kdev_t.h>
  20 #include <linux/types.h>
  21 #include <linux/major.h>
  22 #include <linux/initrd.h>
  23 #include <linux/console.h>
  24 #include <linux/delay.h>
  25 #include <linux/seq_file.h>
  26 #include <linux/ide.h>
  27 #include <linux/root_dev.h>
  28 #include <linux/harrier_defs.h>
  29
  30 #include <asm/byteorder.h>
  31 #include <asm/system.h>
  32 #include <asm/pgtable.h>
  33 #include <asm/page.h>
  34 #include <asm/dma.h>
  35 #include <asm/io.h>
  36 #include <asm/irq.h>
  37 #include <asm/machdep.h>
  38 #include <asm/time.h>
  39 #include <asm/pci-bridge.h>
  40 #include <asm/open_pic.h>
  41 #include <asm/bootinfo.h>
  42 #include <asm/harrier.h>
  43
  44 #include "prpmc800.h"
  45
  46 #define HARRIER_REVI_REG        (PRPMC800_HARRIER_XCSR_BASE+HARRIER_REVI_OFF)
  47 #define HARRIER_UCTL_REG        (PRPMC800_HARRIER_XCSR_BASE+HARRIER_UCTL_OFF)
  48 #define HARRIER_MISC_CSR_REG   (PRPMC800_HARRIER_XCSR_BASE+HARRIER_MISC_CSR_OFF)
  49 #define HARRIER_IFEVP_REG    (PRPMC800_HARRIER_MPIC_BASE+HARRIER_MPIC_IFEVP_OFF)
  50 #define HARRIER_IFEDE_REG    (PRPMC800_HARRIER_MPIC_BASE+HARRIER_MPIC_IFEDE_OFF)
  51 #define HARRIER_FEEN_REG        (PRPMC800_HARRIER_XCSR_BASE+HARRIER_FEEN_OFF)
  52 #define HARRIER_FEMA_REG        (PRPMC800_HARRIER_XCSR_BASE+HARRIER_FEMA_OFF)
  53
  54 #define HARRIER_VENI_REG        (PRPMC800_HARRIER_XCSR_BASE + HARRIER_VENI_OFF)
  55 #define HARRIER_MISC_CSR        (PRPMC800_HARRIER_XCSR_BASE + \
  56                                  HARRIER_MISC_CSR_OFF)
  57
  58 #define MONARCH (monarch != 0)
  59 #define NON_MONARCH (monarch == 0)
  60
  61 extern int mpic_init(void);
  62 extern unsigned long loops_per_jiffy;
  63 extern void gen550_progress(char *, unsigned short);
  64
  65 static int monarch = 0;
  66 static int found_self = 0;
  67 static int self = 0;
  68
  69 static u_char prpmc800_openpic_initsenses[] __initdata =
  70 {
  71    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_HOSTINT0 */
  72    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_UNUSED */
  73    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_DEBUGINT */
  74    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_HARRIER_WDT */
  75    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_UNUSED */
  76    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_UNUSED */
  77    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_HOSTINT1 */
  78    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_HOSTINT2 */
  79    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_HOSTINT3 */
  80    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_PMC_INTA */
  81    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_PMC_INTB */
  82    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_PMC_INTC */
  83    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_PMC_INTD */
  84    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_UNUSED */
  85    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_UNUSED */
  86    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_UNUSED */
  87    (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),   /* PRPMC800_INT_HARRIER_INT (UARTS, ABORT, DMA) */
  88 };
  89
  90 /*
  91  * Motorola PrPMC750/PrPMC800 in PrPMCBASE or PrPMC-Carrier
  92  * Combined irq tables.  Only Base has IDSEL 14, only Carrier has 21 and 22.
  93  */
  94 static inline int
  95 prpmc_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
  96 {
  97         static char pci_irq_table[][4] =
  98         /*
  99          *      PCI IDSEL/INTPIN->INTLINE
 100          *      A       B       C       D
 101          */
 102         {
 103                 {12,    0,      0,      0},  /* IDSEL 14 - Ethernet, base */
 104                 {0,     0,      0,      0},  /* IDSEL 15 - unused */
 105                 {10,    11,     12,     9},  /* IDSEL 16 - PMC A1, PMC1 */
 106                 {10,    11,     12,     9},  /* IDSEL 17 - PrPMC-A-B, PMC2-B */
 107                 {11,    12,     9,      10}, /* IDSEL 18 - PMC A1-B, PMC1-B */
 108                 {0,     0,      0,      0},  /* IDSEL 19 - unused */
 109                 {9,     10,     11,     12}, /* IDSEL 20 - P2P Bridge */
 110                 {11,    12,     9,      10}, /* IDSEL 21 - PMC A2, carrier */
 111                 {12,    9,      10,     11}, /* IDSEL 22 - PMC A2-B, carrier */
 112         };
 113         const long min_idsel = 14, max_idsel = 22, irqs_per_slot = 4;
 114         return PCI_IRQ_TABLE_LOOKUP;
 115 };
 116
 117 static int
 118 prpmc_read_config_dword(struct pci_controller *hose, u8 bus, u8 devfn,
 119                         int offset, u32 * val)
 120 {
 121         /* paranoia */
 122         if ((hose == NULL) ||
 123             (hose->cfg_addr == NULL) || (hose->cfg_data == NULL))
 124                 return PCIBIOS_DEVICE_NOT_FOUND;
 125
 126         out_be32(hose->cfg_addr, ((offset & 0xfc) << 24) | (devfn << 16)
 127                  | ((bus - hose->bus_offset) << 8) | 0x80);
 128         *val = in_le32((u32 *) (hose->cfg_data + (offset & 3)));
 129
 130         return PCIBIOS_SUCCESSFUL;
 131 }
 132
 133 #define HARRIER_PCI_VEND_DEV_ID (PCI_VENDOR_ID_MOTOROLA | \
 134                                  (PCI_DEVICE_ID_MOTOROLA_HARRIER << 16))
 135 static int prpmc_self(u8 bus, u8 devfn)
 136 {
 137         /*
 138          * Harriers always view themselves as being on bus 0. If we're not
 139          * looking at bus 0, we're not going to find ourselves.
 140          */
 141         if (bus != 0)
 142                 return PCIBIOS_DEVICE_NOT_FOUND;
 143         else {
 144                 int result;
 145                 int val;
 146                 struct pci_controller *hose;
 147
 148                 hose = pci_bus_to_hose(bus);
 149
 150                 /* See if target device is a Harrier */
 151                 result = prpmc_read_config_dword(hose, bus, devfn,
 152                                                  PCI_VENDOR_ID, &val);
 153                 if ((result != PCIBIOS_SUCCESSFUL) ||
 154                     (val != HARRIER_PCI_VEND_DEV_ID))
 155                         return PCIBIOS_DEVICE_NOT_FOUND;
 156
 157                 /*
 158                  * LBA bit is set if target Harrier == initiating Harrier
 159                  * (i.e. if we are reading our own PCI header).
 160                  */
 161                 result = prpmc_read_config_dword(hose, bus, devfn,
 162                                                  HARRIER_LBA_OFF, &val);
 163                 if ((result != PCIBIOS_SUCCESSFUL) ||
 164                     ((val & HARRIER_LBA_MSK) != HARRIER_LBA_MSK))
 165                         return PCIBIOS_DEVICE_NOT_FOUND;
 166
 167                 /* It's us, save our location for later */
 168                 self = devfn;
 169                 found_self = 1;
 170                 return PCIBIOS_SUCCESSFUL;
 171         }
 172 }
 173
 174 static int prpmc_exclude_device(u8 bus, u8 devfn)
 175 {
 176         /*
 177          * Monarch is allowed to access all PCI devices. Non-monarch is
 178          * only allowed to access its own Harrier.
 179          */
 180
 181         if (MONARCH)
 182                 return PCIBIOS_SUCCESSFUL;
 183         if (found_self)
 184                 if ((bus == 0) && (devfn == self))
 185                         return PCIBIOS_SUCCESSFUL;
 186                 else
 187                         return PCIBIOS_DEVICE_NOT_FOUND;
 188         else
 189                 return prpmc_self(bus, devfn);
 190 }
 191
 192 void __init prpmc800_find_bridges(void)
 193 {
 194         struct pci_controller *hose;
 195         int host_bridge;
 196
 197         hose = pcibios_alloc_controller();
 198         if (!hose)
 199                 return;
 200
 201         hose->first_busno = 0;
 202         hose->last_busno = 0xff;
 203
 204         ppc_md.pci_exclude_device = prpmc_exclude_device;
 205         ppc_md.pcibios_fixup = NULL;
 206         ppc_md.pcibios_fixup_bus = NULL;
 207         ppc_md.pci_swizzle = common_swizzle;
 208         ppc_md.pci_map_irq = prpmc_map_irq;
 209
 210         setup_indirect_pci(hose,
 211                            PRPMC800_PCI_CONFIG_ADDR, PRPMC800_PCI_CONFIG_DATA);
 212
 213         /* Get host bridge vendor/dev id */
 214
 215         host_bridge = in_be32((uint *) (HARRIER_VENI_REG));
 216
 217         if (host_bridge != HARRIER_VEND_DEV_ID) {
 218                 printk(KERN_CRIT "Host bridge 0x%x not supported\n",
 219                                 host_bridge);
 220                 return;
 221         }
 222
 223         monarch = in_be32((uint *) HARRIER_MISC_CSR) & HARRIER_SYSCON;
 224
 225         printk(KERN_INFO "Running as %s.\n",
 226                         MONARCH ? "Monarch" : "Non-Monarch");
 227
 228         hose->io_space.start = PRPMC800_PCI_IO_START;
 229         hose->io_space.end = PRPMC800_PCI_IO_END;
 230         hose->io_base_virt = (void *)PRPMC800_ISA_IO_BASE;
 231         hose->pci_mem_offset = PRPMC800_PCI_PHY_MEM_OFFSET;
 232
 233         pci_init_resource(&hose->io_resource,
 234                           PRPMC800_PCI_IO_START, PRPMC800_PCI_IO_END,
 235                           IORESOURCE_IO, "PCI host bridge");
 236
 237         if (MONARCH) {
 238                 hose->mem_space.start = PRPMC800_PCI_MEM_START;
 239                 hose->mem_space.end = PRPMC800_PCI_MEM_END;
 240
 241                 pci_init_resource(&hose->mem_resources[0],
 242                                   PRPMC800_PCI_MEM_START,
 243                                   PRPMC800_PCI_MEM_END,
 244                                   IORESOURCE_MEM, "PCI host bridge");
 245
 246                 if (harrier_init(hose,
 247                                  PRPMC800_HARRIER_XCSR_BASE,
 248                                  PRPMC800_PROC_PCI_MEM_START,
 249                                  PRPMC800_PROC_PCI_MEM_END,
 250                                  PRPMC800_PROC_PCI_IO_START,
 251                                  PRPMC800_PROC_PCI_IO_END,
 252                                  PRPMC800_HARRIER_MPIC_BASE) != 0)
 253                         printk(KERN_CRIT "Could not initialize HARRIER "
 254                                          "bridge\n");
 255
 256                 harrier_release_eready(PRPMC800_HARRIER_XCSR_BASE);
 257                 harrier_wait_eready(PRPMC800_HARRIER_XCSR_BASE);
 258                 hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
 259
 260         } else {
 261                 pci_init_resource(&hose->mem_resources[0],
 262                                   PRPMC800_NM_PCI_MEM_START,
 263                                   PRPMC800_NM_PCI_MEM_END,
 264                                   IORESOURCE_MEM, "PCI host bridge");
 265
 266                 hose->mem_space.start = PRPMC800_NM_PCI_MEM_START;
 267                 hose->mem_space.end = PRPMC800_NM_PCI_MEM_END;
 268
 269                 if (harrier_init(hose,
 270                                  PRPMC800_HARRIER_XCSR_BASE,
 271                                  PRPMC800_NM_PROC_PCI_MEM_START,
 272                                  PRPMC800_NM_PROC_PCI_MEM_END,
 273                                  PRPMC800_PROC_PCI_IO_START,
 274                                  PRPMC800_PROC_PCI_IO_END,
 275                                  PRPMC800_HARRIER_MPIC_BASE) != 0)
 276                         printk(KERN_CRIT "Could not initialize HARRIER "
 277                                          "bridge\n");
 278
 279                 harrier_setup_nonmonarch(PRPMC800_HARRIER_XCSR_BASE,
 280                                          HARRIER_ITSZ_1MB);
 281                 harrier_release_eready(PRPMC800_HARRIER_XCSR_BASE);
 282         }
 283 }
 284
 285 static int prpmc800_show_cpuinfo(struct seq_file *m)
 286 {
 287         seq_printf(m, "machine\t\t: PrPMC800\n");
 288
 289         return 0;
 290 }
 291
 292 static void __init prpmc800_setup_arch(void)
 293 {
 294         /* init to some ~sane value until calibrate_delay() runs */
 295         loops_per_jiffy = 50000000 / HZ;
 296
 297         /* Lookup PCI host bridges */
 298         prpmc800_find_bridges();
 299
 300 #ifdef CONFIG_BLK_DEV_INITRD
 301         if (initrd_start)
 302                 ROOT_DEV = Root_RAM0;
 303         else
 304 #endif
 305 #ifdef CONFIG_ROOT_NFS
 306                 ROOT_DEV = Root_NFS;
 307 #else
 308                 ROOT_DEV = Root_SDA2;
 309 #endif
 310
 311         printk(KERN_INFO "Port by MontaVista Software, Inc. "
 312                          "(source@mvista.com)\n");
 313 }
 314
 315 /*
 316  * Compute the PrPMC800's tbl frequency using the baud clock as a reference.
 317  */
 318 static void __init prpmc800_calibrate_decr(void)
 319 {
 320         unsigned long tbl_start, tbl_end;
 321         unsigned long current_state, old_state, tb_ticks_per_second;
 322         unsigned int count;
 323         unsigned int harrier_revision;
 324
 325         harrier_revision = readb(HARRIER_REVI_REG);
 326         if (harrier_revision < 2) {
 327                 /* XTAL64 was broken in harrier revision 1 */
 328                 printk(KERN_INFO "time_init: Harrier revision %d, assuming "
 329                                  "100 Mhz bus\n", harrier_revision);
 330                 tb_ticks_per_second = 100000000 / 4;
 331                 tb_ticks_per_jiffy = tb_ticks_per_second / HZ;
 332                 tb_to_us = mulhwu_scale_factor(tb_ticks_per_second, 1000000);
 333                 return;
 334         }
 335
 336         /*
 337          * The XTAL64 bit oscillates at the 1/64 the base baud clock
 338          * Set count to XTAL64 cycles per second.  Since we'll count
 339          * half-cycles, we'll reach the count in half a second.
 340          */
 341         count = PRPMC800_BASE_BAUD / 64;
 342
 343         /* Find the first edge of the baud clock */
 344         old_state = readb(HARRIER_UCTL_REG) & HARRIER_XTAL64_MASK;
 345         do {
 346                 current_state = readb(HARRIER_UCTL_REG) & HARRIER_XTAL64_MASK;
 347         } while (old_state == current_state);
 348
 349         old_state = current_state;
 350
 351         /* Get the starting time base value */
 352         tbl_start = get_tbl();
 353
 354         /*
 355          * Loop until we have found a number of edges (half-cycles)
 356          * equal to the count (half a second)
 357          */
 358         do {
 359                 do {
 360                         current_state = readb(HARRIER_UCTL_REG) &
 361                             HARRIER_XTAL64_MASK;
 362                 } while (old_state == current_state);
 363                 old_state = current_state;
 364         } while (--count);
 365
 366         /* Get the ending time base value */
 367         tbl_end = get_tbl();
 368
 369         /* We only counted for half a second, so double to get ticks/second */
 370         tb_ticks_per_second = (tbl_end - tbl_start) * 2;
 371         tb_ticks_per_jiffy = tb_ticks_per_second / HZ;
 372         tb_to_us = mulhwu_scale_factor(tb_ticks_per_second, 1000000);
 373 }
 374
 375 static void prpmc800_restart(char *cmd)
 376 {
 377         ulong temp;
 378
 379         local_irq_disable();
 380         temp = in_be32((uint *) HARRIER_MISC_CSR_REG);
 381         temp |= HARRIER_RSTOUT;
 382         out_be32((uint *) HARRIER_MISC_CSR_REG, temp);
 383         while (1) ;
 384 }
 385
 386 static void prpmc800_halt(void)
 387 {
 388         local_irq_disable();
 389         while (1) ;
 390 }
 391
 392 static void prpmc800_power_off(void)
 393 {
 394         prpmc800_halt();
 395 }
 396
 397 static void __init prpmc800_init_IRQ(void)
 398 {
 399         OpenPIC_InitSenses = prpmc800_openpic_initsenses;
 400         OpenPIC_NumInitSenses = sizeof(prpmc800_openpic_initsenses);
 401
 402         /* Setup external interrupt sources. */
 403         openpic_set_sources(0, 16, OpenPIC_Addr + 0x10000);
 404         /* Setup internal UART interrupt source. */
 405         openpic_set_sources(16, 1, OpenPIC_Addr + 0x10200);
 406
 407         /* Do the MPIC initialization based on the above settings. */
 408         openpic_init(0);
 409
 410         /* enable functional exceptions for uarts and abort */
 411         out_8((u8 *) HARRIER_FEEN_REG, (HARRIER_FE_UA0 | HARRIER_FE_UA1));
 412         out_8((u8 *) HARRIER_FEMA_REG, ~(HARRIER_FE_UA0 | HARRIER_FE_UA1));
 413 }
 414
 415 /*
 416  * Set BAT 3 to map 0xf0000000 to end of physical memory space.
 417  */
 418 static __inline__ void prpmc800_set_bat(void)
 419 {
 420         mb();
 421         mtspr(SPRN_DBAT1U, 0xf0001ffe);
 422         mtspr(SPRN_DBAT1L, 0xf000002a);
 423         mb();
 424 }
 425
 426 /*
 427  * We need to read the Harrier memory controller
 428  * to properly determine this value
 429  */
 430 static unsigned long __init prpmc800_find_end_of_memory(void)
 431 {
 432         /* Read the memory size from the Harrier XCSR */
 433         return harrier_get_mem_size(PRPMC800_HARRIER_XCSR_BASE);
 434 }
 435
 436 static void __init prpmc800_map_io(void)
 437 {
 438         io_block_mapping(0x80000000, 0x80000000, 0x10000000, _PAGE_IO);
 439         io_block_mapping(0xf0000000, 0xf0000000, 0x10000000, _PAGE_IO);
 440 }
 441
 442 void __init
 443 platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 444               unsigned long r6, unsigned long r7)
 445 {
 446         parse_bootinfo(find_bootinfo());
 447
 448         prpmc800_set_bat();
 449
 450         isa_io_base = PRPMC800_ISA_IO_BASE;
 451         isa_mem_base = PRPMC800_ISA_MEM_BASE;
 452         pci_dram_offset = PRPMC800_PCI_DRAM_OFFSET;
 453
 454         ppc_md.setup_arch = prpmc800_setup_arch;
 455         ppc_md.show_cpuinfo = prpmc800_show_cpuinfo;
 456         ppc_md.init_IRQ = prpmc800_init_IRQ;
 457         ppc_md.get_irq = openpic_get_irq;
 458
 459         ppc_md.find_end_of_memory = prpmc800_find_end_of_memory;
 460         ppc_md.setup_io_mappings = prpmc800_map_io;
 461
 462         ppc_md.restart = prpmc800_restart;
 463         ppc_md.power_off = prpmc800_power_off;
 464         ppc_md.halt = prpmc800_halt;
 465
 466         /* PrPMC800 has no timekeeper part */
 467         ppc_md.time_init = NULL;
 468         ppc_md.get_rtc_time = NULL;
 469         ppc_md.set_rtc_time = NULL;
 470         ppc_md.calibrate_decr = prpmc800_calibrate_decr;
 471 #ifdef  CONFIG_SERIAL_TEXT_DEBUG
 472         ppc_md.progress = gen550_progress;
 473 #else                           /* !CONFIG_SERIAL_TEXT_DEBUG */
 474         ppc_md.progress = NULL;
 475 #endif                          /* CONFIG_SERIAL_TEXT_DEBUG */
 476 }