Merge git://git.kernel.org/pub/scm/linux/kernel/git/bunk/trivial
[pandora-kernel.git] / arch / powerpc / platforms / iseries / setup.c
1 /*
2  *    Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
3  *    Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
4  *
5  *    Description:
6  *      Architecture- / platform-specific boot-time initialization code for
7  *      the IBM iSeries LPAR.  Adapted from original code by Grant Erickson and
8  *      code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
9  *      <dan@net4x.com>.
10  *
11  *      This program is free software; you can redistribute it and/or
12  *      modify it under the terms of the GNU General Public License
13  *      as published by the Free Software Foundation; either version
14  *      2 of the License, or (at your option) any later version.
15  */
16
17 #undef DEBUG
18
19 #include <linux/init.h>
20 #include <linux/threads.h>
21 #include <linux/smp.h>
22 #include <linux/param.h>
23 #include <linux/string.h>
24 #include <linux/initrd.h>
25 #include <linux/seq_file.h>
26 #include <linux/kdev_t.h>
27 #include <linux/major.h>
28 #include <linux/root_dev.h>
29 #include <linux/kernel.h>
30
31 #include <asm/processor.h>
32 #include <asm/machdep.h>
33 #include <asm/page.h>
34 #include <asm/mmu.h>
35 #include <asm/pgtable.h>
36 #include <asm/mmu_context.h>
37 #include <asm/cputable.h>
38 #include <asm/sections.h>
39 #include <asm/iommu.h>
40 #include <asm/firmware.h>
41 #include <asm/system.h>
42 #include <asm/time.h>
43 #include <asm/paca.h>
44 #include <asm/cache.h>
45 #include <asm/sections.h>
46 #include <asm/abs_addr.h>
47 #include <asm/iseries/hv_lp_config.h>
48 #include <asm/iseries/hv_call_event.h>
49 #include <asm/iseries/hv_call_xm.h>
50 #include <asm/iseries/it_lp_queue.h>
51 #include <asm/iseries/mf.h>
52 #include <asm/iseries/hv_lp_event.h>
53 #include <asm/iseries/lpar_map.h>
54 #include <asm/udbg.h>
55 #include <asm/irq.h>
56
57 #include "naca.h"
58 #include "setup.h"
59 #include "irq.h"
60 #include "vpd_areas.h"
61 #include "processor_vpd.h"
62 #include "main_store.h"
63 #include "call_sm.h"
64 #include "call_hpt.h"
65
66 #ifdef DEBUG
67 #define DBG(fmt...) udbg_printf(fmt)
68 #else
69 #define DBG(fmt...)
70 #endif
71
72 /* Function Prototypes */
73 static unsigned long build_iSeries_Memory_Map(void);
74 static void iseries_shared_idle(void);
75 static void iseries_dedicated_idle(void);
76 #ifdef CONFIG_PCI
77 extern void iSeries_pci_final_fixup(void);
78 #else
79 static void iSeries_pci_final_fixup(void) { }
80 #endif
81
82 extern int rd_size;             /* Defined in drivers/block/rd.c */
83
84 extern unsigned long iSeries_recal_tb;
85 extern unsigned long iSeries_recal_titan;
86
87 struct MemoryBlock {
88         unsigned long absStart;
89         unsigned long absEnd;
90         unsigned long logicalStart;
91         unsigned long logicalEnd;
92 };
93
94 /*
95  * Process the main store vpd to determine where the holes in memory are
96  * and return the number of physical blocks and fill in the array of
97  * block data.
98  */
99 static unsigned long iSeries_process_Condor_mainstore_vpd(
100                 struct MemoryBlock *mb_array, unsigned long max_entries)
101 {
102         unsigned long holeFirstChunk, holeSizeChunks;
103         unsigned long numMemoryBlocks = 1;
104         struct IoHriMainStoreSegment4 *msVpd =
105                 (struct IoHriMainStoreSegment4 *)xMsVpd;
106         unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
107         unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
108         unsigned long holeSize = holeEnd - holeStart;
109
110         printk("Mainstore_VPD: Condor\n");
111         /*
112          * Determine if absolute memory has any
113          * holes so that we can interpret the
114          * access map we get back from the hypervisor
115          * correctly.
116          */
117         mb_array[0].logicalStart = 0;
118         mb_array[0].logicalEnd = 0x100000000;
119         mb_array[0].absStart = 0;
120         mb_array[0].absEnd = 0x100000000;
121
122         if (holeSize) {
123                 numMemoryBlocks = 2;
124                 holeStart = holeStart & 0x000fffffffffffff;
125                 holeStart = addr_to_chunk(holeStart);
126                 holeFirstChunk = holeStart;
127                 holeSize = addr_to_chunk(holeSize);
128                 holeSizeChunks = holeSize;
129                 printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
130                                 holeFirstChunk, holeSizeChunks );
131                 mb_array[0].logicalEnd = holeFirstChunk;
132                 mb_array[0].absEnd = holeFirstChunk;
133                 mb_array[1].logicalStart = holeFirstChunk;
134                 mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
135                 mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
136                 mb_array[1].absEnd = 0x100000000;
137         }
138         return numMemoryBlocks;
139 }
140
141 #define MaxSegmentAreas                 32
142 #define MaxSegmentAdrRangeBlocks        128
143 #define MaxAreaRangeBlocks              4
144
145 static unsigned long iSeries_process_Regatta_mainstore_vpd(
146                 struct MemoryBlock *mb_array, unsigned long max_entries)
147 {
148         struct IoHriMainStoreSegment5 *msVpdP =
149                 (struct IoHriMainStoreSegment5 *)xMsVpd;
150         unsigned long numSegmentBlocks = 0;
151         u32 existsBits = msVpdP->msAreaExists;
152         unsigned long area_num;
153
154         printk("Mainstore_VPD: Regatta\n");
155
156         for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
157                 unsigned long numAreaBlocks;
158                 struct IoHriMainStoreArea4 *currentArea;
159
160                 if (existsBits & 0x80000000) {
161                         unsigned long block_num;
162
163                         currentArea = &msVpdP->msAreaArray[area_num];
164                         numAreaBlocks = currentArea->numAdrRangeBlocks;
165                         printk("ms_vpd: processing area %2ld  blocks=%ld",
166                                         area_num, numAreaBlocks);
167                         for (block_num = 0; block_num < numAreaBlocks;
168                                         ++block_num ) {
169                                 /* Process an address range block */
170                                 struct MemoryBlock tempBlock;
171                                 unsigned long i;
172
173                                 tempBlock.absStart =
174                                         (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
175                                 tempBlock.absEnd =
176                                         (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
177                                 tempBlock.logicalStart = 0;
178                                 tempBlock.logicalEnd   = 0;
179                                 printk("\n          block %ld absStart=%016lx absEnd=%016lx",
180                                                 block_num, tempBlock.absStart,
181                                                 tempBlock.absEnd);
182
183                                 for (i = 0; i < numSegmentBlocks; ++i) {
184                                         if (mb_array[i].absStart ==
185                                                         tempBlock.absStart)
186                                                 break;
187                                 }
188                                 if (i == numSegmentBlocks) {
189                                         if (numSegmentBlocks == max_entries)
190                                                 panic("iSeries_process_mainstore_vpd: too many memory blocks");
191                                         mb_array[numSegmentBlocks] = tempBlock;
192                                         ++numSegmentBlocks;
193                                 } else
194                                         printk(" (duplicate)");
195                         }
196                         printk("\n");
197                 }
198                 existsBits <<= 1;
199         }
200         /* Now sort the blocks found into ascending sequence */
201         if (numSegmentBlocks > 1) {
202                 unsigned long m, n;
203
204                 for (m = 0; m < numSegmentBlocks - 1; ++m) {
205                         for (n = numSegmentBlocks - 1; m < n; --n) {
206                                 if (mb_array[n].absStart <
207                                                 mb_array[n-1].absStart) {
208                                         struct MemoryBlock tempBlock;
209
210                                         tempBlock = mb_array[n];
211                                         mb_array[n] = mb_array[n-1];
212                                         mb_array[n-1] = tempBlock;
213                                 }
214                         }
215                 }
216         }
217         /*
218          * Assign "logical" addresses to each block.  These
219          * addresses correspond to the hypervisor "bitmap" space.
220          * Convert all addresses into units of 256K chunks.
221          */
222         {
223         unsigned long i, nextBitmapAddress;
224
225         printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
226         nextBitmapAddress = 0;
227         for (i = 0; i < numSegmentBlocks; ++i) {
228                 unsigned long length = mb_array[i].absEnd -
229                         mb_array[i].absStart;
230
231                 mb_array[i].logicalStart = nextBitmapAddress;
232                 mb_array[i].logicalEnd = nextBitmapAddress + length;
233                 nextBitmapAddress += length;
234                 printk("          Bitmap range: %016lx - %016lx\n"
235                                 "        Absolute range: %016lx - %016lx\n",
236                                 mb_array[i].logicalStart,
237                                 mb_array[i].logicalEnd,
238                                 mb_array[i].absStart, mb_array[i].absEnd);
239                 mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
240                                 0x000fffffffffffff);
241                 mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
242                                 0x000fffffffffffff);
243                 mb_array[i].logicalStart =
244                         addr_to_chunk(mb_array[i].logicalStart);
245                 mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
246         }
247         }
248
249         return numSegmentBlocks;
250 }
251
252 static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
253                 unsigned long max_entries)
254 {
255         unsigned long i;
256         unsigned long mem_blocks = 0;
257
258         if (cpu_has_feature(CPU_FTR_SLB))
259                 mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
260                                 max_entries);
261         else
262                 mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
263                                 max_entries);
264
265         printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks);
266         for (i = 0; i < mem_blocks; ++i) {
267                 printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
268                        "                             abs chunks %016lx - %016lx\n",
269                         i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
270                         mb_array[i].absStart, mb_array[i].absEnd);
271         }
272         return mem_blocks;
273 }
274
275 static void __init iSeries_get_cmdline(void)
276 {
277         char *p, *q;
278
279         /* copy the command line parameter from the primary VSP  */
280         HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256,
281                         HvLpDma_Direction_RemoteToLocal);
282
283         p = cmd_line;
284         q = cmd_line + 255;
285         while(p < q) {
286                 if (!*p || *p == '\n')
287                         break;
288                 ++p;
289         }
290         *p = 0;
291 }
292
293 static void __init iSeries_init_early(void)
294 {
295         DBG(" -> iSeries_init_early()\n");
296
297         ppc64_interrupt_controller = IC_ISERIES;
298
299 #if defined(CONFIG_BLK_DEV_INITRD)
300         /*
301          * If the init RAM disk has been configured and there is
302          * a non-zero starting address for it, set it up
303          */
304         if (naca.xRamDisk) {
305                 initrd_start = (unsigned long)__va(naca.xRamDisk);
306                 initrd_end = initrd_start + naca.xRamDiskSize * HW_PAGE_SIZE;
307                 initrd_below_start_ok = 1;      // ramdisk in kernel space
308                 ROOT_DEV = Root_RAM0;
309                 if (((rd_size * 1024) / HW_PAGE_SIZE) < naca.xRamDiskSize)
310                         rd_size = (naca.xRamDiskSize * HW_PAGE_SIZE) / 1024;
311         } else
312 #endif /* CONFIG_BLK_DEV_INITRD */
313         {
314             /* ROOT_DEV = MKDEV(VIODASD_MAJOR, 1); */
315         }
316
317         iSeries_recal_tb = get_tb();
318         iSeries_recal_titan = HvCallXm_loadTod();
319
320         /*
321          * Initialize the DMA/TCE management
322          */
323         iommu_init_early_iSeries();
324
325         /* Initialize machine-dependency vectors */
326 #ifdef CONFIG_SMP
327         smp_init_iSeries();
328 #endif
329
330         /* Associate Lp Event Queue 0 with processor 0 */
331         HvCallEvent_setLpEventQueueInterruptProc(0, 0);
332
333         mf_init();
334
335         /* If we were passed an initrd, set the ROOT_DEV properly if the values
336          * look sensible. If not, clear initrd reference.
337          */
338 #ifdef CONFIG_BLK_DEV_INITRD
339         if (initrd_start >= KERNELBASE && initrd_end >= KERNELBASE &&
340             initrd_end > initrd_start)
341                 ROOT_DEV = Root_RAM0;
342         else
343                 initrd_start = initrd_end = 0;
344 #endif /* CONFIG_BLK_DEV_INITRD */
345
346         DBG(" <- iSeries_init_early()\n");
347 }
348
349 struct mschunks_map mschunks_map = {
350         /* XXX We don't use these, but Piranha might need them. */
351         .chunk_size  = MSCHUNKS_CHUNK_SIZE,
352         .chunk_shift = MSCHUNKS_CHUNK_SHIFT,
353         .chunk_mask  = MSCHUNKS_OFFSET_MASK,
354 };
355 EXPORT_SYMBOL(mschunks_map);
356
357 void mschunks_alloc(unsigned long num_chunks)
358 {
359         klimit = _ALIGN(klimit, sizeof(u32));
360         mschunks_map.mapping = (u32 *)klimit;
361         klimit += num_chunks * sizeof(u32);
362         mschunks_map.num_chunks = num_chunks;
363 }
364
365 /*
366  * The iSeries may have very large memories ( > 128 GB ) and a partition
367  * may get memory in "chunks" that may be anywhere in the 2**52 real
368  * address space.  The chunks are 256K in size.  To map this to the
369  * memory model Linux expects, the AS/400 specific code builds a
370  * translation table to translate what Linux thinks are "physical"
371  * addresses to the actual real addresses.  This allows us to make
372  * it appear to Linux that we have contiguous memory starting at
373  * physical address zero while in fact this could be far from the truth.
374  * To avoid confusion, I'll let the words physical and/or real address
375  * apply to the Linux addresses while I'll use "absolute address" to
376  * refer to the actual hardware real address.
377  *
378  * build_iSeries_Memory_Map gets information from the Hypervisor and
379  * looks at the Main Store VPD to determine the absolute addresses
380  * of the memory that has been assigned to our partition and builds
381  * a table used to translate Linux's physical addresses to these
382  * absolute addresses.  Absolute addresses are needed when
383  * communicating with the hypervisor (e.g. to build HPT entries)
384  *
385  * Returns the physical memory size
386  */
387
388 static unsigned long __init build_iSeries_Memory_Map(void)
389 {
390         u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
391         u32 nextPhysChunk;
392         u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
393         u32 totalChunks,moreChunks;
394         u32 currChunk, thisChunk, absChunk;
395         u32 currDword;
396         u32 chunkBit;
397         u64 map;
398         struct MemoryBlock mb[32];
399         unsigned long numMemoryBlocks, curBlock;
400
401         /* Chunk size on iSeries is 256K bytes */
402         totalChunks = (u32)HvLpConfig_getMsChunks();
403         mschunks_alloc(totalChunks);
404
405         /*
406          * Get absolute address of our load area
407          * and map it to physical address 0
408          * This guarantees that the loadarea ends up at physical 0
409          * otherwise, it might not be returned by PLIC as the first
410          * chunks
411          */
412
413         loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
414         loadAreaSize =  itLpNaca.xLoadAreaChunks;
415
416         /*
417          * Only add the pages already mapped here.
418          * Otherwise we might add the hpt pages
419          * The rest of the pages of the load area
420          * aren't in the HPT yet and can still
421          * be assigned an arbitrary physical address
422          */
423         if ((loadAreaSize * 64) > HvPagesToMap)
424                 loadAreaSize = HvPagesToMap / 64;
425
426         loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
427
428         /*
429          * TODO Do we need to do something if the HPT is in the 64MB load area?
430          * This would be required if the itLpNaca.xLoadAreaChunks includes
431          * the HPT size
432          */
433
434         printk("Mapping load area - physical addr = 0000000000000000\n"
435                 "                    absolute addr = %016lx\n",
436                 chunk_to_addr(loadAreaFirstChunk));
437         printk("Load area size %dK\n", loadAreaSize * 256);
438
439         for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
440                 mschunks_map.mapping[nextPhysChunk] =
441                         loadAreaFirstChunk + nextPhysChunk;
442
443         /*
444          * Get absolute address of our HPT and remember it so
445          * we won't map it to any physical address
446          */
447         hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
448         hptSizePages = (u32)HvCallHpt_getHptPages();
449         hptSizeChunks = hptSizePages >>
450                 (MSCHUNKS_CHUNK_SHIFT - HW_PAGE_SHIFT);
451         hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
452
453         printk("HPT absolute addr = %016lx, size = %dK\n",
454                         chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
455
456         /*
457          * Determine if absolute memory has any
458          * holes so that we can interpret the
459          * access map we get back from the hypervisor
460          * correctly.
461          */
462         numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32);
463
464         /*
465          * Process the main store access map from the hypervisor
466          * to build up our physical -> absolute translation table
467          */
468         curBlock = 0;
469         currChunk = 0;
470         currDword = 0;
471         moreChunks = totalChunks;
472
473         while (moreChunks) {
474                 map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex,
475                                 currDword);
476                 thisChunk = currChunk;
477                 while (map) {
478                         chunkBit = map >> 63;
479                         map <<= 1;
480                         if (chunkBit) {
481                                 --moreChunks;
482                                 while (thisChunk >= mb[curBlock].logicalEnd) {
483                                         ++curBlock;
484                                         if (curBlock >= numMemoryBlocks)
485                                                 panic("out of memory blocks");
486                                 }
487                                 if (thisChunk < mb[curBlock].logicalStart)
488                                         panic("memory block error");
489
490                                 absChunk = mb[curBlock].absStart +
491                                         (thisChunk - mb[curBlock].logicalStart);
492                                 if (((absChunk < hptFirstChunk) ||
493                                      (absChunk > hptLastChunk)) &&
494                                     ((absChunk < loadAreaFirstChunk) ||
495                                      (absChunk > loadAreaLastChunk))) {
496                                         mschunks_map.mapping[nextPhysChunk] =
497                                                 absChunk;
498                                         ++nextPhysChunk;
499                                 }
500                         }
501                         ++thisChunk;
502                 }
503                 ++currDword;
504                 currChunk += 64;
505         }
506
507         /*
508          * main store size (in chunks) is
509          *   totalChunks - hptSizeChunks
510          * which should be equal to
511          *   nextPhysChunk
512          */
513         return chunk_to_addr(nextPhysChunk);
514 }
515
516 /*
517  * Document me.
518  */
519 static void __init iSeries_setup_arch(void)
520 {
521         if (get_lppaca()->shared_proc) {
522                 ppc_md.idle_loop = iseries_shared_idle;
523                 printk(KERN_DEBUG "Using shared processor idle loop\n");
524         } else {
525                 ppc_md.idle_loop = iseries_dedicated_idle;
526                 printk(KERN_DEBUG "Using dedicated idle loop\n");
527         }
528
529         /* Setup the Lp Event Queue */
530         setup_hvlpevent_queue();
531
532         printk("Max  logical processors = %d\n",
533                         itVpdAreas.xSlicMaxLogicalProcs);
534         printk("Max physical processors = %d\n",
535                         itVpdAreas.xSlicMaxPhysicalProcs);
536 }
537
538 static void iSeries_show_cpuinfo(struct seq_file *m)
539 {
540         seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
541 }
542
543 static void __init iSeries_progress(char * st, unsigned short code)
544 {
545         printk("Progress: [%04x] - %s\n", (unsigned)code, st);
546         mf_display_progress(code);
547 }
548
549 static void __init iSeries_fixup_klimit(void)
550 {
551         /*
552          * Change klimit to take into account any ram disk
553          * that may be included
554          */
555         if (naca.xRamDisk)
556                 klimit = KERNELBASE + (u64)naca.xRamDisk +
557                         (naca.xRamDiskSize * HW_PAGE_SIZE);
558 }
559
560 static int __init iSeries_src_init(void)
561 {
562         /* clear the progress line */
563         ppc_md.progress(" ", 0xffff);
564         return 0;
565 }
566
567 late_initcall(iSeries_src_init);
568
569 static inline void process_iSeries_events(void)
570 {
571         asm volatile ("li 0,0x5555; sc" : : : "r0", "r3");
572 }
573
574 static void yield_shared_processor(void)
575 {
576         unsigned long tb;
577
578         HvCall_setEnabledInterrupts(HvCall_MaskIPI |
579                                     HvCall_MaskLpEvent |
580                                     HvCall_MaskLpProd |
581                                     HvCall_MaskTimeout);
582
583         tb = get_tb();
584         /* Compute future tb value when yield should expire */
585         HvCall_yieldProcessor(HvCall_YieldTimed, tb+tb_ticks_per_jiffy);
586
587         /*
588          * The decrementer stops during the yield.  Force a fake decrementer
589          * here and let the timer_interrupt code sort out the actual time.
590          */
591         get_lppaca()->int_dword.fields.decr_int = 1;
592         ppc64_runlatch_on();
593         process_iSeries_events();
594 }
595
596 static void iseries_shared_idle(void)
597 {
598         while (1) {
599                 while (!need_resched() && !hvlpevent_is_pending()) {
600                         local_irq_disable();
601                         ppc64_runlatch_off();
602
603                         /* Recheck with irqs off */
604                         if (!need_resched() && !hvlpevent_is_pending())
605                                 yield_shared_processor();
606
607                         HMT_medium();
608                         local_irq_enable();
609                 }
610
611                 ppc64_runlatch_on();
612
613                 if (hvlpevent_is_pending())
614                         process_iSeries_events();
615
616                 preempt_enable_no_resched();
617                 schedule();
618                 preempt_disable();
619         }
620 }
621
622 static void iseries_dedicated_idle(void)
623 {
624         set_thread_flag(TIF_POLLING_NRFLAG);
625
626         while (1) {
627                 if (!need_resched()) {
628                         while (!need_resched()) {
629                                 ppc64_runlatch_off();
630                                 HMT_low();
631
632                                 if (hvlpevent_is_pending()) {
633                                         HMT_medium();
634                                         ppc64_runlatch_on();
635                                         process_iSeries_events();
636                                 }
637                         }
638
639                         HMT_medium();
640                 }
641
642                 ppc64_runlatch_on();
643                 preempt_enable_no_resched();
644                 schedule();
645                 preempt_disable();
646         }
647 }
648
649 #ifndef CONFIG_PCI
650 void __init iSeries_init_IRQ(void) { }
651 #endif
652
653 static int __init iseries_probe(void)
654 {
655         unsigned long root = of_get_flat_dt_root();
656         if (!of_flat_dt_is_compatible(root, "IBM,iSeries"))
657                 return 0;
658
659         powerpc_firmware_features |= FW_FEATURE_ISERIES;
660         powerpc_firmware_features |= FW_FEATURE_LPAR;
661
662         /*
663          * The Hypervisor only allows us up to 256 interrupt
664          * sources (the irq number is passed in a u8).
665          */
666         virt_irq_max = 255;
667
668         hpte_init_iSeries();
669
670         return 1;
671 }
672
673 define_machine(iseries) {
674         .name           = "iSeries",
675         .setup_arch     = iSeries_setup_arch,
676         .show_cpuinfo   = iSeries_show_cpuinfo,
677         .init_IRQ       = iSeries_init_IRQ,
678         .get_irq        = iSeries_get_irq,
679         .init_early     = iSeries_init_early,
680         .pcibios_fixup  = iSeries_pci_final_fixup,
681         .restart        = mf_reboot,
682         .power_off      = mf_power_off,
683         .halt           = mf_power_off,
684         .get_boot_time  = iSeries_get_boot_time,
685         .set_rtc_time   = iSeries_set_rtc_time,
686         .get_rtc_time   = iSeries_get_rtc_time,
687         .calibrate_decr = generic_calibrate_decr,
688         .progress       = iSeries_progress,
689         .probe          = iseries_probe,
690         /* XXX Implement enable_pmcs for iSeries */
691 };
692
693 void * __init iSeries_early_setup(void)
694 {
695         unsigned long phys_mem_size;
696
697         iSeries_fixup_klimit();
698
699         /*
700          * Initialize the table which translate Linux physical addresses to
701          * AS/400 absolute addresses
702          */
703         phys_mem_size = build_iSeries_Memory_Map();
704
705         iSeries_get_cmdline();
706
707         return (void *) __pa(build_flat_dt(phys_mem_size));
708 }
709
710 static void hvputc(char c)
711 {
712         if (c == '\n')
713                 hvputc('\r');
714
715         HvCall_writeLogBuffer(&c, 1);
716 }
717
718 void __init udbg_init_iseries(void)
719 {
720         udbg_putc = hvputc;
721 }