9 prompt "8xx Machine Type"
22 MPC86x Application Development System by Freescale Semiconductor.
23 The MPC86xADS is meant to serve as a platform for s/w and h/w
24 development around the MPC86X processor families.
29 select PPC_CPM_NEW_BINDING
31 Freescale Semiconductor MPC885 Application Development System (ADS).
33 The MPC885ADS is meant to serve as a platform for s/w and h/w
34 development around the MPC885 processor family.
38 menu "Freescale Ethernet driver platform-specific options"
39 depends on (FS_ENET && MPC885ADS)
41 config MPC8xx_SECOND_ETH
42 bool "Second Ethernet channel"
46 This enables support for second Ethernet on MPC885ADS and MPC86xADS boards.
47 The latter will use SCC1, for 885ADS you can select it below.
50 prompt "Second Ethernet channel"
51 depends on MPC8xx_SECOND_ETH
52 default MPC8xx_SECOND_ETH_FEC2
54 config MPC8xx_SECOND_ETH_FEC2
58 Enable FEC2 to serve as 2-nd Ethernet channel. Note that SMC2
59 (often 2-nd UART) will not work if this is enabled.
61 config MPC8xx_SECOND_ETH_SCC3
65 Enable SCC3 to serve as 2-nd Ethernet channel. Note that SMC1
66 (often 1-nd UART) will not work if this is enabled.
73 # MPC8xx Communication options
76 menu "MPC8xx CPM Options"
79 # This doesn't really belong here, but it is convenient to ask
80 # 8xx specific questions.
81 comment "Generic MPC8xx Options"
84 bool "Copy-Back Data Cache (else Writethrough)"
86 Saying Y here will cause the cache on an MPC8xx processor to be used
87 in Copy-Back mode. If you say N here, it is used in Writethrough
90 If in doubt, say Y here.
93 bool "CPU6 Silicon Errata (860 Pre Rev. C)"
95 MPC860 CPUs, prior to Rev C have some bugs in the silicon, which
96 require workarounds for Linux (and most other OSes to work). If you
97 get a BUG() very early in boot, this might fix the problem. For
98 more details read the document entitled "MPC860 Family Device Errata
99 Reference" on Freescale's website. This option also incurs a
102 If in doubt, say N here.
105 bool "CPU15 Silicon Errata"
108 This enables a workaround for erratum CPU15 on MPC8xx chips.
109 This bug can cause incorrect code execution under certain
110 circumstances. This workaround adds some overhead (a TLB miss
111 every time execution crosses a page boundary), and you may wish
112 to disable it if you have worked around the bug in the compiler
113 (by not placing conditional branches or branches to LR or CTR
114 in the last word of a page, with a target of the last cache
115 line in the next page), or if you have used some other
118 If in doubt, say Y here.
121 prompt "Microcode patch selection"
122 default NO_UCODE_PATCH
124 Help not implemented yet, coming soon.
126 config NO_UCODE_PATCH
129 config USB_SOF_UCODE_PATCH
132 Help not implemented yet, coming soon.
134 config I2C_SPI_UCODE_PATCH
135 bool "I2C/SPI relocation patch"
137 Help not implemented yet, coming soon.
139 config I2C_SPI_SMC1_UCODE_PATCH
140 bool "I2C/SPI/SMC1 relocation patch"
142 Help not implemented yet, coming soon.
149 depends on !NO_UCODE_PATCH