arch/powerpc/lib/sstep.c

   1 /*
   2  * Single-step support.
   3  *
   4  * Copyright (C) 2004 Paul Mackerras <paulus@au.ibm.com>, IBM
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the License, or (at your option) any later version.
  10  */
  11 #include <linux/kernel.h>
  12 #include <linux/ptrace.h>
  13 #include <asm/sstep.h>
  14 #include <asm/processor.h>
  15
  16 extern char system_call_common[];
  17
  18 #ifdef CONFIG_PPC64
  19 /* Bits in SRR1 that are copied from MSR */
  20 #define MSR_MASK        0xffffffff87c0ffffUL
  21 #else
  22 #define MSR_MASK        0x87c0ffff
  23 #endif
  24
  25 /*
  26  * Determine whether a conditional branch instruction would branch.
  27  */
  28 static int branch_taken(unsigned int instr, struct pt_regs *regs)
  29 {
  30         unsigned int bo = (instr >> 21) & 0x1f;
  31         unsigned int bi;
  32
  33         if ((bo & 4) == 0) {
  34                 /* decrement counter */
  35                 --regs->ctr;
  36                 if (((bo >> 1) & 1) ^ (regs->ctr == 0))
  37                         return 0;
  38         }
  39         if ((bo & 0x10) == 0) {
  40                 /* check bit from CR */
  41                 bi = (instr >> 16) & 0x1f;
  42                 if (((regs->ccr >> (31 - bi)) & 1) != ((bo >> 3) & 1))
  43                         return 0;
  44         }
  45         return 1;
  46 }
  47
  48 /*
  49  * Emulate instructions that cause a transfer of control.
  50  * Returns 1 if the step was emulated, 0 if not,
  51  * or -1 if the instruction is one that should not be stepped,
  52  * such as an rfid, or a mtmsrd that would clear MSR_RI.
  53  */
  54 int emulate_step(struct pt_regs *regs, unsigned int instr)
  55 {
  56         unsigned int opcode, rd;
  57         unsigned long int imm;
  58
  59         opcode = instr >> 26;
  60         switch (opcode) {
  61         case 16:        /* bc */
  62                 imm = (signed short)(instr & 0xfffc);
  63                 if ((instr & 2) == 0)
  64                         imm += regs->nip;
  65                 regs->nip += 4;
  66                 if ((regs->msr & MSR_SF) == 0)
  67                         regs->nip &= 0xffffffffUL;
  68                 if (instr & 1)
  69                         regs->link = regs->nip;
  70                 if (branch_taken(instr, regs))
  71                         regs->nip = imm;
  72                 return 1;
  73 #ifdef CONFIG_PPC64
  74         case 17:        /* sc */
  75                 /*
  76                  * N.B. this uses knowledge about how the syscall
  77                  * entry code works.  If that is changed, this will
  78                  * need to be changed also.
  79                  */
  80                 regs->gpr[9] = regs->gpr[13];
  81                 regs->gpr[11] = regs->nip + 4;
  82                 regs->gpr[12] = regs->msr & MSR_MASK;
  83                 regs->gpr[13] = (unsigned long) get_paca();
  84                 regs->nip = (unsigned long) &system_call_common;
  85                 regs->msr = MSR_KERNEL;
  86                 return 1;
  87 #endif
  88         case 18:        /* b */
  89                 imm = instr & 0x03fffffc;
  90                 if (imm & 0x02000000)
  91                         imm -= 0x04000000;
  92                 if ((instr & 2) == 0)
  93                         imm += regs->nip;
  94                 if (instr & 1) {
  95                         regs->link = regs->nip + 4;
  96                         if ((regs->msr & MSR_SF) == 0)
  97                                 regs->link &= 0xffffffffUL;
  98                 }
  99                 if ((regs->msr & MSR_SF) == 0)
 100                         imm &= 0xffffffffUL;
 101                 regs->nip = imm;
 102                 return 1;
 103         case 19:
 104                 switch (instr & 0x7fe) {
 105                 case 0x20:      /* bclr */
 106                 case 0x420:     /* bcctr */
 107                         imm = (instr & 0x400)? regs->ctr: regs->link;
 108                         regs->nip += 4;
 109                         if ((regs->msr & MSR_SF) == 0) {
 110                                 regs->nip &= 0xffffffffUL;
 111                                 imm &= 0xffffffffUL;
 112                         }
 113                         if (instr & 1)
 114                                 regs->link = regs->nip;
 115                         if (branch_taken(instr, regs))
 116                                 regs->nip = imm;
 117                         return 1;
 118                 case 0x24:      /* rfid, scary */
 119                         return -1;
 120                 }
 121         case 31:
 122                 rd = (instr >> 21) & 0x1f;
 123                 switch (instr & 0x7fe) {
 124                 case 0xa6:      /* mfmsr */
 125                         regs->gpr[rd] = regs->msr & MSR_MASK;
 126                         regs->nip += 4;
 127                         if ((regs->msr & MSR_SF) == 0)
 128                                 regs->nip &= 0xffffffffUL;
 129                         return 1;
 130                 case 0x124:     /* mtmsr */
 131                         imm = regs->gpr[rd];
 132                         if ((imm & MSR_RI) == 0)
 133                                 /* can't step mtmsr that would clear MSR_RI */
 134                                 return -1;
 135                         regs->msr = imm;
 136                         regs->nip += 4;
 137                         return 1;
 138 #ifdef CONFIG_PPC64
 139                 case 0x164:     /* mtmsrd */
 140                         /* only MSR_EE and MSR_RI get changed if bit 15 set */
 141                         /* mtmsrd doesn't change MSR_HV and MSR_ME */
 142                         imm = (instr & 0x10000)? 0x8002: 0xefffffffffffefffUL;
 143                         imm = (regs->msr & MSR_MASK & ~imm)
 144                                 | (regs->gpr[rd] & imm);
 145                         if ((imm & MSR_RI) == 0)
 146                                 /* can't step mtmsrd that would clear MSR_RI */
 147                                 return -1;
 148                         regs->msr = imm;
 149                         regs->nip += 4;
 150                         if ((imm & MSR_SF) == 0)
 151                                 regs->nip &= 0xffffffffUL;
 152                         return 1;
 153 #endif
 154                 }
 155         }
 156         return 0;
 157 }