1 #ifndef _ASM_POWERPC_TLBFLUSH_H
2 #define _ASM_POWERPC_TLBFLUSH_H
7 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
8 * - flush_tlb_page(vma, vmaddr) flushes one page
9 * - local_flush_tlb_page(vmaddr) flushes one page on the local processor
10 * - flush_tlb_page_nohash(vma, vmaddr) flushes one page if SW loaded TLB
11 * - flush_tlb_range(vma, start, end) flushes a range of pages
12 * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License
16 * as published by the Free Software Foundation; either version
17 * 2 of the License, or (at your option) any later version.
21 #if defined(CONFIG_4xx) || defined(CONFIG_8xx) || defined(CONFIG_FSL_BOOKE)
23 * TLB flushing for software loaded TLB chips
25 * TODO: (CONFIG_FSL_BOOKE) determine if flush_tlb_range &
26 * flush_tlb_kernel_range are best implemented as tlbia vs
32 extern void _tlbie(unsigned long address, unsigned int pid);
33 extern void _tlbil_all(void);
34 extern void _tlbil_pid(unsigned int pid);
35 extern void _tlbil_va(unsigned long address, unsigned int pid);
37 #if defined(CONFIG_40x) || defined(CONFIG_8xx)
38 #define _tlbia() asm volatile ("tlbia; sync" : : : "memory")
39 #else /* CONFIG_44x || CONFIG_FSL_BOOKE */
40 extern void _tlbia(void);
43 static inline void flush_tlb_mm(struct mm_struct *mm)
45 _tlbil_pid(mm->context.id);
48 static inline void local_flush_tlb_page(unsigned long vmaddr)
53 static inline void flush_tlb_page(struct vm_area_struct *vma,
56 _tlbil_va(vmaddr, vma ? vma->vm_mm->context.id : 0);
59 static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
62 flush_tlb_page(vma, vmaddr);
65 static inline void flush_tlb_range(struct vm_area_struct *vma,
66 unsigned long start, unsigned long end)
68 _tlbil_pid(vma->vm_mm->context.id);
71 static inline void flush_tlb_kernel_range(unsigned long start,
77 #elif defined(CONFIG_PPC32)
79 * TLB flushing for "classic" hash-MMMU 32-bit CPUs, 6xx, 7xx, 7xxx
81 extern void _tlbie(unsigned long address);
82 extern void _tlbia(void);
84 extern void flush_tlb_mm(struct mm_struct *mm);
85 extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
86 extern void flush_tlb_page_nohash(struct vm_area_struct *vma, unsigned long addr);
87 extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
89 extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
90 static inline void local_flush_tlb_page(unsigned long vmaddr)
92 flush_tlb_page(NULL, vmaddr);
97 * TLB flushing for 64-bit has-MMU CPUs
100 #include <linux/percpu.h>
101 #include <asm/page.h>
103 #define PPC64_TLB_BATCH_NR 192
105 struct ppc64_tlb_batch {
108 struct mm_struct *mm;
109 real_pte_t pte[PPC64_TLB_BATCH_NR];
110 unsigned long vaddr[PPC64_TLB_BATCH_NR];
114 DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
116 extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch);
118 extern void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
119 pte_t *ptep, unsigned long pte, int huge);
121 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
123 static inline void arch_enter_lazy_mmu_mode(void)
125 struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
130 static inline void arch_leave_lazy_mmu_mode(void)
132 struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
135 __flush_tlb_pending(batch);
139 #define arch_flush_lazy_mmu_mode() do {} while (0)
142 extern void flush_hash_page(unsigned long va, real_pte_t pte, int psize,
143 int ssize, int local);
144 extern void flush_hash_range(unsigned long number, int local);
147 static inline void flush_tlb_mm(struct mm_struct *mm)
151 static inline void local_flush_tlb_page(unsigned long vmaddr)
155 static inline void flush_tlb_page(struct vm_area_struct *vma,
156 unsigned long vmaddr)
160 static inline void flush_tlb_page_nohash(struct vm_area_struct *vma,
161 unsigned long vmaddr)
165 static inline void flush_tlb_range(struct vm_area_struct *vma,
166 unsigned long start, unsigned long end)
170 static inline void flush_tlb_kernel_range(unsigned long start,
175 /* Private function for use by PCI IO mapping code */
176 extern void __flush_hash_table_range(struct mm_struct *mm, unsigned long start,
182 #endif /*__KERNEL__ */
183 #endif /* _ASM_POWERPC_TLBFLUSH_H */