1 #ifndef _ASM_POWERPC_PTRACE_H
2 #define _ASM_POWERPC_PTRACE_H
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
7 * This struct defines the way the registers are stored on the
8 * kernel stack during a system call or other kernel entry.
10 * this should only contain volatile regs
11 * since we can keep non-volatile in the thread_struct
12 * should set this up when only volatiles are saved
15 * Since this is going on the stack, *CARE MUST BE TAKEN* to insure
16 * that the overall structure is a multiple of 16 bytes in length.
18 * Note that the offsets of the fields in this struct correspond with
19 * the PT_* values below. This simplifies arch/powerpc/kernel/ptrace.c.
21 * This program is free software; you can redistribute it and/or
22 * modify it under the terms of the GNU General Public License
23 * as published by the Free Software Foundation; either version
24 * 2 of the License, or (at your option) any later version.
27 #include <linux/types.h>
32 unsigned long gpr[32];
35 unsigned long orig_gpr3; /* Used for restarting system calls */
41 unsigned long softe; /* Soft enabled/disabled */
43 unsigned long mq; /* 601 only (not used at present) */
44 /* Used on APUS to hold IPL value. */
46 unsigned long trap; /* Reason for being here */
47 /* N.B. for critical exceptions on 4xx, the dar and dsisr
48 fields are overloaded to hold srr0 and srr1. */
49 unsigned long dar; /* Fault registers */
50 unsigned long dsisr; /* on 4xx/Book-E used for ESR */
51 unsigned long result; /* Result of a system call */
54 #endif /* __ASSEMBLY__ */
60 #define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */
61 #define STACK_FRAME_LR_SAVE 2 /* Location of LR in stack frame */
62 #define STACK_FRAME_REGS_MARKER ASM_CONST(0x7265677368657265)
63 #define STACK_INT_FRAME_SIZE (sizeof(struct pt_regs) + \
64 STACK_FRAME_OVERHEAD + 288)
65 #define STACK_FRAME_MARKER 12
67 /* Size of dummy stack frame allocated when calling signal handler. */
68 #define __SIGNAL_FRAMESIZE 128
69 #define __SIGNAL_FRAMESIZE32 64
71 #else /* __powerpc64__ */
73 #define STACK_FRAME_OVERHEAD 16 /* size of minimum stack frame */
74 #define STACK_FRAME_LR_SAVE 1 /* Location of LR in stack frame */
75 #define STACK_FRAME_REGS_MARKER ASM_CONST(0x72656773)
76 #define STACK_INT_FRAME_SIZE (sizeof(struct pt_regs) + STACK_FRAME_OVERHEAD)
77 #define STACK_FRAME_MARKER 2
79 /* Size of stack frame allocated when calling signal handler. */
80 #define __SIGNAL_FRAMESIZE 64
82 #endif /* __powerpc64__ */
86 #define GET_IP(regs) ((regs)->nip)
87 #define GET_USP(regs) ((regs)->gpr[1])
88 #define GET_FP(regs) (0)
89 #define SET_FP(regs, val)
92 extern unsigned long profile_pc(struct pt_regs *regs);
93 #define profile_pc profile_pc
96 #include <asm-generic/ptrace.h>
98 #define kernel_stack_pointer(regs) ((regs)->gpr[1])
99 static inline int is_syscall_success(struct pt_regs *regs)
101 return !(regs->ccr & 0x10000000);
104 static inline long regs_return_value(struct pt_regs *regs)
106 if (is_syscall_success(regs))
109 return -regs->gpr[3];
113 #define user_mode(regs) ((((regs)->msr) >> MSR_PR_LG) & 0x1)
115 #define user_mode(regs) (((regs)->msr & MSR_PR) != 0)
118 #define force_successful_syscall_return() \
120 set_thread_flag(TIF_NOERROR); \
124 extern unsigned long ptrace_get_reg(struct task_struct *task, int regno);
125 extern int ptrace_put_reg(struct task_struct *task, int regno,
128 #define current_pt_regs() \
129 ((struct pt_regs *)((unsigned long)current_thread_info() + THREAD_SIZE) - 1)
131 * We use the least-significant bit of the trap field to indicate
132 * whether we have saved the full set of registers, or only a
133 * partial set. A 1 there means the partial set.
134 * On 4xx we use the next bit to indicate whether the exception
135 * is a critical exception (1 means it is).
137 #define FULL_REGS(regs) (((regs)->trap & 1) == 0)
138 #ifndef __powerpc64__
139 #define IS_CRITICAL_EXC(regs) (((regs)->trap & 2) != 0)
140 #define IS_MCHECK_EXC(regs) (((regs)->trap & 4) != 0)
141 #define IS_DEBUG_EXC(regs) (((regs)->trap & 8) != 0)
142 #endif /* ! __powerpc64__ */
143 #define TRAP(regs) ((regs)->trap & ~0xF)
145 #define NV_REG_POISON 0xdeadbeefdeadbeefUL
146 #define CHECK_FULL_REGS(regs) BUG_ON(regs->trap & 1)
148 #define NV_REG_POISON 0xdeadbeef
149 #define CHECK_FULL_REGS(regs) \
151 if ((regs)->trap & 1) \
152 printk(KERN_CRIT "%s: partial register set\n", __func__); \
154 #endif /* __powerpc64__ */
156 #define arch_has_single_step() (1)
157 #define arch_has_block_step() (!cpu_has_feature(CPU_FTR_601))
158 #define ARCH_HAS_USER_SINGLE_STEP_INFO
161 * kprobe-based event tracer support
164 #include <linux/stddef.h>
165 #include <linux/thread_info.h>
166 extern int regs_query_register_offset(const char *name);
167 extern const char *regs_query_register_name(unsigned int offset);
168 #define MAX_REG_OFFSET (offsetof(struct pt_regs, dsisr))
171 * regs_get_register() - get register value from its offset
172 * @regs: pt_regs from which register value is gotten
173 * @offset: offset number of the register.
175 * regs_get_register returns the value of a register whose offset from @regs.
176 * The @offset is the offset of the register in struct pt_regs.
177 * If @offset is bigger than MAX_REG_OFFSET, this returns 0.
179 static inline unsigned long regs_get_register(struct pt_regs *regs,
182 if (unlikely(offset > MAX_REG_OFFSET))
184 return *(unsigned long *)((unsigned long)regs + offset);
188 * regs_within_kernel_stack() - check the address in the stack
189 * @regs: pt_regs which contains kernel stack pointer.
190 * @addr: address which is checked.
192 * regs_within_kernel_stack() checks @addr is within the kernel stack page(s).
193 * If @addr is within the kernel stack, it returns true. If not, returns false.
196 static inline bool regs_within_kernel_stack(struct pt_regs *regs,
199 return ((addr & ~(THREAD_SIZE - 1)) ==
200 (kernel_stack_pointer(regs) & ~(THREAD_SIZE - 1)));
204 * regs_get_kernel_stack_nth() - get Nth entry of the stack
205 * @regs: pt_regs which contains kernel stack pointer.
206 * @n: stack entry number.
208 * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which
209 * is specified by @regs. If the @n th entry is NOT in the kernel stack,
212 static inline unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs,
215 unsigned long *addr = (unsigned long *)kernel_stack_pointer(regs);
217 if (regs_within_kernel_stack(regs, (unsigned long)addr))
223 #endif /* __ASSEMBLY__ */
225 #endif /* __KERNEL__ */
228 * Offsets used by 'ptrace' system call interface.
229 * These can't be changed without breaking binary compatibility
267 #define PT_ORIG_R3 34
272 #ifndef __powerpc64__
281 #define PT_REGS_COUNT 44
283 #define PT_FPR0 48 /* each FP reg occupies 2 slots in this space */
285 #ifndef __powerpc64__
287 #define PT_FPR31 (PT_FPR0 + 2*31)
288 #define PT_FPSCR (PT_FPR0 + 2*32 + 1)
290 #else /* __powerpc64__ */
292 #define PT_FPSCR (PT_FPR0 + 32) /* each FP reg occupies 1 slot in 64-bit space */
295 #define PT_FPSCR32 (PT_FPR0 + 2*32 + 1) /* each FP reg occupies 2 32-bit userspace slots */
298 #define PT_VR0 82 /* each Vector reg occupies 2 slots in 64-bit */
299 #define PT_VSCR (PT_VR0 + 32*2 + 1)
300 #define PT_VRSAVE (PT_VR0 + 33*2)
303 #define PT_VR0_32 164 /* each Vector reg occupies 4 slots in 32-bit */
304 #define PT_VSCR_32 (PT_VR0 + 32*4 + 3)
305 #define PT_VRSAVE_32 (PT_VR0 + 33*4)
309 * Only store first 32 VSRs here. The second 32 VSRs in VR0-31
311 #define PT_VSR0 150 /* each VSR reg occupies 2 slots in 64-bit */
312 #define PT_VSR31 (PT_VSR0 + 2*31)
314 #define PT_VSR0_32 300 /* each VSR reg occupies 4 slots in 32-bit */
316 #endif /* __powerpc64__ */
319 * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
320 * The transfer totals 34 quadword. Quadwords 0-31 contain the
321 * corresponding vector registers. Quadword 32 contains the vscr as the
322 * last word (offset 12) within that quadword. Quadword 33 contains the
323 * vrsave as the first word (offset 0) within the quadword.
325 * This definition of the VMX state is compatible with the current PPC32
326 * ptrace interface. This allows signal handling and ptrace to use the same
327 * structures. This also simplifies the implementation of a bi-arch
328 * (combined (32- and 64-bit) gdb.
330 #define PTRACE_GETVRREGS 18
331 #define PTRACE_SETVRREGS 19
333 /* Get/set all the upper 32-bits of the SPE registers, accumulator, and
334 * spefscr, in one go */
335 #define PTRACE_GETEVRREGS 20
336 #define PTRACE_SETEVRREGS 21
338 /* Get the first 32 128bit VSX registers */
339 #define PTRACE_GETVSRREGS 27
340 #define PTRACE_SETVSRREGS 28
343 * Get or set a debug register. The first 16 are DABR registers and the
344 * second 16 are IABR registers.
346 #define PTRACE_GET_DEBUGREG 25
347 #define PTRACE_SET_DEBUGREG 26
349 /* (new) PTRACE requests using the same numbers as x86 and the same
350 * argument ordering. Additionally, they support more registers too
352 #define PTRACE_GETREGS 12
353 #define PTRACE_SETREGS 13
354 #define PTRACE_GETFPREGS 14
355 #define PTRACE_SETFPREGS 15
356 #define PTRACE_GETREGS64 22
357 #define PTRACE_SETREGS64 23
359 /* Calls to trace a 64bit program from a 32bit program */
360 #define PPC_PTRACE_PEEKTEXT_3264 0x95
361 #define PPC_PTRACE_PEEKDATA_3264 0x94
362 #define PPC_PTRACE_POKETEXT_3264 0x93
363 #define PPC_PTRACE_POKEDATA_3264 0x92
364 #define PPC_PTRACE_PEEKUSR_3264 0x91
365 #define PPC_PTRACE_POKEUSR_3264 0x90
367 #define PTRACE_SINGLEBLOCK 0x100 /* resume execution until next branch */
369 #define PPC_PTRACE_GETHWDBGINFO 0x89
370 #define PPC_PTRACE_SETHWDEBUG 0x88
371 #define PPC_PTRACE_DELHWDEBUG 0x87
375 struct ppc_debug_info {
376 __u32 version; /* Only version 1 exists to date */
377 __u32 num_instruction_bps;
379 __u32 num_condition_regs;
380 __u32 data_bp_alignment;
381 __u32 sizeof_condition; /* size of the DVC register */
385 #endif /* __ASSEMBLY__ */
388 * features will have bits indication whether there is support for:
390 #define PPC_DEBUG_FEATURE_INSN_BP_RANGE 0x0000000000000001
391 #define PPC_DEBUG_FEATURE_INSN_BP_MASK 0x0000000000000002
392 #define PPC_DEBUG_FEATURE_DATA_BP_RANGE 0x0000000000000004
393 #define PPC_DEBUG_FEATURE_DATA_BP_MASK 0x0000000000000008
397 struct ppc_hw_breakpoint {
398 __u32 version; /* currently, version must be 1 */
399 __u32 trigger_type; /* only some combinations allowed */
400 __u32 addr_mode; /* address match mode */
401 __u32 condition_mode; /* break/watchpoint condition flags */
402 __u64 addr; /* break/watchpoint address */
403 __u64 addr2; /* range end or mask */
404 __u64 condition_value; /* contents of the DVC register */
407 #endif /* __ASSEMBLY__ */
412 #define PPC_BREAKPOINT_TRIGGER_EXECUTE 0x00000001
413 #define PPC_BREAKPOINT_TRIGGER_READ 0x00000002
414 #define PPC_BREAKPOINT_TRIGGER_WRITE 0x00000004
415 #define PPC_BREAKPOINT_TRIGGER_RW \
416 (PPC_BREAKPOINT_TRIGGER_READ | PPC_BREAKPOINT_TRIGGER_WRITE)
421 #define PPC_BREAKPOINT_MODE_EXACT 0x00000000
422 #define PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE 0x00000001
423 #define PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE 0x00000002
424 #define PPC_BREAKPOINT_MODE_MASK 0x00000003
429 #define PPC_BREAKPOINT_CONDITION_MODE 0x00000003
430 #define PPC_BREAKPOINT_CONDITION_NONE 0x00000000
431 #define PPC_BREAKPOINT_CONDITION_AND 0x00000001
432 #define PPC_BREAKPOINT_CONDITION_EXACT PPC_BREAKPOINT_CONDITION_AND
433 #define PPC_BREAKPOINT_CONDITION_OR 0x00000002
434 #define PPC_BREAKPOINT_CONDITION_AND_OR 0x00000003
435 #define PPC_BREAKPOINT_CONDITION_BE_ALL 0x00ff0000
436 #define PPC_BREAKPOINT_CONDITION_BE_SHIFT 16
437 #define PPC_BREAKPOINT_CONDITION_BE(n) \
438 (1<<((n)+PPC_BREAKPOINT_CONDITION_BE_SHIFT))
440 #endif /* _ASM_POWERPC_PTRACE_H */