arch/powerpc/boot/dts/p2020ds.dts

   1 /*
   2  * P2020 DS Device Tree Source
   3  *
   4  * Copyright 2009-2011 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /include/ "p2020si.dtsi"
  13
  14 / {
  15         model = "fsl,P2020DS";
  16         compatible = "fsl,P2020DS";
  17
  18         aliases {
  19                 ethernet0 = &enet0;
  20                 ethernet1 = &enet1;
  21                 ethernet2 = &enet2;
  22                 serial0 = &serial0;
  23                 serial1 = &serial1;
  24                 pci0 = &pci0;
  25                 pci1 = &pci1;
  26                 pci2 = &pci2;
  27         };
  28
  29
  30         memory {
  31                 device_type = "memory";
  32         };
  33
  34         localbus@ffe05000 {
  35                 compatible = "fsl,elbc", "simple-bus";
  36                 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
  37                           0x1 0x0 0x0 0xe0000000 0x08000000
  38                           0x2 0x0 0x0 0xffa00000 0x00040000
  39                           0x3 0x0 0x0 0xffdf0000 0x00008000
  40                           0x4 0x0 0x0 0xffa40000 0x00040000
  41                           0x5 0x0 0x0 0xffa80000 0x00040000
  42                           0x6 0x0 0x0 0xffac0000 0x00040000>;
  43
  44                 nor@0,0 {
  45                         #address-cells = <1>;
  46                         #size-cells = <1>;
  47                         compatible = "cfi-flash";
  48                         reg = <0x0 0x0 0x8000000>;
  49                         bank-width = <2>;
  50                         device-width = <1>;
  51
  52                         ramdisk@0 {
  53                                 reg = <0x0 0x03000000>;
  54                                 read-only;
  55                         };
  56
  57                         diagnostic@3000000 {
  58                                 reg = <0x03000000 0x00e00000>;
  59                                 read-only;
  60                         };
  61
  62                         dink@3e00000 {
  63                                 reg = <0x03e00000 0x00200000>;
  64                                 read-only;
  65                         };
  66
  67                         kernel@4000000 {
  68                                 reg = <0x04000000 0x00400000>;
  69                                 read-only;
  70                         };
  71
  72                         jffs2@4400000 {
  73                                 reg = <0x04400000 0x03b00000>;
  74                         };
  75
  76                         dtb@7f00000 {
  77                                 reg = <0x07f00000 0x00080000>;
  78                                 read-only;
  79                         };
  80
  81                         u-boot@7f80000 {
  82                                 reg = <0x07f80000 0x00080000>;
  83                                 read-only;
  84                         };
  85                 };
  86
  87                 nand@2,0 {
  88                         #address-cells = <1>;
  89                         #size-cells = <1>;
  90                         compatible = "fsl,elbc-fcm-nand";
  91                         reg = <0x2 0x0 0x40000>;
  92
  93                         u-boot@0 {
  94                                 reg = <0x0 0x02000000>;
  95                                 read-only;
  96                         };
  97
  98                         jffs2@2000000 {
  99                                 reg = <0x02000000 0x10000000>;
 100                         };
 101
 102                         ramdisk@12000000 {
 103                                 reg = <0x12000000 0x08000000>;
 104                                 read-only;
 105                         };
 106
 107                         kernel@1a000000 {
 108                                 reg = <0x1a000000 0x04000000>;
 109                         };
 110
 111                         dtb@1e000000 {
 112                                 reg = <0x1e000000 0x01000000>;
 113                                 read-only;
 114                         };
 115
 116                         empty@1f000000 {
 117                                 reg = <0x1f000000 0x21000000>;
 118                         };
 119                 };
 120
 121                 nand@4,0 {
 122                         compatible = "fsl,elbc-fcm-nand";
 123                         reg = <0x4 0x0 0x40000>;
 124                 };
 125
 126                 nand@5,0 {
 127                         compatible = "fsl,elbc-fcm-nand";
 128                         reg = <0x5 0x0 0x40000>;
 129                 };
 130
 131                 nand@6,0 {
 132                         compatible = "fsl,elbc-fcm-nand";
 133                         reg = <0x6 0x0 0x40000>;
 134                 };
 135         };
 136
 137         soc@ffe00000 {
 138
 139                 usb@22000 {
 140                         phy_type = "ulpi";
 141                 };
 142
 143                 mdio@24520 {
 144                         phy0: ethernet-phy@0 {
 145                                 interrupt-parent = <&mpic>;
 146                                 interrupts = <3 1>;
 147                                 reg = <0x0>;
 148                         };
 149                         phy1: ethernet-phy@1 {
 150                                 interrupt-parent = <&mpic>;
 151                                 interrupts = <3 1>;
 152                                 reg = <0x1>;
 153                         };
 154                         phy2: ethernet-phy@2 {
 155                                 interrupt-parent = <&mpic>;
 156                                 interrupts = <3 1>;
 157                                 reg = <0x2>;
 158                         };
 159                         tbi0: tbi-phy@11 {
 160                                 reg = <0x11>;
 161                                 device_type = "tbi-phy";
 162                         };
 163
 164                 };
 165
 166                 mdio@25520 {
 167                         tbi1: tbi-phy@11 {
 168                                 reg = <0x11>;
 169                                 device_type = "tbi-phy";
 170                         };
 171                 };
 172
 173                 mdio@26520 {
 174                         tbi2: tbi-phy@11 {
 175                                 reg = <0x11>;
 176                                 device_type = "tbi-phy";
 177                         };
 178
 179                 };
 180
 181                 enet0: ethernet@24000 {
 182                         tbi-handle = <&tbi0>;
 183                         phy-handle = <&phy0>;
 184                         phy-connection-type = "rgmii-id";
 185                 };
 186
 187                 enet1: ethernet@25000 {
 188                         tbi-handle = <&tbi1>;
 189                         phy-handle = <&phy1>;
 190                         phy-connection-type = "rgmii-id";
 191
 192                 };
 193
 194                 enet2: ethernet@26000 {
 195                         tbi-handle = <&tbi2>;
 196                         phy-handle = <&phy2>;
 197                         phy-connection-type = "rgmii-id";
 198                 };
 199
 200
 201                 msi@41600 {
 202                         compatible = "fsl,mpic-msi";
 203                 };
 204         };
 205
 206         pci0: pcie@ffe08000 {
 207                 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
 208                           0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
 209                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 210                 interrupt-map = <
 211                         /* IDSEL 0x0 */
 212                         0000 0x0 0x0 0x1 &mpic 0x8 0x1
 213                         0000 0x0 0x0 0x2 &mpic 0x9 0x1
 214                         0000 0x0 0x0 0x3 &mpic 0xa 0x1
 215                         0000 0x0 0x0 0x4 &mpic 0xb 0x1
 216                         >;
 217                 pcie@0 {
 218                         reg = <0x0 0x0 0x0 0x0 0x0>;
 219                         #size-cells = <2>;
 220                         #address-cells = <3>;
 221                         device_type = "pci";
 222                         ranges = <0x2000000 0x0 0x80000000
 223                                   0x2000000 0x0 0x80000000
 224                                   0x0 0x20000000
 225
 226                                   0x1000000 0x0 0x0
 227                                   0x1000000 0x0 0x0
 228                                   0x0 0x10000>;
 229                 };
 230         };
 231
 232         pci1: pcie@ffe09000 {
 233                 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
 234                           0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
 235                 interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
 236                 interrupt-map = <
 237
 238                         // IDSEL 0x11 func 0 - PCI slot 1
 239                         0x8800 0x0 0x0 0x1 &i8259 0x9 0x2
 240                         0x8800 0x0 0x0 0x2 &i8259 0xa 0x2
 241
 242                         // IDSEL 0x11 func 1 - PCI slot 1
 243                         0x8900 0x0 0x0 0x1 &i8259 0x9 0x2
 244                         0x8900 0x0 0x0 0x2 &i8259 0xa 0x2
 245
 246                         // IDSEL 0x11 func 2 - PCI slot 1
 247                         0x8a00 0x0 0x0 0x1 &i8259 0x9 0x2
 248                         0x8a00 0x0 0x0 0x2 &i8259 0xa 0x2
 249
 250                         // IDSEL 0x11 func 3 - PCI slot 1
 251                         0x8b00 0x0 0x0 0x1 &i8259 0x9 0x2
 252                         0x8b00 0x0 0x0 0x2 &i8259 0xa 0x2
 253
 254                         // IDSEL 0x11 func 4 - PCI slot 1
 255                         0x8c00 0x0 0x0 0x1 &i8259 0x9 0x2
 256                         0x8c00 0x0 0x0 0x2 &i8259 0xa 0x2
 257
 258                         // IDSEL 0x11 func 5 - PCI slot 1
 259                         0x8d00 0x0 0x0 0x1 &i8259 0x9 0x2
 260                         0x8d00 0x0 0x0 0x2 &i8259 0xa 0x2
 261
 262                         // IDSEL 0x11 func 6 - PCI slot 1
 263                         0x8e00 0x0 0x0 0x1 &i8259 0x9 0x2
 264                         0x8e00 0x0 0x0 0x2 &i8259 0xa 0x2
 265
 266                         // IDSEL 0x11 func 7 - PCI slot 1
 267                         0x8f00 0x0 0x0 0x1 &i8259 0x9 0x2
 268                         0x8f00 0x0 0x0 0x2 &i8259 0xa 0x2
 269
 270                         // IDSEL 0x1d  Audio
 271                         0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
 272
 273                         // IDSEL 0x1e Legacy
 274                         0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
 275                         0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
 276
 277                         // IDSEL 0x1f IDE/SATA
 278                         0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
 279                         0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
 280                         >;
 281
 282                 pcie@0 {
 283                         reg = <0x0 0x0 0x0 0x0 0x0>;
 284                         #size-cells = <2>;
 285                         #address-cells = <3>;
 286                         device_type = "pci";
 287                         ranges = <0x2000000 0x0 0xa0000000
 288                                   0x2000000 0x0 0xa0000000
 289                                   0x0 0x20000000
 290
 291                                   0x1000000 0x0 0x0
 292                                   0x1000000 0x0 0x0
 293                                   0x0 0x10000>;
 294                         uli1575@0 {
 295                                 reg = <0x0 0x0 0x0 0x0 0x0>;
 296                                 #size-cells = <2>;
 297                                 #address-cells = <3>;
 298                                 ranges = <0x2000000 0x0 0xa0000000
 299                                           0x2000000 0x0 0xa0000000
 300                                           0x0 0x20000000
 301
 302                                           0x1000000 0x0 0x0
 303                                           0x1000000 0x0 0x0
 304                                           0x0 0x10000>;
 305                                 isa@1e {
 306                                         device_type = "isa";
 307                                         #interrupt-cells = <2>;
 308                                         #size-cells = <1>;
 309                                         #address-cells = <2>;
 310                                         reg = <0xf000 0x0 0x0 0x0 0x0>;
 311                                         ranges = <0x1 0x0 0x1000000 0x0 0x0
 312                                                   0x1000>;
 313                                         interrupt-parent = <&i8259>;
 314
 315                                         i8259: interrupt-controller@20 {
 316                                                 reg = <0x1 0x20 0x2
 317                                                        0x1 0xa0 0x2
 318                                                        0x1 0x4d0 0x2>;
 319                                                 interrupt-controller;
 320                                                 device_type = "interrupt-controller";
 321                                                 #address-cells = <0>;
 322                                                 #interrupt-cells = <2>;
 323                                                 compatible = "chrp,iic";
 324                                                 interrupts = <4 1>;
 325                                                 interrupt-parent = <&mpic>;
 326                                         };
 327
 328                                         i8042@60 {
 329                                                 #size-cells = <0>;
 330                                                 #address-cells = <1>;
 331                                                 reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
 332                                                 interrupts = <1 3 12 3>;
 333                                                 interrupt-parent =
 334                                                         <&i8259>;
 335
 336                                                 keyboard@0 {
 337                                                         reg = <0x0>;
 338                                                         compatible = "pnpPNP,303";
 339                                                 };
 340
 341                                                 mouse@1 {
 342                                                         reg = <0x1>;
 343                                                         compatible = "pnpPNP,f03";
 344                                                 };
 345                                         };
 346
 347                                         rtc@70 {
 348                                                 compatible = "pnpPNP,b00";
 349                                                 reg = <0x1 0x70 0x2>;
 350                                         };
 351
 352                                         gpio@400 {
 353                                                 reg = <0x1 0x400 0x80>;
 354                                         };
 355                                 };
 356                         };
 357                 };
 358
 359         };
 360
 361         pci2: pcie@ffe0a000 {
 362                 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
 363                           0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
 364                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 365                 interrupt-map = <
 366                         /* IDSEL 0x0 */
 367                         0000 0x0 0x0 0x1 &mpic 0x0 0x1
 368                         0000 0x0 0x0 0x2 &mpic 0x1 0x1
 369                         0000 0x0 0x0 0x3 &mpic 0x2 0x1
 370                         0000 0x0 0x0 0x4 &mpic 0x3 0x1
 371                         >;
 372                 pcie@0 {
 373                         reg = <0x0 0x0 0x0 0x0 0x0>;
 374                         #size-cells = <2>;
 375                         #address-cells = <3>;
 376                         device_type = "pci";
 377                         ranges = <0x2000000 0x0 0xc0000000
 378                                   0x2000000 0x0 0xc0000000
 379                                   0x0 0x20000000
 380
 381                                   0x1000000 0x0 0x0
 382                                   0x1000000 0x0 0x0
 383                                   0x0 0x10000>;
 384                 };
 385         };
 386 };