arch/powerpc/boot/dts/mpc885ads.dts

   1 /*
   2  * MPC885 ADS Device Tree Source
   3  *
   4  * Copyright 2006 MontaVista Software, Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12
  13 / {
  14         model = "MPC885ADS";
  15         compatible = "mpc8xx";
  16         #address-cells = <1>;
  17         #size-cells = <1>;
  18
  19         cpus {
  20                 #address-cells = <1>;
  21                 #size-cells = <0>;
  22
  23                 PowerPC,885@0 {
  24                         device_type = "cpu";
  25                         reg = <0>;
  26                         d-cache-line-size = <20>;       // 32 bytes
  27                         i-cache-line-size = <20>;       // 32 bytes
  28                         d-cache-size = <2000>;          // L1, 8K
  29                         i-cache-size = <2000>;          // L1, 8K
  30                         timebase-frequency = <0>;
  31                         bus-frequency = <0>;
  32                         clock-frequency = <0>;
  33                         interrupts = <f 2>;     // decrementer interrupt
  34                         interrupt-parent = <&Mpc8xx_pic>;
  35                 };
  36         };
  37
  38         memory {
  39                 device_type = "memory";
  40                 reg = <00000000 800000>;
  41         };
  42
  43         soc885@ff000000 {
  44                 #address-cells = <1>;
  45                 #size-cells = <1>;
  46                 device_type = "soc";
  47                 ranges = <0 ff000000 00100000>;
  48                 reg = <ff000000 00000200>;
  49                 bus-frequency = <0>;
  50                 mdio@e80 {
  51                         device_type = "mdio";
  52                         compatible = "fs_enet";
  53                         reg = <e80 8>;
  54                         #address-cells = <1>;
  55                         #size-cells = <0>;
  56                         Phy0: ethernet-phy@0 {
  57                                 reg = <0>;
  58                                 device_type = "ethernet-phy";
  59                         };
  60                         Phy1: ethernet-phy@1 {
  61                                 reg = <1>;
  62                                 device_type = "ethernet-phy";
  63                         };
  64                         Phy2: ethernet-phy@2 {
  65                                 reg = <2>;
  66                                 device_type = "ethernet-phy";
  67                         };
  68                 };
  69
  70                 fec@e00 {
  71                         device_type = "network";
  72                         compatible = "fs_enet";
  73                         model = "FEC";
  74                         device-id = <1>;
  75                         reg = <e00 188>;
  76                         mac-address = [ 00 00 0C 00 01 FD ];
  77                         interrupts = <3 1>;
  78                         interrupt-parent = <&Mpc8xx_pic>;
  79                         phy-handle = <&Phy1>;
  80                 };
  81
  82                 fec@1e00 {
  83                         device_type = "network";
  84                         compatible = "fs_enet";
  85                         model = "FEC";
  86                         device-id = <2>;
  87                         reg = <1e00 188>;
  88                         mac-address = [ 00 00 0C 00 02 FD ];
  89                         interrupts = <7 1>;
  90                         interrupt-parent = <&Mpc8xx_pic>;
  91                         phy-handle = <&Phy2>;
  92                 };
  93
  94                 Mpc8xx_pic: pic@ff000000 {
  95                         interrupt-controller;
  96                         #address-cells = <0>;
  97                         #interrupt-cells = <2>;
  98                         reg = <0 24>;
  99                         device_type = "mpc8xx-pic";
 100                         compatible = "CPM";
 101                 };
 102
 103                 pcmcia@0080 {
 104                         #address-cells = <3>;
 105                         #interrupt-cells = <1>;
 106                         #size-cells = <2>;
 107                         compatible = "fsl,pq-pcmcia";
 108                         device_type = "pcmcia";
 109                         reg = <80 80>;
 110                         interrupt-parent = <&Mpc8xx_pic>;
 111                         interrupts = <d 1>;
 112                 };
 113
 114                 cpm@ff000000 {
 115                         #address-cells = <1>;
 116                         #size-cells = <1>;
 117                         device_type = "cpm";
 118                         model = "CPM";
 119                         ranges = <0 0 4000>;
 120                         reg = <860 f0>;
 121                         command-proc = <9c0>;
 122                         brg-frequency = <0>;
 123                         interrupts = <0 2>;     // cpm error interrupt
 124                         interrupt-parent = <&Cpm_pic>;
 125
 126                         Cpm_pic: pic@930 {
 127                                 interrupt-controller;
 128                                 #address-cells = <0>;
 129                                 #interrupt-cells = <2>;
 130                                 interrupts = <5 2 0 2>;
 131                                 interrupt-parent = <&Mpc8xx_pic>;
 132                                 reg = <930 20>;
 133                                 device_type = "cpm-pic";
 134                                 compatible = "CPM";
 135                         };
 136
 137                         smc@a80 {
 138                                 device_type = "serial";
 139                                 compatible = "cpm_uart";
 140                                 model = "SMC";
 141                                 device-id = <1>;
 142                                 reg = <a80 10 3e80 40>;
 143                                 clock-setup = <00ffffff 0>;
 144                                 rx-clock = <1>;
 145                                 tx-clock = <1>;
 146                                 current-speed = <0>;
 147                                 interrupts = <4 3>;
 148                                 interrupt-parent = <&Cpm_pic>;
 149                         };
 150
 151                         smc@a90 {
 152                                 device_type = "serial";
 153                                 compatible = "cpm_uart";
 154                                 model = "SMC";
 155                                 device-id = <2>;
 156                                 reg = <a90 20 3f80 40>;
 157                                 clock-setup = <ff00ffff 90000>;
 158                                 rx-clock = <2>;
 159                                 tx-clock = <2>;
 160                                 current-speed = <0>;
 161                                 interrupts = <3 3>;
 162                                 interrupt-parent = <&Cpm_pic>;
 163                         };
 164
 165                         scc@a40 {
 166                                 device_type = "network";
 167                                 compatible = "fs_enet";
 168                                 model = "SCC";
 169                                 device-id = <3>;
 170                                 reg = <a40 18 3e00 80>;
 171                                 mac-address = [ 00 00 0C 00 03 FD ];
 172                                 interrupts = <1c 3>;
 173                                 interrupt-parent = <&Cpm_pic>;
 174                                 phy-handle = <&Phy2>;
 175                         };
 176                 };
 177         };
 178 };