arch/powerpc/boot/dts/mpc8641_hpcn.dts

   1 /*
   2  * MPC8641 HPCN Device Tree Source
   3  *
   4  * Copyright 2006 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12
  13 / {
  14         model = "MPC8641HPCN";
  15         compatible = "mpc86xx";
  16         #address-cells = <1>;
  17         #size-cells = <1>;
  18
  19         aliases {
  20                 ethernet0 = &enet0;
  21                 ethernet1 = &enet1;
  22                 ethernet2 = &enet2;
  23                 ethernet3 = &enet3;
  24                 serial0 = &serial0;
  25                 serial1 = &serial1;
  26                 pci0 = &pci0;
  27                 pci1 = &pci1;
  28         };
  29
  30         cpus {
  31                 #address-cells = <1>;
  32                 #size-cells = <0>;
  33
  34                 PowerPC,8641@0 {
  35                         device_type = "cpu";
  36                         reg = <0>;
  37                         d-cache-line-size = <20>;       // 32 bytes
  38                         i-cache-line-size = <20>;       // 32 bytes
  39                         d-cache-size = <8000>;          // L1, 32K
  40                         i-cache-size = <8000>;          // L1, 32K
  41                         timebase-frequency = <0>;       // 33 MHz, from uboot
  42                         bus-frequency = <0>;            // From uboot
  43                         clock-frequency = <0>;          // From uboot
  44                 };
  45                 PowerPC,8641@1 {
  46                         device_type = "cpu";
  47                         reg = <1>;
  48                         d-cache-line-size = <20>;       // 32 bytes
  49                         i-cache-line-size = <20>;       // 32 bytes
  50                         d-cache-size = <8000>;          // L1, 32K
  51                         i-cache-size = <8000>;          // L1, 32K
  52                         timebase-frequency = <0>;       // 33 MHz, from uboot
  53                         bus-frequency = <0>;            // From uboot
  54                         clock-frequency = <0>;          // From uboot
  55                 };
  56         };
  57
  58         memory {
  59                 device_type = "memory";
  60                 reg = <00000000 40000000>;      // 1G at 0x0
  61         };
  62
  63         localbus@f8005000 {
  64                 #address-cells = <2>;
  65                 #size-cells = <1>;
  66                 compatible = "fsl,mpc8641-localbus", "simple-bus";
  67                 reg = <f8005000 1000>;
  68                 interrupts = <13 2>;
  69                 interrupt-parent = <&mpic>;
  70
  71                 ranges = <0 0 ff800000 00800000
  72                           1 0 fe000000 01000000
  73                           2 0 f8200000 00100000
  74                           3 0 f8100000 00100000>;
  75
  76                 flash@0,0 {
  77                         compatible = "cfi-flash";
  78                         reg = <0 0 00800000>;
  79                         bank-width = <2>;
  80                         device-width = <2>;
  81                         #address-cells = <1>;
  82                         #size-cells = <1>;
  83                         partition@0 {
  84                                 label = "kernel";
  85                                 reg = <00000000 00300000>;
  86                         };
  87                         partition@300000 {
  88                                 label = "firmware b";
  89                                 reg = <00300000 00100000>;
  90                                 read-only;
  91                         };
  92                         partition@400000 {
  93                                 label = "fs";
  94                                 reg = <00400000 00300000>;
  95                         };
  96                         partition@700000 {
  97                                 label = "firmware a";
  98                                 reg = <00700000 00100000>;
  99                                 read-only;
 100                         };
 101                 };
 102         };
 103
 104         soc8641@f8000000 {
 105                 #address-cells = <1>;
 106                 #size-cells = <1>;
 107                 device_type = "soc";
 108                 compatible = "simple-bus";
 109                 ranges = <00000000 f8000000 00100000>;
 110                 reg = <f8000000 00001000>;      // CCSRBAR
 111                 bus-frequency = <0>;
 112
 113                 i2c@3000 {
 114                         #address-cells = <1>;
 115                         #size-cells = <0>;
 116                         cell-index = <0>;
 117                         compatible = "fsl-i2c";
 118                         reg = <3000 100>;
 119                         interrupts = <2b 2>;
 120                         interrupt-parent = <&mpic>;
 121                         dfsrr;
 122                 };
 123
 124                 i2c@3100 {
 125                         #address-cells = <1>;
 126                         #size-cells = <0>;
 127                         cell-index = <1>;
 128                         compatible = "fsl-i2c";
 129                         reg = <3100 100>;
 130                         interrupts = <2b 2>;
 131                         interrupt-parent = <&mpic>;
 132                         dfsrr;
 133                 };
 134
 135                 mdio@24520 {
 136                         #address-cells = <1>;
 137                         #size-cells = <0>;
 138                         compatible = "fsl,gianfar-mdio";
 139                         reg = <24520 20>;
 140
 141                         phy0: ethernet-phy@0 {
 142                                 interrupt-parent = <&mpic>;
 143                                 interrupts = <a 1>;
 144                                 reg = <0>;
 145                                 device_type = "ethernet-phy";
 146                         };
 147                         phy1: ethernet-phy@1 {
 148                                 interrupt-parent = <&mpic>;
 149                                 interrupts = <a 1>;
 150                                 reg = <1>;
 151                                 device_type = "ethernet-phy";
 152                         };
 153                         phy2: ethernet-phy@2 {
 154                                 interrupt-parent = <&mpic>;
 155                                 interrupts = <a 1>;
 156                                 reg = <2>;
 157                                 device_type = "ethernet-phy";
 158                         };
 159                         phy3: ethernet-phy@3 {
 160                                 interrupt-parent = <&mpic>;
 161                                 interrupts = <a 1>;
 162                                 reg = <3>;
 163                                 device_type = "ethernet-phy";
 164                         };
 165                 };
 166
 167                 enet0: ethernet@24000 {
 168                         cell-index = <0>;
 169                         device_type = "network";
 170                         model = "TSEC";
 171                         compatible = "gianfar";
 172                         reg = <24000 1000>;
 173                         local-mac-address = [ 00 00 00 00 00 00 ];
 174                         interrupts = <1d 2 1e 2 22 2>;
 175                         interrupt-parent = <&mpic>;
 176                         phy-handle = <&phy0>;
 177                         phy-connection-type = "rgmii-id";
 178                 };
 179
 180                 enet1: ethernet@25000 {
 181                         cell-index = <1>;
 182                         device_type = "network";
 183                         model = "TSEC";
 184                         compatible = "gianfar";
 185                         reg = <25000 1000>;
 186                         local-mac-address = [ 00 00 00 00 00 00 ];
 187                         interrupts = <23 2 24 2 28 2>;
 188                         interrupt-parent = <&mpic>;
 189                         phy-handle = <&phy1>;
 190                         phy-connection-type = "rgmii-id";
 191                 };
 192
 193                 enet2: ethernet@26000 {
 194                         cell-index = <2>;
 195                         device_type = "network";
 196                         model = "TSEC";
 197                         compatible = "gianfar";
 198                         reg = <26000 1000>;
 199                         local-mac-address = [ 00 00 00 00 00 00 ];
 200                         interrupts = <1F 2 20 2 21 2>;
 201                         interrupt-parent = <&mpic>;
 202                         phy-handle = <&phy2>;
 203                         phy-connection-type = "rgmii-id";
 204                 };
 205
 206                 enet3: ethernet@27000 {
 207                         cell-index = <3>;
 208                         device_type = "network";
 209                         model = "TSEC";
 210                         compatible = "gianfar";
 211                         reg = <27000 1000>;
 212                         local-mac-address = [ 00 00 00 00 00 00 ];
 213                         interrupts = <25 2 26 2 27 2>;
 214                         interrupt-parent = <&mpic>;
 215                         phy-handle = <&phy3>;
 216                         phy-connection-type = "rgmii-id";
 217                 };
 218
 219                 serial0: serial@4500 {
 220                         cell-index = <0>;
 221                         device_type = "serial";
 222                         compatible = "ns16550";
 223                         reg = <4500 100>;
 224                         clock-frequency = <0>;
 225                         interrupts = <2a 2>;
 226                         interrupt-parent = <&mpic>;
 227                 };
 228
 229                 serial1: serial@4600 {
 230                         cell-index = <1>;
 231                         device_type = "serial";
 232                         compatible = "ns16550";
 233                         reg = <4600 100>;
 234                         clock-frequency = <0>;
 235                         interrupts = <1c 2>;
 236                         interrupt-parent = <&mpic>;
 237                 };
 238
 239                 mpic: pic@40000 {
 240                         clock-frequency = <0>;
 241                         interrupt-controller;
 242                         #address-cells = <0>;
 243                         #interrupt-cells = <2>;
 244                         reg = <40000 40000>;
 245                         compatible = "chrp,open-pic";
 246                         device_type = "open-pic";
 247                         big-endian;
 248                 };
 249
 250                 global-utilities@e0000 {
 251                         compatible = "fsl,mpc8641-guts";
 252                         reg = <e0000 1000>;
 253                         fsl,has-rstcr;
 254                 };
 255         };
 256
 257         pci0: pcie@f8008000 {
 258                 cell-index = <0>;
 259                 compatible = "fsl,mpc8641-pcie";
 260                 device_type = "pci";
 261                 #interrupt-cells = <1>;
 262                 #size-cells = <2>;
 263                 #address-cells = <3>;
 264                 reg = <f8008000 1000>;
 265                 bus-range = <0 ff>;
 266                 ranges = <02000000 0 80000000 80000000 0 20000000
 267                           01000000 0 00000000 e2000000 0 00100000>;
 268                 clock-frequency = <1fca055>;
 269                 interrupt-parent = <&mpic>;
 270                 interrupts = <18 2>;
 271                 interrupt-map-mask = <ff00 0 0 7>;
 272                 interrupt-map = <
 273                         /* IDSEL 0x11 func 0 - PCI slot 1 */
 274                         8800 0 0 1 &mpic 2 1
 275                         8800 0 0 2 &mpic 3 1
 276                         8800 0 0 3 &mpic 4 1
 277                         8800 0 0 4 &mpic 1 1
 278
 279                         /* IDSEL 0x11 func 1 - PCI slot 1 */
 280                         8900 0 0 1 &mpic 2 1
 281                         8900 0 0 2 &mpic 3 1
 282                         8900 0 0 3 &mpic 4 1
 283                         8900 0 0 4 &mpic 1 1
 284
 285                         /* IDSEL 0x11 func 2 - PCI slot 1 */
 286                         8a00 0 0 1 &mpic 2 1
 287                         8a00 0 0 2 &mpic 3 1
 288                         8a00 0 0 3 &mpic 4 1
 289                         8a00 0 0 4 &mpic 1 1
 290
 291                         /* IDSEL 0x11 func 3 - PCI slot 1 */
 292                         8b00 0 0 1 &mpic 2 1
 293                         8b00 0 0 2 &mpic 3 1
 294                         8b00 0 0 3 &mpic 4 1
 295                         8b00 0 0 4 &mpic 1 1
 296
 297                         /* IDSEL 0x11 func 4 - PCI slot 1 */
 298                         8c00 0 0 1 &mpic 2 1
 299                         8c00 0 0 2 &mpic 3 1
 300                         8c00 0 0 3 &mpic 4 1
 301                         8c00 0 0 4 &mpic 1 1
 302
 303                         /* IDSEL 0x11 func 5 - PCI slot 1 */
 304                         8d00 0 0 1 &mpic 2 1
 305                         8d00 0 0 2 &mpic 3 1
 306                         8d00 0 0 3 &mpic 4 1
 307                         8d00 0 0 4 &mpic 1 1
 308
 309                         /* IDSEL 0x11 func 6 - PCI slot 1 */
 310                         8e00 0 0 1 &mpic 2 1
 311                         8e00 0 0 2 &mpic 3 1
 312                         8e00 0 0 3 &mpic 4 1
 313                         8e00 0 0 4 &mpic 1 1
 314
 315                         /* IDSEL 0x11 func 7 - PCI slot 1 */
 316                         8f00 0 0 1 &mpic 2 1
 317                         8f00 0 0 2 &mpic 3 1
 318                         8f00 0 0 3 &mpic 4 1
 319                         8f00 0 0 4 &mpic 1 1
 320
 321                         /* IDSEL 0x12 func 0 - PCI slot 2 */
 322                         9000 0 0 1 &mpic 3 1
 323                         9000 0 0 2 &mpic 4 1
 324                         9000 0 0 3 &mpic 1 1
 325                         9000 0 0 4 &mpic 2 1
 326
 327                         /* IDSEL 0x12 func 1 - PCI slot 2 */
 328                         9100 0 0 1 &mpic 3 1
 329                         9100 0 0 2 &mpic 4 1
 330                         9100 0 0 3 &mpic 1 1
 331                         9100 0 0 4 &mpic 2 1
 332
 333                         /* IDSEL 0x12 func 2 - PCI slot 2 */
 334                         9200 0 0 1 &mpic 3 1
 335                         9200 0 0 2 &mpic 4 1
 336                         9200 0 0 3 &mpic 1 1
 337                         9200 0 0 4 &mpic 2 1
 338
 339                         /* IDSEL 0x12 func 3 - PCI slot 2 */
 340                         9300 0 0 1 &mpic 3 1
 341                         9300 0 0 2 &mpic 4 1
 342                         9300 0 0 3 &mpic 1 1
 343                         9300 0 0 4 &mpic 2 1
 344
 345                         /* IDSEL 0x12 func 4 - PCI slot 2 */
 346                         9400 0 0 1 &mpic 3 1
 347                         9400 0 0 2 &mpic 4 1
 348                         9400 0 0 3 &mpic 1 1
 349                         9400 0 0 4 &mpic 2 1
 350
 351                         /* IDSEL 0x12 func 5 - PCI slot 2 */
 352                         9500 0 0 1 &mpic 3 1
 353                         9500 0 0 2 &mpic 4 1
 354                         9500 0 0 3 &mpic 1 1
 355                         9500 0 0 4 &mpic 2 1
 356
 357                         /* IDSEL 0x12 func 6 - PCI slot 2 */
 358                         9600 0 0 1 &mpic 3 1
 359                         9600 0 0 2 &mpic 4 1
 360                         9600 0 0 3 &mpic 1 1
 361                         9600 0 0 4 &mpic 2 1
 362
 363                         /* IDSEL 0x12 func 7 - PCI slot 2 */
 364                         9700 0 0 1 &mpic 3 1
 365                         9700 0 0 2 &mpic 4 1
 366                         9700 0 0 3 &mpic 1 1
 367                         9700 0 0 4 &mpic 2 1
 368
 369                         // IDSEL 0x1c  USB
 370                         e000 0 0 1 &i8259 c 2
 371                         e100 0 0 2 &i8259 9 2
 372                         e200 0 0 3 &i8259 a 2
 373                         e300 0 0 4 &i8259 b 2
 374
 375                         // IDSEL 0x1d  Audio
 376                         e800 0 0 1 &i8259 6 2
 377
 378                         // IDSEL 0x1e Legacy
 379                         f000 0 0 1 &i8259 7 2
 380                         f100 0 0 1 &i8259 7 2
 381
 382                         // IDSEL 0x1f IDE/SATA
 383                         f800 0 0 1 &i8259 e 2
 384                         f900 0 0 1 &i8259 5 2
 385                         >;
 386
 387                 pcie@0 {
 388                         reg = <0 0 0 0 0>;
 389                         #size-cells = <2>;
 390                         #address-cells = <3>;
 391                         device_type = "pci";
 392                         ranges = <02000000 0 80000000
 393                                   02000000 0 80000000
 394                                   0 20000000
 395
 396                                   01000000 0 00000000
 397                                   01000000 0 00000000
 398                                   0 00100000>;
 399                         uli1575@0 {
 400                                 reg = <0 0 0 0 0>;
 401                                 #size-cells = <2>;
 402                                 #address-cells = <3>;
 403                                 ranges = <02000000 0 80000000
 404                                           02000000 0 80000000
 405                                           0 20000000
 406                                           01000000 0 00000000
 407                                           01000000 0 00000000
 408                                           0 00100000>;
 409                                 isa@1e {
 410                                         device_type = "isa";
 411                                         #interrupt-cells = <2>;
 412                                         #size-cells = <1>;
 413                                         #address-cells = <2>;
 414                                         reg = <f000 0 0 0 0>;
 415                                         ranges = <1 0 01000000 0 0
 416                                                   00001000>;
 417                                         interrupt-parent = <&i8259>;
 418
 419                                         i8259: interrupt-controller@20 {
 420                                                 reg = <1 20 2
 421                                                        1 a0 2
 422                                                        1 4d0 2>;
 423                                                 interrupt-controller;
 424                                                 device_type = "interrupt-controller";
 425                                                 #address-cells = <0>;
 426                                                 #interrupt-cells = <2>;
 427                                                 compatible = "chrp,iic";
 428                                                 interrupts = <9 2>;
 429                                                 interrupt-parent = <&mpic>;
 430                                         };
 431
 432                                         i8042@60 {
 433                                                 #size-cells = <0>;
 434                                                 #address-cells = <1>;
 435                                                 reg = <1 60 1 1 64 1>;
 436                                                 interrupts = <1 3 c 3>;
 437                                                 interrupt-parent =
 438                                                         <&i8259>;
 439
 440                                                 keyboard@0 {
 441                                                         reg = <0>;
 442                                                         compatible = "pnpPNP,303";
 443                                                 };
 444
 445                                                 mouse@1 {
 446                                                         reg = <1>;
 447                                                         compatible = "pnpPNP,f03";
 448                                                 };
 449                                         };
 450
 451                                         rtc@70 {
 452                                                 compatible =
 453                                                         "pnpPNP,b00";
 454                                                 reg = <1 70 2>;
 455                                         };
 456
 457                                         gpio@400 {
 458                                                 reg = <1 400 80>;
 459                                         };
 460                                 };
 461                         };
 462                 };
 463
 464         };
 465
 466         pci1: pcie@f8009000 {
 467                 cell-index = <1>;
 468                 compatible = "fsl,mpc8641-pcie";
 469                 device_type = "pci";
 470                 #interrupt-cells = <1>;
 471                 #size-cells = <2>;
 472                 #address-cells = <3>;
 473                 reg = <f8009000 1000>;
 474                 bus-range = <0 ff>;
 475                 ranges = <02000000 0 a0000000 a0000000 0 20000000
 476                           01000000 0 00000000 e3000000 0 00100000>;
 477                 clock-frequency = <1fca055>;
 478                 interrupt-parent = <&mpic>;
 479                 interrupts = <19 2>;
 480                 interrupt-map-mask = <f800 0 0 7>;
 481                 interrupt-map = <
 482                         /* IDSEL 0x0 */
 483                         0000 0 0 1 &mpic 4 1
 484                         0000 0 0 2 &mpic 5 1
 485                         0000 0 0 3 &mpic 6 1
 486                         0000 0 0 4 &mpic 7 1
 487                         >;
 488                 pcie@0 {
 489                         reg = <0 0 0 0 0>;
 490                         #size-cells = <2>;
 491                         #address-cells = <3>;
 492                         device_type = "pci";
 493                         ranges = <02000000 0 a0000000
 494                                   02000000 0 a0000000
 495                                   0 20000000
 496
 497                                   01000000 0 00000000
 498                                   01000000 0 00000000
 499                                   0 00100000>;
 500                 };
 501         };
 502 };