arch/powerpc/boot/dts/mpc8560ads.dts

   1 /*
   2  * MPC8560 ADS Device Tree Source
   3  *
   4  * Copyright 2006, 2008 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /dts-v1/;
  13
  14 / {
  15         model = "MPC8560ADS";
  16         compatible = "MPC8560ADS", "MPC85xxADS";
  17         #address-cells = <1>;
  18         #size-cells = <1>;
  19
  20         aliases {
  21                 ethernet0 = &enet0;
  22                 ethernet1 = &enet1;
  23                 ethernet2 = &enet2;
  24                 ethernet3 = &enet3;
  25                 serial0 = &serial0;
  26                 serial1 = &serial1;
  27                 pci0 = &pci0;
  28         };
  29
  30         cpus {
  31                 #address-cells = <1>;
  32                 #size-cells = <0>;
  33
  34                 PowerPC,8560@0 {
  35                         device_type = "cpu";
  36                         reg = <0x0>;
  37                         d-cache-line-size = <32>;       // 32 bytes
  38                         i-cache-line-size = <32>;       // 32 bytes
  39                         d-cache-size = <0x8000>;                // L1, 32K
  40                         i-cache-size = <0x8000>;                // L1, 32K
  41                         timebase-frequency = <82500000>;
  42                         bus-frequency = <330000000>;
  43                         clock-frequency = <825000000>;
  44                 };
  45         };
  46
  47         memory {
  48                 device_type = "memory";
  49                 reg = <0x0 0x10000000>;
  50         };
  51
  52         soc8560@e0000000 {
  53                 #address-cells = <1>;
  54                 #size-cells = <1>;
  55                 device_type = "soc";
  56                 compatible = "simple-bus";
  57                 ranges = <0x0 0xe0000000 0x100000>;
  58                 bus-frequency = <330000000>;
  59
  60                 ecm-law@0 {
  61                         compatible = "fsl,ecm-law";
  62                         reg = <0x0 0x1000>;
  63                         fsl,num-laws = <8>;
  64                 };
  65
  66                 ecm@1000 {
  67                         compatible = "fsl,mpc8560-ecm", "fsl,ecm";
  68                         reg = <0x1000 0x1000>;
  69                         interrupts = <17 2>;
  70                         interrupt-parent = <&mpic>;
  71                 };
  72
  73                 memory-controller@2000 {
  74                         compatible = "fsl,mpc8540-memory-controller";
  75                         reg = <0x2000 0x1000>;
  76                         interrupt-parent = <&mpic>;
  77                         interrupts = <18 2>;
  78                 };
  79
  80                 L2: l2-cache-controller@20000 {
  81                         compatible = "fsl,mpc8540-l2-cache-controller";
  82                         reg = <0x20000 0x1000>;
  83                         cache-line-size = <32>; // 32 bytes
  84                         cache-size = <0x40000>; // L2, 256K
  85                         interrupt-parent = <&mpic>;
  86                         interrupts = <16 2>;
  87                 };
  88
  89                 dma@21300 {
  90                         #address-cells = <1>;
  91                         #size-cells = <1>;
  92                         compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
  93                         reg = <0x21300 0x4>;
  94                         ranges = <0x0 0x21100 0x200>;
  95                         cell-index = <0>;
  96                         dma-channel@0 {
  97                                 compatible = "fsl,mpc8560-dma-channel",
  98                                                 "fsl,eloplus-dma-channel";
  99                                 reg = <0x0 0x80>;
 100                                 cell-index = <0>;
 101                                 interrupt-parent = <&mpic>;
 102                                 interrupts = <20 2>;
 103                         };
 104                         dma-channel@80 {
 105                                 compatible = "fsl,mpc8560-dma-channel",
 106                                                 "fsl,eloplus-dma-channel";
 107                                 reg = <0x80 0x80>;
 108                                 cell-index = <1>;
 109                                 interrupt-parent = <&mpic>;
 110                                 interrupts = <21 2>;
 111                         };
 112                         dma-channel@100 {
 113                                 compatible = "fsl,mpc8560-dma-channel",
 114                                                 "fsl,eloplus-dma-channel";
 115                                 reg = <0x100 0x80>;
 116                                 cell-index = <2>;
 117                                 interrupt-parent = <&mpic>;
 118                                 interrupts = <22 2>;
 119                         };
 120                         dma-channel@180 {
 121                                 compatible = "fsl,mpc8560-dma-channel",
 122                                                 "fsl,eloplus-dma-channel";
 123                                 reg = <0x180 0x80>;
 124                                 cell-index = <3>;
 125                                 interrupt-parent = <&mpic>;
 126                                 interrupts = <23 2>;
 127                         };
 128                 };
 129
 130                 enet0: ethernet@24000 {
 131                         #address-cells = <1>;
 132                         #size-cells = <1>;
 133                         cell-index = <0>;
 134                         device_type = "network";
 135                         model = "TSEC";
 136                         compatible = "gianfar";
 137                         reg = <0x24000 0x1000>;
 138                         ranges = <0x0 0x24000 0x1000>;
 139                         local-mac-address = [ 00 00 00 00 00 00 ];
 140                         interrupts = <29 2 30 2 34 2>;
 141                         interrupt-parent = <&mpic>;
 142                         tbi-handle = <&tbi0>;
 143                         phy-handle = <&phy0>;
 144
 145                         mdio@520 {
 146                                 #address-cells = <1>;
 147                                 #size-cells = <0>;
 148                                 compatible = "fsl,gianfar-mdio";
 149                                 reg = <0x520 0x20>;
 150
 151                                 phy0: ethernet-phy@0 {
 152                                         interrupt-parent = <&mpic>;
 153                                         interrupts = <5 1>;
 154                                         reg = <0x0>;
 155                                         device_type = "ethernet-phy";
 156                                 };
 157                                 phy1: ethernet-phy@1 {
 158                                         interrupt-parent = <&mpic>;
 159                                         interrupts = <5 1>;
 160                                         reg = <0x1>;
 161                                         device_type = "ethernet-phy";
 162                                 };
 163                                 phy2: ethernet-phy@2 {
 164                                         interrupt-parent = <&mpic>;
 165                                         interrupts = <7 1>;
 166                                         reg = <0x2>;
 167                                         device_type = "ethernet-phy";
 168                                 };
 169                                 phy3: ethernet-phy@3 {
 170                                         interrupt-parent = <&mpic>;
 171                                         interrupts = <7 1>;
 172                                         reg = <0x3>;
 173                                         device_type = "ethernet-phy";
 174                                 };
 175                                 tbi0: tbi-phy@11 {
 176                                         reg = <0x11>;
 177                                         device_type = "tbi-phy";
 178                                 };
 179                         };
 180                 };
 181
 182                 enet1: ethernet@25000 {
 183                         #address-cells = <1>;
 184                         #size-cells = <1>;
 185                         cell-index = <1>;
 186                         device_type = "network";
 187                         model = "TSEC";
 188                         compatible = "gianfar";
 189                         reg = <0x25000 0x1000>;
 190                         ranges = <0x0 0x25000 0x1000>;
 191                         local-mac-address = [ 00 00 00 00 00 00 ];
 192                         interrupts = <35 2 36 2 40 2>;
 193                         interrupt-parent = <&mpic>;
 194                         tbi-handle = <&tbi1>;
 195                         phy-handle = <&phy1>;
 196
 197                         mdio@520 {
 198                                 #address-cells = <1>;
 199                                 #size-cells = <0>;
 200                                 compatible = "fsl,gianfar-tbi";
 201                                 reg = <0x520 0x20>;
 202
 203                                 tbi1: tbi-phy@11 {
 204                                         reg = <0x11>;
 205                                         device_type = "tbi-phy";
 206                                 };
 207                         };
 208                 };
 209
 210                 mpic: pic@40000 {
 211                         interrupt-controller;
 212                         #address-cells = <0>;
 213                         #interrupt-cells = <2>;
 214                         reg = <0x40000 0x40000>;
 215                         compatible = "chrp,open-pic";
 216                         device_type = "open-pic";
 217                 };
 218
 219                 cpm@919c0 {
 220                         #address-cells = <1>;
 221                         #size-cells = <1>;
 222                         compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
 223                         reg = <0x919c0 0x30>;
 224                         ranges;
 225
 226                         muram@80000 {
 227                                 #address-cells = <1>;
 228                                 #size-cells = <1>;
 229                                 ranges = <0x0 0x80000 0x10000>;
 230
 231                                 data@0 {
 232                                         compatible = "fsl,cpm-muram-data";
 233                                         reg = <0x0 0x4000 0x9000 0x2000>;
 234                                 };
 235                         };
 236
 237                         brg@919f0 {
 238                                 compatible = "fsl,mpc8560-brg",
 239                                              "fsl,cpm2-brg",
 240                                              "fsl,cpm-brg";
 241                                 reg = <0x919f0 0x10 0x915f0 0x10>;
 242                                 clock-frequency = <165000000>;
 243                         };
 244
 245                         cpmpic: pic@90c00 {
 246                                 interrupt-controller;
 247                                 #address-cells = <0>;
 248                                 #interrupt-cells = <2>;
 249                                 interrupts = <46 2>;
 250                                 interrupt-parent = <&mpic>;
 251                                 reg = <0x90c00 0x80>;
 252                                 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
 253                         };
 254
 255                         serial0: serial@91a00 {
 256                                 device_type = "serial";
 257                                 compatible = "fsl,mpc8560-scc-uart",
 258                                              "fsl,cpm2-scc-uart";
 259                                 reg = <0x91a00 0x20 0x88000 0x100>;
 260                                 fsl,cpm-brg = <1>;
 261                                 fsl,cpm-command = <0x800000>;
 262                                 current-speed = <115200>;
 263                                 interrupts = <40 8>;
 264                                 interrupt-parent = <&cpmpic>;
 265                         };
 266
 267                         serial1: serial@91a20 {
 268                                 device_type = "serial";
 269                                 compatible = "fsl,mpc8560-scc-uart",
 270                                              "fsl,cpm2-scc-uart";
 271                                 reg = <0x91a20 0x20 0x88100 0x100>;
 272                                 fsl,cpm-brg = <2>;
 273                                 fsl,cpm-command = <0x4a00000>;
 274                                 current-speed = <115200>;
 275                                 interrupts = <41 8>;
 276                                 interrupt-parent = <&cpmpic>;
 277                         };
 278
 279                         enet2: ethernet@91320 {
 280                                 device_type = "network";
 281                                 compatible = "fsl,mpc8560-fcc-enet",
 282                                              "fsl,cpm2-fcc-enet";
 283                                 reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>;
 284                                 local-mac-address = [ 00 00 00 00 00 00 ];
 285                                 fsl,cpm-command = <0x16200300>;
 286                                 interrupts = <33 8>;
 287                                 interrupt-parent = <&cpmpic>;
 288                                 phy-handle = <&phy2>;
 289                         };
 290
 291                         enet3: ethernet@91340 {
 292                                 device_type = "network";
 293                                 compatible = "fsl,mpc8560-fcc-enet",
 294                                              "fsl,cpm2-fcc-enet";
 295                                 reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
 296                                 local-mac-address = [ 00 00 00 00 00 00 ];
 297                                 fsl,cpm-command = <0x1a400300>;
 298                                 interrupts = <34 8>;
 299                                 interrupt-parent = <&cpmpic>;
 300                                 phy-handle = <&phy3>;
 301                         };
 302                 };
 303         };
 304
 305         pci0: pci@e0008000 {
 306                 #interrupt-cells = <1>;
 307                 #size-cells = <2>;
 308                 #address-cells = <3>;
 309                 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
 310                 device_type = "pci";
 311                 reg = <0xe0008000 0x1000>;
 312                 clock-frequency = <66666666>;
 313                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 314                 interrupt-map = <
 315
 316                                 /* IDSEL 0x2 */
 317                                  0x1000 0x0 0x0 0x1 &mpic 0x1 0x1
 318                                  0x1000 0x0 0x0 0x2 &mpic 0x2 0x1
 319                                  0x1000 0x0 0x0 0x3 &mpic 0x3 0x1
 320                                  0x1000 0x0 0x0 0x4 &mpic 0x4 0x1
 321
 322                                 /* IDSEL 0x3 */
 323                                  0x1800 0x0 0x0 0x1 &mpic 0x4 0x1
 324                                  0x1800 0x0 0x0 0x2 &mpic 0x1 0x1
 325                                  0x1800 0x0 0x0 0x3 &mpic 0x2 0x1
 326                                  0x1800 0x0 0x0 0x4 &mpic 0x3 0x1
 327
 328                                 /* IDSEL 0x4 */
 329                                  0x2000 0x0 0x0 0x1 &mpic 0x3 0x1
 330                                  0x2000 0x0 0x0 0x2 &mpic 0x4 0x1
 331                                  0x2000 0x0 0x0 0x3 &mpic 0x1 0x1
 332                                  0x2000 0x0 0x0 0x4 &mpic 0x2 0x1
 333
 334                                 /* IDSEL 0x5  */
 335                                  0x2800 0x0 0x0 0x1 &mpic 0x2 0x1
 336                                  0x2800 0x0 0x0 0x2 &mpic 0x3 0x1
 337                                  0x2800 0x0 0x0 0x3 &mpic 0x4 0x1
 338                                  0x2800 0x0 0x0 0x4 &mpic 0x1 0x1
 339
 340                                 /* IDSEL 12 */
 341                                  0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
 342                                  0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
 343                                  0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
 344                                  0x6000 0x0 0x0 0x4 &mpic 0x4 0x1
 345
 346                                 /* IDSEL 13 */
 347                                  0x6800 0x0 0x0 0x1 &mpic 0x4 0x1
 348                                  0x6800 0x0 0x0 0x2 &mpic 0x1 0x1
 349                                  0x6800 0x0 0x0 0x3 &mpic 0x2 0x1
 350                                  0x6800 0x0 0x0 0x4 &mpic 0x3 0x1
 351
 352                                 /* IDSEL 14*/
 353                                  0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
 354                                  0x7000 0x0 0x0 0x2 &mpic 0x4 0x1
 355                                  0x7000 0x0 0x0 0x3 &mpic 0x1 0x1
 356                                  0x7000 0x0 0x0 0x4 &mpic 0x2 0x1
 357
 358                                 /* IDSEL 15 */
 359                                  0x7800 0x0 0x0 0x1 &mpic 0x2 0x1
 360                                  0x7800 0x0 0x0 0x2 &mpic 0x3 0x1
 361                                  0x7800 0x0 0x0 0x3 &mpic 0x4 0x1
 362                                  0x7800 0x0 0x0 0x4 &mpic 0x1 0x1
 363
 364                                 /* IDSEL 18 */
 365                                  0x9000 0x0 0x0 0x1 &mpic 0x1 0x1
 366                                  0x9000 0x0 0x0 0x2 &mpic 0x2 0x1
 367                                  0x9000 0x0 0x0 0x3 &mpic 0x3 0x1
 368                                  0x9000 0x0 0x0 0x4 &mpic 0x4 0x1
 369
 370                                 /* IDSEL 19 */
 371                                  0x9800 0x0 0x0 0x1 &mpic 0x4 0x1
 372                                  0x9800 0x0 0x0 0x2 &mpic 0x1 0x1
 373                                  0x9800 0x0 0x0 0x3 &mpic 0x2 0x1
 374                                  0x9800 0x0 0x0 0x4 &mpic 0x3 0x1
 375
 376                                 /* IDSEL 20 */
 377                                  0xa000 0x0 0x0 0x1 &mpic 0x3 0x1
 378                                  0xa000 0x0 0x0 0x2 &mpic 0x4 0x1
 379                                  0xa000 0x0 0x0 0x3 &mpic 0x1 0x1
 380                                  0xa000 0x0 0x0 0x4 &mpic 0x2 0x1
 381
 382                                 /* IDSEL 21 */
 383                                  0xa800 0x0 0x0 0x1 &mpic 0x2 0x1
 384                                  0xa800 0x0 0x0 0x2 &mpic 0x3 0x1
 385                                  0xa800 0x0 0x0 0x3 &mpic 0x4 0x1
 386                                  0xa800 0x0 0x0 0x4 &mpic 0x1 0x1>;
 387
 388                 interrupt-parent = <&mpic>;
 389                 interrupts = <24 2>;
 390                 bus-range = <0 0>;
 391                 ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
 392                           0x1000000 0x0 0x0 0xe2000000 0x0 0x1000000>;
 393         };
 394 };