2 * MPC8544 DS Device Tree Source
4 * Copyright 2007 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
14 compatible = "MPC8544DS", "MPC85xxDS";
26 d-cache-line-size = <20>; // 32 bytes
27 i-cache-line-size = <20>; // 32 bytes
28 d-cache-size = <8000>; // L1, 32K
29 i-cache-size = <8000>; // L1, 32K
30 timebase-frequency = <0>;
32 clock-frequency = <0>;
38 device_type = "memory";
39 reg = <00000000 00000000>; // Filled by U-Boot
45 #interrupt-cells = <2>;
47 ranges = <0 e0000000 00100000>;
48 reg = <e0000000 00100000>; // CCSRBAR 1M
49 bus-frequency = <0>; // Filled out by uboot.
51 memory-controller@2000 {
52 compatible = "fsl,8544-memory-controller";
54 interrupt-parent = <&mpic>;
58 l2-cache-controller@20000 {
59 compatible = "fsl,8544-l2-cache-controller";
61 cache-line-size = <20>; // 32 bytes
62 cache-size = <40000>; // L2, 256K
63 interrupt-parent = <&mpic>;
69 compatible = "fsl-i2c";
72 interrupt-parent = <&mpic>;
80 compatible = "gianfar";
82 phy0: ethernet-phy@0 {
83 interrupt-parent = <&mpic>;
86 device_type = "ethernet-phy";
88 phy1: ethernet-phy@1 {
89 interrupt-parent = <&mpic>;
92 device_type = "ethernet-phy";
99 device_type = "network";
101 compatible = "gianfar";
103 local-mac-address = [ 00 00 00 00 00 00 ];
104 interrupts = <1d 2 1e 2 22 2>;
105 interrupt-parent = <&mpic>;
106 phy-handle = <&phy0>;
107 phy-connection-type = "rgmii-id";
111 #address-cells = <1>;
113 device_type = "network";
115 compatible = "gianfar";
117 local-mac-address = [ 00 00 00 00 00 00 ];
118 interrupts = <1f 2 20 2 21 2>;
119 interrupt-parent = <&mpic>;
120 phy-handle = <&phy1>;
121 phy-connection-type = "rgmii-id";
125 device_type = "serial";
126 compatible = "ns16550";
128 clock-frequency = <0>;
130 interrupt-parent = <&mpic>;
134 device_type = "serial";
135 compatible = "ns16550";
137 clock-frequency = <0>;
139 interrupt-parent = <&mpic>;
143 compatible = "fsl,mpc8540-pci";
145 interrupt-map-mask = <f800 0 0 7>;
148 /* IDSEL 0x11 J17 Slot 1 */
154 /* IDSEL 0x12 J16 Slot 2 */
159 9000 0 0 4 &mpic 1 1>;
161 interrupt-parent = <&mpic>;
164 ranges = <02000000 0 80000000 80000000 0 10000000
165 01000000 0 00000000 e2000000 0 00800000>;
166 clock-frequency = <3f940aa>;
167 #interrupt-cells = <1>;
169 #address-cells = <3>;
174 compatible = "fsl,mpc8548-pcie";
176 #interrupt-cells = <1>;
178 #address-cells = <3>;
181 ranges = <02000000 0 90000000 90000000 0 10000000
182 01000000 0 00000000 e3000000 0 00800000>;
183 clock-frequency = <1fca055>;
184 interrupt-parent = <&mpic>;
186 interrupt-map-mask = <f800 0 0 7>;
197 compatible = "fsl,mpc8548-pcie";
199 #interrupt-cells = <1>;
201 #address-cells = <3>;
204 ranges = <02000000 0 a0000000 a0000000 0 10000000
205 01000000 0 00000000 e2800000 0 00800000>;
206 clock-frequency = <1fca055>;
207 interrupt-parent = <&mpic>;
209 interrupt-map-mask = <f800 0 0 7>;
220 compatible = "fsl,mpc8548-pcie";
222 #interrupt-cells = <1>;
224 #address-cells = <3>;
227 ranges = <02000000 0 b0000000 b0000000 0 10000000
228 01000000 0 00000000 e3800000 0 00800000>;
229 clock-frequency = <1fca055>;
230 interrupt-parent = <&mpic>;
232 interrupt-map-mask = <f800 0 0 7>;
236 d000 0 0 1 &i8259 6 2
237 d000 0 0 2 &i8259 3 2
238 d000 0 0 3 &i8259 4 2
239 d000 0 0 4 &i8259 5 2
242 d800 0 0 1 &i8259 5 2
243 d800 0 0 2 &i8259 0 0
244 d800 0 0 3 &i8259 0 0
245 d800 0 0 4 &i8259 0 0
248 e000 0 0 1 &i8259 9 2
249 e000 0 0 2 &i8259 a 2
250 e000 0 0 3 &i8259 c 2
251 e000 0 0 4 &i8259 7 2
254 e800 0 0 1 &i8259 9 2
255 e800 0 0 2 &i8259 a 2
256 e800 0 0 3 &i8259 b 2
257 e800 0 0 4 &i8259 0 0
260 f000 0 0 1 &i8259 c 2
261 f000 0 0 2 &i8259 0 0
262 f000 0 0 3 &i8259 0 0
263 f000 0 0 4 &i8259 0 0
265 // IDSEL 0x1f IDE/SATA
266 f800 0 0 1 &i8259 6 2
267 f800 0 0 2 &i8259 0 0
268 f800 0 0 3 &i8259 0 0
269 f800 0 0 4 &i8259 0 0
274 #address-cells = <3>;
275 ranges = <02000000 0 b0000000
285 #address-cells = <3>;
286 ranges = <02000000 0 b0000000
295 #interrupt-cells = <2>;
297 #address-cells = <2>;
298 reg = <f000 0 0 0 0>;
299 ranges = <1 0 01000000 0 0
301 interrupt-parent = <&i8259>;
303 i8259: interrupt-controller@20 {
307 clock-frequency = <0>;
308 interrupt-controller;
309 device_type = "interrupt-controller";
310 #address-cells = <0>;
311 #interrupt-cells = <2>;
313 compatible = "chrp,iic";
321 #address-cells = <1>;
322 reg = <1 60 1 1 64 1>;
323 interrupts = <1 3 c 3>;
329 compatible = "pnpPNP,303";
334 compatible = "pnpPNP,f03";
353 global-utilities@e0000 { //global utilities block
354 compatible = "fsl,mpc8548-guts";
360 clock-frequency = <0>;
361 interrupt-controller;
362 #address-cells = <0>;
363 #interrupt-cells = <2>;
366 compatible = "chrp,open-pic";
367 device_type = "open-pic";