arch/powerpc/boot/dts/mpc836x_mds.dts

   1 /*
   2  * MPC8360E EMDS Device Tree Source
   3  *
   4  * Copyright 2006 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12
  13 /*
  14 /memreserve/    00000000 1000000;
  15 */
  16
  17 / {
  18         model = "MPC8360MDS";
  19         compatible = "MPC8360EMDS", "MPC836xMDS", "MPC83xxMDS";
  20         #address-cells = <1>;
  21         #size-cells = <1>;
  22
  23         cpus {
  24                 #address-cells = <1>;
  25                 #size-cells = <0>;
  26
  27                 PowerPC,8360@0 {
  28                         device_type = "cpu";
  29                         reg = <0>;
  30                         d-cache-line-size = <20>;       // 32 bytes
  31                         i-cache-line-size = <20>;       // 32 bytes
  32                         d-cache-size = <8000>;          // L1, 32K
  33                         i-cache-size = <8000>;          // L1, 32K
  34                         timebase-frequency = <3EF1480>;
  35                         bus-frequency = <FBC5200>;
  36                         clock-frequency = <1F78A400>;
  37                 };
  38         };
  39
  40         memory {
  41                 device_type = "memory";
  42                 reg = <00000000 10000000>;
  43         };
  44
  45         bcsr@f8000000 {
  46                 device_type = "board-control";
  47                 reg = <f8000000 8000>;
  48         };
  49
  50         soc8360@e0000000 {
  51                 #address-cells = <1>;
  52                 #size-cells = <1>;
  53                 device_type = "soc";
  54                 ranges = <0 e0000000 00100000>;
  55                 reg = <e0000000 00000200>;
  56                 bus-frequency = <FBC5200>;
  57
  58                 wdt@200 {
  59                         device_type = "watchdog";
  60                         compatible = "mpc83xx_wdt";
  61                         reg = <200 100>;
  62                 };
  63
  64                 i2c@3000 {
  65                         device_type = "i2c";
  66                         compatible = "fsl-i2c";
  67                         reg = <3000 100>;
  68                         interrupts = <e 8>;
  69                         interrupt-parent = < &ipic >;
  70                         dfsrr;
  71                 };
  72
  73                 i2c@3100 {
  74                         device_type = "i2c";
  75                         compatible = "fsl-i2c";
  76                         reg = <3100 100>;
  77                         interrupts = <f 8>;
  78                         interrupt-parent = < &ipic >;
  79                         dfsrr;
  80                 };
  81
  82                 serial@4500 {
  83                         device_type = "serial";
  84                         compatible = "ns16550";
  85                         reg = <4500 100>;
  86                         clock-frequency = <FBC5200>;
  87                         interrupts = <9 8>;
  88                         interrupt-parent = < &ipic >;
  89                 };
  90
  91                 serial@4600 {
  92                         device_type = "serial";
  93                         compatible = "ns16550";
  94                         reg = <4600 100>;
  95                         clock-frequency = <FBC5200>;
  96                         interrupts = <a 8>;
  97                         interrupt-parent = < &ipic >;
  98                 };
  99
 100                 crypto@30000 {
 101                         device_type = "crypto";
 102                         model = "SEC2";
 103                         compatible = "talitos";
 104                         reg = <30000 10000>;
 105                         interrupts = <b 8>;
 106                         interrupt-parent = < &ipic >;
 107                         num-channels = <4>;
 108                         channel-fifo-len = <18>;
 109                         exec-units-mask = <0000007e>;
 110                         /* desc mask is for rev1.x, we need runtime fixup for >=2.x */
 111                         descriptor-types-mask = <01010ebf>;
 112                 };
 113
 114                 pci@8500 {
 115                         interrupt-map-mask = <f800 0 0 7>;
 116                         interrupt-map = <
 117
 118                                         /* IDSEL 0x11 AD17 */
 119                                          8800 0 0 1 &ipic 14 8
 120                                          8800 0 0 2 &ipic 15 8
 121                                          8800 0 0 3 &ipic 16 8
 122                                          8800 0 0 4 &ipic 17 8
 123
 124                                         /* IDSEL 0x12 AD18 */
 125                                          9000 0 0 1 &ipic 16 8
 126                                          9000 0 0 2 &ipic 17 8
 127                                          9000 0 0 3 &ipic 14 8
 128                                          9000 0 0 4 &ipic 15 8
 129
 130                                         /* IDSEL 0x13 AD19 */
 131                                          9800 0 0 1 &ipic 17 8
 132                                          9800 0 0 2 &ipic 14 8
 133                                          9800 0 0 3 &ipic 15 8
 134                                          9800 0 0 4 &ipic 16 8
 135
 136                                         /* IDSEL 0x15 AD21*/
 137                                          a800 0 0 1 &ipic 14 8
 138                                          a800 0 0 2 &ipic 15 8
 139                                          a800 0 0 3 &ipic 16 8
 140                                          a800 0 0 4 &ipic 17 8
 141
 142                                         /* IDSEL 0x16 AD22*/
 143                                          b000 0 0 1 &ipic 17 8
 144                                          b000 0 0 2 &ipic 14 8
 145                                          b000 0 0 3 &ipic 15 8
 146                                          b000 0 0 4 &ipic 16 8
 147
 148                                         /* IDSEL 0x17 AD23*/
 149                                          b800 0 0 1 &ipic 16 8
 150                                          b800 0 0 2 &ipic 17 8
 151                                          b800 0 0 3 &ipic 14 8
 152                                          b800 0 0 4 &ipic 15 8
 153
 154                                         /* IDSEL 0x18 AD24*/
 155                                          c000 0 0 1 &ipic 15 8
 156                                          c000 0 0 2 &ipic 16 8
 157                                          c000 0 0 3 &ipic 17 8
 158                                          c000 0 0 4 &ipic 14 8>;
 159                         interrupt-parent = < &ipic >;
 160                         interrupts = <42 8>;
 161                         bus-range = <0 0>;
 162                         ranges = <02000000 0 a0000000 a0000000 0 10000000
 163                                   42000000 0 80000000 80000000 0 10000000
 164                                   01000000 0 00000000 e2000000 0 00100000>;
 165                         clock-frequency = <3f940aa>;
 166                         #interrupt-cells = <1>;
 167                         #size-cells = <2>;
 168                         #address-cells = <3>;
 169                         reg = <8500 100>;
 170                         compatible = "fsl,mpc8349-pci";
 171                         device_type = "pci";
 172                 };
 173
 174                 ipic: pic@700 {
 175                         interrupt-controller;
 176                         #address-cells = <0>;
 177                         #interrupt-cells = <2>;
 178                         reg = <700 100>;
 179                         device_type = "ipic";
 180                 };
 181
 182                 par_io@1400 {
 183                         reg = <1400 100>;
 184                         device_type = "par_io";
 185                         num-ports = <7>;
 186
 187                         pio1: ucc_pin@01 {
 188                                 pio-map = <
 189                         /* port  pin  dir  open_drain  assignment  has_irq */
 190                                         0  3  1  0  1  0        /* TxD0 */
 191                                         0  4  1  0  1  0        /* TxD1 */
 192                                         0  5  1  0  1  0        /* TxD2 */
 193                                         0  6  1  0  1  0        /* TxD3 */
 194                                         1  6  1  0  3  0        /* TxD4 */
 195                                         1  7  1  0  1  0        /* TxD5 */
 196                                         1  9  1  0  2  0        /* TxD6 */
 197                                         1  a  1  0  2  0        /* TxD7 */
 198                                         0  9  2  0  1  0        /* RxD0 */
 199                                         0  a  2  0  1  0        /* RxD1 */
 200                                         0  b  2  0  1  0        /* RxD2 */
 201                                         0  c  2  0  1  0        /* RxD3 */
 202                                         0  d  2  0  1  0        /* RxD4 */
 203                                         1  1  2  0  2  0        /* RxD5 */
 204                                         1  0  2  0  2  0        /* RxD6 */
 205                                         1  4  2  0  2  0        /* RxD7 */
 206                                         0  7  1  0  1  0        /* TX_EN */
 207                                         0  8  1  0  1  0        /* TX_ER */
 208                                         0  f  2  0  1  0        /* RX_DV */
 209                                         0  10 2  0  1  0        /* RX_ER */
 210                                         0  0  2  0  1  0        /* RX_CLK */
 211                                         2  9  1  0  3  0        /* GTX_CLK - CLK10 */
 212                                         2  8  2  0  1  0>;      /* GTX125 - CLK9 */
 213                         };
 214                         pio2: ucc_pin@02 {
 215                                 pio-map = <
 216                         /* port  pin  dir  open_drain  assignment  has_irq */
 217                                         0  11 1  0  1  0   /* TxD0 */
 218                                         0  12 1  0  1  0   /* TxD1 */
 219                                         0  13 1  0  1  0   /* TxD2 */
 220                                         0  14 1  0  1  0   /* TxD3 */
 221                                         1  2  1  0  1  0   /* TxD4 */
 222                                         1  3  1  0  2  0   /* TxD5 */
 223                                         1  5  1  0  3  0   /* TxD6 */
 224                                         1  8  1  0  3  0   /* TxD7 */
 225                                         0  17 2  0  1  0   /* RxD0 */
 226                                         0  18 2  0  1  0   /* RxD1 */
 227                                         0  19 2  0  1  0   /* RxD2 */
 228                                         0  1a 2  0  1  0   /* RxD3 */
 229                                         0  1b 2  0  1  0   /* RxD4 */
 230                                         1  c  2  0  2  0   /* RxD5 */
 231                                         1  d  2  0  3  0   /* RxD6 */
 232                                         1  b  2  0  2  0   /* RxD7 */
 233                                         0  15 1  0  1  0   /* TX_EN */
 234                                         0  16 1  0  1  0   /* TX_ER */
 235                                         0  1d 2  0  1  0   /* RX_DV */
 236                                         0  1e 2  0  1  0   /* RX_ER */
 237                                         0  1f 2  0  1  0   /* RX_CLK */
 238                                         2  2  1  0  2  0   /* GTX_CLK - CLK10 */
 239                                         2  3  2  0  1  0   /* GTX125 - CLK4 */
 240                                         0  1  3  0  2  0   /* MDIO */
 241                                         0  2  1  0  1  0>; /* MDC */
 242                         };
 243
 244                 };
 245         };
 246
 247         qe@e0100000 {
 248                 #address-cells = <1>;
 249                 #size-cells = <1>;
 250                 device_type = "qe";
 251                 model = "QE";
 252                 ranges = <0 e0100000 00100000>;
 253                 reg = <e0100000 480>;
 254                 brg-frequency = <0>;
 255                 bus-frequency = <179A7B00>;
 256
 257                 muram@10000 {
 258                         device_type = "muram";
 259                         ranges = <0 00010000 0000c000>;
 260
 261                         data-only@0{
 262                                 reg = <0 c000>;
 263                         };
 264                 };
 265
 266                 spi@4c0 {
 267                         device_type = "spi";
 268                         compatible = "fsl_spi";
 269                         reg = <4c0 40>;
 270                         interrupts = <2>;
 271                         interrupt-parent = < &qeic >;
 272                         mode = "cpu";
 273                 };
 274
 275                 spi@500 {
 276                         device_type = "spi";
 277                         compatible = "fsl_spi";
 278                         reg = <500 40>;
 279                         interrupts = <1>;
 280                         interrupt-parent = < &qeic >;
 281                         mode = "cpu";
 282                 };
 283
 284                 usb@6c0 {
 285                         device_type = "usb";
 286                         compatible = "qe_udc";
 287                         reg = <6c0 40 8B00 100>;
 288                         interrupts = <b>;
 289                         interrupt-parent = < &qeic >;
 290                         mode = "slave";
 291                 };
 292
 293                 ucc@2000 {
 294                         device_type = "network";
 295                         compatible = "ucc_geth";
 296                         model = "UCC";
 297                         device-id = <1>;
 298                         reg = <2000 200>;
 299                         interrupts = <20>;
 300                         interrupt-parent = < &qeic >;
 301                         /*
 302                          * mac-address is deprecated and will be removed
 303                          * in 2.6.25.  Only recent versions of
 304                          * U-Boot support local-mac-address, however.
 305                          */
 306                         mac-address = [ 00 00 00 00 00 00 ];
 307                         local-mac-address = [ 00 00 00 00 00 00 ];
 308                         rx-clock = <0>;
 309                         tx-clock = <19>;
 310                         phy-handle = < &phy0 >;
 311                         phy-connection-type = "rgmii-id";
 312                         pio-handle = < &pio1 >;
 313                 };
 314
 315                 ucc@3000 {
 316                         device_type = "network";
 317                         compatible = "ucc_geth";
 318                         model = "UCC";
 319                         device-id = <2>;
 320                         reg = <3000 200>;
 321                         interrupts = <21>;
 322                         interrupt-parent = < &qeic >;
 323                         /*
 324                          * mac-address is deprecated and will be removed
 325                          * in 2.6.25.  Only recent versions of
 326                          * U-Boot support local-mac-address, however.
 327                          */
 328                         mac-address = [ 00 00 00 00 00 00 ];
 329                         local-mac-address = [ 00 00 00 00 00 00 ];
 330                         rx-clock = <0>;
 331                         tx-clock = <14>;
 332                         phy-handle = < &phy1 >;
 333                         phy-connection-type = "rgmii-id";
 334                         pio-handle = < &pio2 >;
 335                 };
 336
 337                 mdio@2120 {
 338                         #address-cells = <1>;
 339                         #size-cells = <0>;
 340                         reg = <2120 18>;
 341                         device_type = "mdio";
 342                         compatible = "ucc_geth_phy";
 343
 344                         phy0: ethernet-phy@00 {
 345                                 interrupt-parent = < &ipic >;
 346                                 interrupts = <11 8>;
 347                                 reg = <0>;
 348                                 device_type = "ethernet-phy";
 349                         };
 350                         phy1: ethernet-phy@01 {
 351                                 interrupt-parent = < &ipic >;
 352                                 interrupts = <12 8>;
 353                                 reg = <1>;
 354                                 device_type = "ethernet-phy";
 355                         };
 356                 };
 357
 358                 qeic: qeic@80 {
 359                         interrupt-controller;
 360                         device_type = "qeic";
 361                         #address-cells = <0>;
 362                         #interrupt-cells = <1>;
 363                         reg = <80 80>;
 364                         big-endian;
 365                         interrupts = <20 8 21 8>; //high:32 low:33
 366                         interrupt-parent = < &ipic >;
 367                 };
 368
 369         };
 370 };