arch/powerpc/boot/dts/mpc834x_mds.dts

   1 /*
   2  * MPC8349E MDS Device Tree Source
   3  *
   4  * Copyright 2005, 2006 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 / {
  13         model = "MPC8349EMDS";
  14         compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
  15         #address-cells = <1>;
  16         #size-cells = <1>;
  17
  18         aliases {
  19                 ethernet0 = &enet0;
  20                 ethernet1 = &enet1;
  21                 serial0 = &serial0;
  22                 serial1 = &serial1;
  23                 pci0 = &pci0;
  24                 pci1 = &pci1;
  25         };
  26
  27         cpus {
  28                 #address-cells = <1>;
  29                 #size-cells = <0>;
  30
  31                 PowerPC,8349@0 {
  32                         device_type = "cpu";
  33                         reg = <0>;
  34                         d-cache-line-size = <20>;       // 32 bytes
  35                         i-cache-line-size = <20>;       // 32 bytes
  36                         d-cache-size = <8000>;          // L1, 32K
  37                         i-cache-size = <8000>;          // L1, 32K
  38                         timebase-frequency = <0>;       // from bootloader
  39                         bus-frequency = <0>;            // from bootloader
  40                         clock-frequency = <0>;          // from bootloader
  41                 };
  42         };
  43
  44         memory {
  45                 device_type = "memory";
  46                 reg = <00000000 10000000>;      // 256MB at 0
  47         };
  48
  49         bcsr@e2400000 {
  50                 device_type = "board-control";
  51                 reg = <e2400000 8000>;
  52         };
  53
  54         soc8349@e0000000 {
  55                 #address-cells = <1>;
  56                 #size-cells = <1>;
  57                 device_type = "soc";
  58                 ranges = <0 e0000000 00100000>;
  59                 reg = <e0000000 00000200>;
  60                 bus-frequency = <0>;
  61
  62                 wdt@200 {
  63                         device_type = "watchdog";
  64                         compatible = "mpc83xx_wdt";
  65                         reg = <200 100>;
  66                 };
  67
  68                 i2c@3000 {
  69                         #address-cells = <1>;
  70                         #size-cells = <0>;
  71                         cell-index = <0>;
  72                         compatible = "fsl-i2c";
  73                         reg = <3000 100>;
  74                         interrupts = <e 8>;
  75                         interrupt-parent = < &ipic >;
  76                         dfsrr;
  77
  78                         rtc@68 {
  79                                 compatible = "dallas,ds1374";
  80                                 reg = <68>;
  81                         };
  82                 };
  83
  84                 i2c@3100 {
  85                         #address-cells = <1>;
  86                         #size-cells = <0>;
  87                         cell-index = <1>;
  88                         compatible = "fsl-i2c";
  89                         reg = <3100 100>;
  90                         interrupts = <f 8>;
  91                         interrupt-parent = < &ipic >;
  92                         dfsrr;
  93                 };
  94
  95                 spi@7000 {
  96                         device_type = "spi";
  97                         compatible = "fsl_spi";
  98                         reg = <7000 1000>;
  99                         interrupts = <10 8>;
 100                         interrupt-parent = < &ipic >;
 101                         mode = "cpu";
 102                 };
 103
 104                 /* phy type (ULPI or SERIAL) are only types supportted for MPH */
 105                 /* port = 0 or 1 */
 106                 usb@22000 {
 107                         device_type = "usb";
 108                         compatible = "fsl-usb2-mph";
 109                         reg = <22000 1000>;
 110                         #address-cells = <1>;
 111                         #size-cells = <0>;
 112                         interrupt-parent = < &ipic >;
 113                         interrupts = <27 8>;
 114                         phy_type = "ulpi";
 115                         port1;
 116                 };
 117                 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
 118                 usb@23000 {
 119                         device_type = "usb";
 120                         compatible = "fsl-usb2-dr";
 121                         reg = <23000 1000>;
 122                         #address-cells = <1>;
 123                         #size-cells = <0>;
 124                         interrupt-parent = < &ipic >;
 125                         interrupts = <26 8>;
 126                         dr_mode = "otg";
 127                         phy_type = "ulpi";
 128                 };
 129
 130                 mdio@24520 {
 131                         #address-cells = <1>;
 132                         #size-cells = <0>;
 133                         compatible = "fsl,gianfar-mdio";
 134                         reg = <24520 20>;
 135
 136                         phy0: ethernet-phy@0 {
 137                                 interrupt-parent = < &ipic >;
 138                                 interrupts = <11 8>;
 139                                 reg = <0>;
 140                                 device_type = "ethernet-phy";
 141                         };
 142                         phy1: ethernet-phy@1 {
 143                                 interrupt-parent = < &ipic >;
 144                                 interrupts = <12 8>;
 145                                 reg = <1>;
 146                                 device_type = "ethernet-phy";
 147                         };
 148                 };
 149
 150                 enet0: ethernet@24000 {
 151                         cell-index = <0>;
 152                         device_type = "network";
 153                         model = "TSEC";
 154                         compatible = "gianfar";
 155                         reg = <24000 1000>;
 156                         local-mac-address = [ 00 00 00 00 00 00 ];
 157                         interrupts = <20 8 21 8 22 8>;
 158                         interrupt-parent = < &ipic >;
 159                         phy-handle = < &phy0 >;
 160                         linux,network-index = <0>;
 161                 };
 162
 163                 enet1: ethernet@25000 {
 164                         cell-index = <1>;
 165                         device_type = "network";
 166                         model = "TSEC";
 167                         compatible = "gianfar";
 168                         reg = <25000 1000>;
 169                         local-mac-address = [ 00 00 00 00 00 00 ];
 170                         interrupts = <23 8 24 8 25 8>;
 171                         interrupt-parent = < &ipic >;
 172                         phy-handle = < &phy1 >;
 173                         linux,network-index = <1>;
 174                 };
 175
 176                 serial0: serial@4500 {
 177                         cell-index = <0>;
 178                         device_type = "serial";
 179                         compatible = "ns16550";
 180                         reg = <4500 100>;
 181                         clock-frequency = <0>;
 182                         interrupts = <9 8>;
 183                         interrupt-parent = < &ipic >;
 184                 };
 185
 186                 serial1: serial@4600 {
 187                         cell-index = <1>;
 188                         device_type = "serial";
 189                         compatible = "ns16550";
 190                         reg = <4600 100>;
 191                         clock-frequency = <0>;
 192                         interrupts = <a 8>;
 193                         interrupt-parent = < &ipic >;
 194                 };
 195
 196                 /* May need to remove if on a part without crypto engine */
 197                 crypto@30000 {
 198                         device_type = "crypto";
 199                         model = "SEC2";
 200                         compatible = "talitos";
 201                         reg = <30000 10000>;
 202                         interrupts = <b 8>;
 203                         interrupt-parent = < &ipic >;
 204                         num-channels = <4>;
 205                         channel-fifo-len = <18>;
 206                         exec-units-mask = <0000007e>;
 207                         /* desc mask is for rev2.0,
 208                          * we need runtime fixup for >2.0 */
 209                         descriptor-types-mask = <01010ebf>;
 210                 };
 211
 212                 /* IPIC
 213                  * interrupts cell = <intr #, sense>
 214                  * sense values match linux IORESOURCE_IRQ_* defines:
 215                  * sense == 8: Level, low assertion
 216                  * sense == 2: Edge, high-to-low change
 217                  */
 218                 ipic: pic@700 {
 219                         interrupt-controller;
 220                         #address-cells = <0>;
 221                         #interrupt-cells = <2>;
 222                         reg = <700 100>;
 223                         device_type = "ipic";
 224                 };
 225         };
 226
 227         pci0: pci@e0008500 {
 228                 cell-index = <1>;
 229                 interrupt-map-mask = <f800 0 0 7>;
 230                 interrupt-map = <
 231
 232                                 /* IDSEL 0x11 */
 233                                  8800 0 0 1 &ipic 14 8
 234                                  8800 0 0 2 &ipic 15 8
 235                                  8800 0 0 3 &ipic 16 8
 236                                  8800 0 0 4 &ipic 17 8
 237
 238                                 /* IDSEL 0x12 */
 239                                  9000 0 0 1 &ipic 16 8
 240                                  9000 0 0 2 &ipic 17 8
 241                                  9000 0 0 3 &ipic 14 8
 242                                  9000 0 0 4 &ipic 15 8
 243
 244                                 /* IDSEL 0x13 */
 245                                  9800 0 0 1 &ipic 17 8
 246                                  9800 0 0 2 &ipic 14 8
 247                                  9800 0 0 3 &ipic 15 8
 248                                  9800 0 0 4 &ipic 16 8
 249
 250                                 /* IDSEL 0x15 */
 251                                  a800 0 0 1 &ipic 14 8
 252                                  a800 0 0 2 &ipic 15 8
 253                                  a800 0 0 3 &ipic 16 8
 254                                  a800 0 0 4 &ipic 17 8
 255
 256                                 /* IDSEL 0x16 */
 257                                  b000 0 0 1 &ipic 17 8
 258                                  b000 0 0 2 &ipic 14 8
 259                                  b000 0 0 3 &ipic 15 8
 260                                  b000 0 0 4 &ipic 16 8
 261
 262                                 /* IDSEL 0x17 */
 263                                  b800 0 0 1 &ipic 16 8
 264                                  b800 0 0 2 &ipic 17 8
 265                                  b800 0 0 3 &ipic 14 8
 266                                  b800 0 0 4 &ipic 15 8
 267
 268                                 /* IDSEL 0x18 */
 269                                  c000 0 0 1 &ipic 15 8
 270                                  c000 0 0 2 &ipic 16 8
 271                                  c000 0 0 3 &ipic 17 8
 272                                  c000 0 0 4 &ipic 14 8>;
 273                 interrupt-parent = < &ipic >;
 274                 interrupts = <42 8>;
 275                 bus-range = <0 0>;
 276                 ranges = <02000000 0 90000000 90000000 0 10000000
 277                           42000000 0 80000000 80000000 0 10000000
 278                           01000000 0 00000000 e2000000 0 00100000>;
 279                 clock-frequency = <3f940aa>;
 280                 #interrupt-cells = <1>;
 281                 #size-cells = <2>;
 282                 #address-cells = <3>;
 283                 reg = <e0008500 100>;
 284                 compatible = "fsl,mpc8349-pci";
 285                 device_type = "pci";
 286         };
 287
 288         pci1: pci@e0008600 {
 289                 cell-index = <2>;
 290                 interrupt-map-mask = <f800 0 0 7>;
 291                 interrupt-map = <
 292
 293                                 /* IDSEL 0x11 */
 294                                  8800 0 0 1 &ipic 14 8
 295                                  8800 0 0 2 &ipic 15 8
 296                                  8800 0 0 3 &ipic 16 8
 297                                  8800 0 0 4 &ipic 17 8
 298
 299                                 /* IDSEL 0x12 */
 300                                  9000 0 0 1 &ipic 16 8
 301                                  9000 0 0 2 &ipic 17 8
 302                                  9000 0 0 3 &ipic 14 8
 303                                  9000 0 0 4 &ipic 15 8
 304
 305                                 /* IDSEL 0x13 */
 306                                  9800 0 0 1 &ipic 17 8
 307                                  9800 0 0 2 &ipic 14 8
 308                                  9800 0 0 3 &ipic 15 8
 309                                  9800 0 0 4 &ipic 16 8
 310
 311                                 /* IDSEL 0x15 */
 312                                  a800 0 0 1 &ipic 14 8
 313                                  a800 0 0 2 &ipic 15 8
 314                                  a800 0 0 3 &ipic 16 8
 315                                  a800 0 0 4 &ipic 17 8
 316
 317                                 /* IDSEL 0x16 */
 318                                  b000 0 0 1 &ipic 17 8
 319                                  b000 0 0 2 &ipic 14 8
 320                                  b000 0 0 3 &ipic 15 8
 321                                  b000 0 0 4 &ipic 16 8
 322
 323                                 /* IDSEL 0x17 */
 324                                  b800 0 0 1 &ipic 16 8
 325                                  b800 0 0 2 &ipic 17 8
 326                                  b800 0 0 3 &ipic 14 8
 327                                  b800 0 0 4 &ipic 15 8
 328
 329                                 /* IDSEL 0x18 */
 330                                  c000 0 0 1 &ipic 15 8
 331                                  c000 0 0 2 &ipic 16 8
 332                                  c000 0 0 3 &ipic 17 8
 333                                  c000 0 0 4 &ipic 14 8>;
 334                 interrupt-parent = < &ipic >;
 335                 interrupts = <42 8>;
 336                 bus-range = <0 0>;
 337                 ranges = <02000000 0 b0000000 b0000000 0 10000000
 338                           42000000 0 a0000000 a0000000 0 10000000
 339                           01000000 0 00000000 e2100000 0 00100000>;
 340                 clock-frequency = <3f940aa>;
 341                 #interrupt-cells = <1>;
 342                 #size-cells = <2>;
 343                 #address-cells = <3>;
 344                 reg = <e0008600 100>;
 345                 compatible = "fsl,mpc8349-pci";
 346                 device_type = "pci";
 347         };
 348 };