2 * Lite5200B board Device Tree Source
4 * Copyright 2006-2007 Secret Lab Technologies Ltd.
5 * Grant Likely <grant.likely@secretlab.ca>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
16 model = "fsl,lite5200b";
17 compatible = "fsl,lite5200b";
20 interrupt-parent = <&mpc5200_pic>;
29 d-cache-line-size = <32>;
30 i-cache-line-size = <32>;
31 d-cache-size = <0x4000>; // L1, 16K
32 i-cache-size = <0x4000>; // L1, 16K
33 timebase-frequency = <0>; // from bootloader
34 bus-frequency = <0>; // from bootloader
35 clock-frequency = <0>; // from bootloader
40 device_type = "memory";
41 reg = <0x00000000 0x10000000>; // 256MB
47 compatible = "fsl,mpc5200b-immr";
48 ranges = <0 0xf0000000 0x0000c000>;
49 reg = <0xf0000000 0x00000100>;
50 bus-frequency = <0>; // from bootloader
51 system-frequency = <0>; // from bootloader
54 compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
58 mpc5200_pic: interrupt-controller@500 {
59 // 5200 interrupts are encoded into two levels;
61 #interrupt-cells = <3>;
62 compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
66 timer@600 { // General Purpose Timer
67 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
73 timer@610 { // General Purpose Timer
74 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
76 interrupts = <1 10 0>;
79 timer@620 { // General Purpose Timer
80 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
82 interrupts = <1 11 0>;
85 timer@630 { // General Purpose Timer
86 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
88 interrupts = <1 12 0>;
91 timer@640 { // General Purpose Timer
92 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
94 interrupts = <1 13 0>;
97 timer@650 { // General Purpose Timer
98 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
100 interrupts = <1 14 0>;
103 timer@660 { // General Purpose Timer
104 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
106 interrupts = <1 15 0>;
109 timer@670 { // General Purpose Timer
110 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
112 interrupts = <1 16 0>;
115 rtc@800 { // Real time clock
116 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
118 interrupts = <1 5 0 1 6 0>;
122 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
123 interrupts = <2 17 0>;
128 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
129 interrupts = <2 18 0>;
133 gpio_simple: gpio@b00 {
134 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
136 interrupts = <1 7 0>;
141 gpio_wkup: gpio@c00 {
142 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
144 interrupts = <1 8 0 0 3 0>;
150 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
152 interrupts = <2 13 0 2 14 0>;
156 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
158 interrupts = <2 6 0>;
161 dma-controller@1200 {
162 compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
164 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
165 3 4 0 3 5 0 3 6 0 3 7 0
166 3 8 0 3 9 0 3 10 0 3 11 0
167 3 12 0 3 13 0 3 14 0 3 15 0>;
171 compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
172 reg = <0x1f00 0x100>;
176 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
177 reg = <0x2000 0x100>;
178 interrupts = <2 1 0>;
181 // PSC2 in ac97 mode example
182 //ac97@2200 { // PSC2
183 // compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97";
185 // reg = <0x2200 0x100>;
186 // interrupts = <2 2 0>;
189 // PSC3 in CODEC mode example
191 // compatible = "fsl,mpc5200b-psc-i2s"; //not 5200 compatible
193 // reg = <0x2400 0x100>;
194 // interrupts = <2 3 0>;
197 // PSC4 in uart mode example
198 //serial@2600 { // PSC4
199 // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
200 // reg = <0x2600 0x100>;
201 // interrupts = <2 11 0>;
204 // PSC5 in uart mode example
205 //serial@2800 { // PSC5
206 // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
207 // reg = <0x2800 0x100>;
208 // interrupts = <2 12 0>;
211 // PSC6 in spi mode example
213 // compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
215 // reg = <0x2c00 0x100>;
216 // interrupts = <2 4 0>;
220 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
221 reg = <0x3000 0x400>;
222 local-mac-address = [ 00 00 00 00 00 00 ];
223 interrupts = <2 5 0>;
224 phy-handle = <&phy0>;
228 #address-cells = <1>;
230 compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
231 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
232 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
234 phy0: ethernet-phy@0 {
240 compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
241 reg = <0x3a00 0x100>;
242 interrupts = <2 7 0>;
246 #address-cells = <1>;
248 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
250 interrupts = <2 15 0>;
254 #address-cells = <1>;
256 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
258 interrupts = <2 16 0>;
261 compatible = "atmel,24c02";
267 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
268 reg = <0x8000 0x4000>;
273 #interrupt-cells = <1>;
275 #address-cells = <3>;
277 compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
278 reg = <0xf0000d00 0x100>;
279 interrupt-map-mask = <0xf800 0 0 7>;
280 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
281 0xc000 0 0 2 &mpc5200_pic 1 1 3
282 0xc000 0 0 3 &mpc5200_pic 1 2 3
283 0xc000 0 0 4 &mpc5200_pic 1 3 3
285 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
286 0xc800 0 0 2 &mpc5200_pic 1 2 3
287 0xc800 0 0 3 &mpc5200_pic 1 3 3
288 0xc800 0 0 4 &mpc5200_pic 0 0 3>;
289 clock-frequency = <0>; // From boot loader
290 interrupts = <2 8 0 2 9 0 2 10 0>;
292 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
293 0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
294 0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
298 compatible = "fsl,mpc5200b-lpb","fsl,mpc5200-lpb","simple-bus";
300 #address-cells = <2>;
303 ranges = <0 0 0xfe000000 0x02000000>;
306 compatible = "cfi-flash";
307 reg = <0 0 0x02000000>;
310 #address-cells = <1>;
314 reg = <0x00000000 0x00200000>;
318 reg = <0x00200000 0x01d00000>;
322 reg = <0x01f00000 0x00060000>;
325 label = "u-boot-env";
326 reg = <0x01f60000 0x00020000>;
330 reg = <0x01f80000 0x00080000>;