arch/powerpc/boot/dts/kuroboxHG.dts

   1 /*
   2  * Device Tree Souce for Buffalo KuroboxHG
   3  *
   4  * Choose CONFIG_LINKSTATION to build a kernel for KuroboxHG, or use
   5  * the default configuration linkstation_defconfig.
   6  *
   7  * Based on sandpoint.dts
   8  *
   9  * 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de>
  10  *
  11  * This file is licensed under
  12  * the terms of the GNU General Public License version 2.  This program
  13  * is licensed "as is" without any warranty of any kind, whether express
  14  * or implied.
  15
  16 XXXX add flash parts, rtc, ??
  17
  18  */
  19
  20 / {
  21         model = "KuroboxHG";
  22         compatible = "linkstation";
  23         #address-cells = <1>;
  24         #size-cells = <1>;
  25
  26         cpus {
  27                 #address-cells = <1>;
  28                 #size-cells = <0>;
  29
  30                 PowerPC,603e { /* Really 8241 */
  31                         device_type = "cpu";
  32                         reg = <0>;
  33                         clock-frequency = <fdad680>;    /* Fixed by bootloader */
  34                         timebase-frequency = <1F04000>; /* Fixed by bootloader */
  35                         bus-frequency = <0>;            /* Fixed by bootloader */
  36                         /* Following required by dtc but not used */
  37                         i-cache-size = <4000>;
  38                         d-cache-size = <4000>;
  39                 };
  40         };
  41
  42         memory {
  43                 device_type = "memory";
  44                 reg = <00000000 08000000>;
  45         };
  46
  47         soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
  48                 #address-cells = <1>;
  49                 #size-cells = <1>;
  50                 #interrupt-cells = <2>;
  51                 device_type = "soc";
  52                 compatible = "mpc10x";
  53                 store-gathering = <0>; /* 0 == off, !0 == on */
  54                 reg = <80000000 00100000>;
  55                 ranges = <80000000 80000000 70000000    /* pci mem space */
  56                           fc000000 fc000000 00100000    /* EUMB */
  57                           fe000000 fe000000 00c00000    /* pci i/o space */
  58                           fec00000 fec00000 00300000    /* pci cfg regs */
  59                           fef00000 fef00000 00100000>;  /* pci iack */
  60
  61                 i2c@80003000 {
  62                         #address-cells = <1>;
  63                         #size-cells = <0>;
  64                         device_type = "i2c";
  65                         compatible = "fsl-i2c";
  66                         reg = <80003000 1000>;
  67                         interrupts = <5 2>;
  68                         interrupt-parent = <&mpic>;
  69
  70                         rtc@32 {
  71                                 device_type = "rtc";
  72                                 compatible = "ricoh,rs5c372b";
  73                                 reg = <32>;
  74                         };
  75                 };
  76
  77                 serial@80004500 {
  78                         device_type = "serial";
  79                         compatible = "ns16550";
  80                         reg = <80004500 8>;
  81                         clock-frequency = <7c044a8>;
  82                         current-speed = <2580>;
  83                         interrupts = <9 2>;
  84                         interrupt-parent = <&mpic>;
  85                 };
  86
  87                 serial@80004600 {
  88                         device_type = "serial";
  89                         compatible = "ns16550";
  90                         reg = <80004600 8>;
  91                         clock-frequency = <7c044a8>;
  92                         current-speed = <e100>;
  93                         interrupts = <a 0>;
  94                         interrupt-parent = <&mpic>;
  95                 };
  96
  97                 mpic: interrupt-controller@80040000 {
  98                         #interrupt-cells = <2>;
  99                         #address-cells = <0>;
 100                         device_type = "open-pic";
 101                         compatible = "chrp,open-pic";
 102                         interrupt-controller;
 103                         reg = <80040000 40000>;
 104                         built-in;
 105                 };
 106
 107                 pci@fec00000 {
 108                         #address-cells = <3>;
 109                         #size-cells = <2>;
 110                         #interrupt-cells = <1>;
 111                         device_type = "pci";
 112                         compatible = "mpc10x-pci";
 113                         reg = <fec00000 400000>;
 114                         ranges = <01000000 0        0 fe000000 0 00c00000
 115                                   02000000 0 80000000 80000000 0 70000000>;
 116                         bus-range = <0 ff>;
 117                         clock-frequency = <7f28155>;
 118                         interrupt-parent = <&mpic>;
 119                         interrupt-map-mask = <f800 0 0 7>;
 120                         interrupt-map = <
 121                                 /* IDSEL 11 - IRQ0 ETH */
 122                                 5800 0 0 1 &mpic 0 1
 123                                 5800 0 0 2 &mpic 1 1
 124                                 5800 0 0 3 &mpic 2 1
 125                                 5800 0 0 4 &mpic 3 1
 126                                 /* IDSEL 12 - IRQ1 IDE0 */
 127                                 6000 0 0 1 &mpic 1 1
 128                                 6000 0 0 2 &mpic 2 1
 129                                 6000 0 0 3 &mpic 3 1
 130                                 6000 0 0 4 &mpic 0 1
 131                                 /* IDSEL 14 - IRQ3 USB2.0 */
 132                                 7000 0 0 1 &mpic 3 1
 133                                 7000 0 0 2 &mpic 3 1
 134                                 7000 0 0 3 &mpic 3 1
 135                                 7000 0 0 4 &mpic 3 1
 136                         >;
 137                 };
 138         };
 139 };