arch/mn10300/unit-asb2305/include/unit/timex.h

   1 /* ASB2305-specific timer specifications
   2  *
   3  * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
   4  * Written by David Howells (dhowells@redhat.com)
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public Licence
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the Licence, or (at your option) any later version.
  10  */
  11 #ifndef _ASM_UNIT_TIMEX_H
  12 #define _ASM_UNIT_TIMEX_H
  13
  14 #ifndef __ASSEMBLY__
  15 #include <linux/irq.h>
  16 #endif /* __ASSEMBLY__ */
  17
  18 #include <asm/timer-regs.h>
  19 #include <unit/clock.h>
  20 #include <asm/param.h>
  21
  22 /*
  23  * jiffies counter specifications
  24  */
  25
  26 #define TMJCBR_MAX              0xffff
  27 #define TMJCBC                  TM01BC
  28
  29 #define TMJCMD                  TM01MD
  30 #define TMJCBR                  TM01BR
  31 #define TMJCIRQ                 TM1IRQ
  32 #define TMJCICR                 TM1ICR
  33
  34 #ifndef __ASSEMBLY__
  35
  36 #define MN10300_SRC_IOCLK       MN10300_IOCLK
  37
  38 #ifndef HZ
  39 # error HZ undeclared.
  40 #endif /* !HZ */
  41 /* use as little prescaling as possible to avoid losing accuracy */
  42 #if (MN10300_SRC_IOCLK + HZ / 2) / HZ - 1 <= TMJCBR_MAX
  43 # define IOCLK_PRESCALE         1
  44 # define JC_TIMER_CLKSRC        TM0MD_SRC_IOCLK
  45 # define TSC_TIMER_CLKSRC       TM4MD_SRC_IOCLK
  46 #elif (MN10300_SRC_IOCLK / 8 + HZ / 2) / HZ - 1 <= TMJCBR_MAX
  47 # define IOCLK_PRESCALE         8
  48 # define JC_TIMER_CLKSRC        TM0MD_SRC_IOCLK_8
  49 # define TSC_TIMER_CLKSRC       TM4MD_SRC_IOCLK_8
  50 #elif (MN10300_SRC_IOCLK / 32 + HZ / 2) / HZ - 1 <= TMJCBR_MAX
  51 # define IOCLK_PRESCALE         32
  52 # define JC_TIMER_CLKSRC        TM0MD_SRC_IOCLK_32
  53 # define TSC_TIMER_CLKSRC       TM4MD_SRC_IOCLK_32
  54 #else
  55 # error You lose.
  56 #endif
  57
  58 #define MN10300_JCCLK           (MN10300_SRC_IOCLK / IOCLK_PRESCALE)
  59 #define MN10300_TSCCLK          (MN10300_SRC_IOCLK / IOCLK_PRESCALE)
  60
  61 #define MN10300_JC_PER_HZ       ((MN10300_JCCLK + HZ / 2) / HZ)
  62 #define MN10300_TSC_PER_HZ      ((MN10300_TSCCLK + HZ / 2) / HZ)
  63
  64 static inline void startup_jiffies_counter(void)
  65 {
  66         u16 md, t16;
  67
  68         md = JC_TIMER_CLKSRC;
  69         TMJCBR = MN10300_JC_PER_HZ - 1;
  70         t16 = TMJCBR;
  71
  72         TMJCMD =
  73                 md |
  74                 TM1MD_SRC_TM0CASCADE << 8 |
  75                 TM0MD_INIT_COUNTER |
  76                 TM1MD_INIT_COUNTER << 8;
  77
  78         TMJCMD =
  79                 md |
  80                 TM1MD_SRC_TM0CASCADE << 8 |
  81                 TM0MD_COUNT_ENABLE |
  82                 TM1MD_COUNT_ENABLE << 8;
  83
  84         t16 = TMJCMD;
  85
  86         TMJCICR |= GxICR_ENABLE | GxICR_DETECT | GxICR_REQUEST;
  87         t16 = TMJCICR;
  88 }
  89
  90 static inline void shutdown_jiffies_counter(void)
  91 {
  92 }
  93
  94 #endif /* !__ASSEMBLY__ */
  95
  96
  97 /*
  98  * timestamp counter specifications
  99  */
 100
 101 #define TMTSCBR_MAX             0xffffffff
 102 #define TMTSCBC                 TM45BC
 103
 104 #ifndef __ASSEMBLY__
 105
 106 static inline void startup_timestamp_counter(void)
 107 {
 108         u32 t32;
 109
 110         /* set up timer 4 & 5 cascaded as a 32-bit counter to count real time
 111          * - count down from 4Gig-1 to 0 and wrap at IOCLK rate
 112          */
 113         TM45BR = TMTSCBR_MAX;
 114         t32 = TM45BR;
 115
 116         TM4MD = TSC_TIMER_CLKSRC;
 117         TM4MD |= TM4MD_INIT_COUNTER;
 118         TM4MD &= ~TM4MD_INIT_COUNTER;
 119         TM4ICR = 0;
 120         t32 = TM4ICR;
 121
 122         TM5MD = TM5MD_SRC_TM4CASCADE;
 123         TM5MD |= TM5MD_INIT_COUNTER;
 124         TM5MD &= ~TM5MD_INIT_COUNTER;
 125         TM5ICR = 0;
 126         t32 = TM5ICR;
 127
 128         TM5MD |= TM5MD_COUNT_ENABLE;
 129         TM4MD |= TM4MD_COUNT_ENABLE;
 130         t32 = TM5MD;
 131         t32 = TM4MD;
 132 }
 133
 134 static inline void shutdown_timestamp_counter(void)
 135 {
 136         u8 t8;
 137         TM4MD = 0;
 138         TM5MD = 0;
 139         t8 = TM4MD;
 140         t8 = TM5MD;
 141 }
 142
 143 /*
 144  * we use a cascaded pair of 16-bit down-counting timers to count I/O
 145  * clock cycles for the purposes of time keeping
 146  */
 147 typedef unsigned long cycles_t;
 148
 149 static inline cycles_t read_timestamp_counter(void)
 150 {
 151         return (cycles_t)TMTSCBC;
 152 }
 153
 154 #endif /* !__ASSEMBLY__ */
 155
 156 #endif /* _ASM_UNIT_TIMEX_H */