2 * Copyright 2001, 2002, 2003 MontaVista Software Inc.
3 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
4 * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
6 * Common time service routines for MIPS machines. See
7 * Documents/MIPS/README.txt.
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
14 #include <linux/types.h>
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/sched.h>
18 #include <linux/param.h>
19 #include <linux/time.h>
20 #include <linux/timer.h>
21 #include <linux/smp.h>
22 #include <linux/kernel_stat.h>
23 #include <linux/spinlock.h>
24 #include <linux/interrupt.h>
26 #include <asm/bootinfo.h>
29 #include <asm/hardirq.h>
30 #include <asm/div64.h>
31 #include <asm/debug.h>
36 static unsigned long cpj;
38 static cycle_t hpt_read(void)
40 return read_c0_count2();
43 static struct clocksource pnx_clocksource = {
47 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
50 static void timer_ack(void)
52 write_c0_compare(cpj);
55 static irqreturn_t pnx8xxx_timer_interrupt(int irq, void *dev_id)
57 struct clock_event_device *c = dev_id;
59 /* clear MATCH, signal the event */
65 static struct irqaction pnx8xxx_timer_irq = {
66 .handler = pnx8xxx_timer_interrupt,
67 .flags = IRQF_DISABLED | IRQF_PERCPU,
68 .name = "pnx8xxx_timer",
71 static irqreturn_t monotonic_interrupt(int irq, void *dev_id)
73 /* Timer 2 clear interrupt */
74 write_c0_compare2(-1);
78 static struct irqaction monotonic_irqaction = {
79 .handler = monotonic_interrupt,
80 .flags = IRQF_DISABLED,
81 .name = "Monotonic timer",
84 static int pnx8xxx_set_next_event(unsigned long delta,
85 struct clock_event_device *evt)
87 write_c0_compare(delta);
91 static struct clock_event_device pnx8xxx_clockevent = {
92 .name = "pnx8xxx_clockevent",
93 .features = CLOCK_EVT_FEAT_ONESHOT,
94 .set_next_event = pnx8xxx_set_next_event,
98 * plat_time_init() - it does the following things:
100 * 1) plat_time_init() -
101 * a) (optional) set up RTC routines,
102 * b) (optional) calibrate and set the mips_hpt_frequency
103 * (only needed if you intended to use cpu counter as timer interrupt
107 __init void plat_time_init(void)
109 unsigned int configPR;
115 clockevents_register_device(&pnx8xxx_clockevent);
116 clocksource_register(&pnx_clocksource);
118 setup_irq(PNX8550_INT_TIMER1, &pnx8xxx_timer_irq);
119 setup_irq(PNX8550_INT_TIMER2, &monotonic_irqaction);
122 configPR = read_c0_config7();
123 configPR &= ~0x00000008;
124 write_c0_config7(configPR);
127 configPR = read_c0_config7();
128 configPR &= ~0x00000010;
129 write_c0_config7(configPR);
132 configPR = read_c0_config7();
133 configPR |= 0x00000020;
134 write_c0_config7(configPR);
137 /* PLL0 sets MIPS clock (PLL1 <=> TM1, PLL6 <=> TM2, PLL5 <=> mem) */
138 /* (but only if CLK_MIPS_CTL select value [bits 3:1] is 1: FIXME) */
140 n = (PNX8550_CM_PLL0_CTL & PNX8550_CM_PLL_N_MASK) >> 16;
141 m = (PNX8550_CM_PLL0_CTL & PNX8550_CM_PLL_M_MASK) >> 8;
142 p = (PNX8550_CM_PLL0_CTL & PNX8550_CM_PLL_P_MASK) >> 2;
145 db_assert(m != 0 && pow2p != 0);
148 * Compute the frequency as in the PNX8550 User Manual 1.0, p.186
149 * (a.k.a. 8-10). Divide by HZ for a timer offset that results in
150 * HZ timer interrupts per second.
152 mips_hpt_frequency = 27UL * ((1000000UL * n)/(m * pow2p));
153 cpj = (mips_hpt_frequency + HZ / 2) / HZ;
159 write_c0_compare2(0xffffffff);