Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wirel...
[pandora-kernel.git] / arch / m32r / platforms / mappi2 / setup.c
1 /*
2  *  linux/arch/m32r/platforms/mappi2/setup.c
3  *
4  *  Setup routines for Renesas MAPPI-II(M3A-ZA36) Board
5  *
6  *  Copyright (c) 2001-2005  Hiroyuki Kondo, Hirokazu Takata,
7  *                           Hitoshi Yamamoto, Mamoru Sakugawa
8  */
9
10 #include <linux/irq.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
14
15 #include <asm/system.h>
16 #include <asm/m32r.h>
17 #include <asm/io.h>
18
19 #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
20
21 icu_data_t icu_data[NR_IRQS];
22
23 static void disable_mappi2_irq(unsigned int irq)
24 {
25         unsigned long port, data;
26
27         if ((irq == 0) ||(irq >= NR_IRQS))  {
28                 printk("bad irq 0x%08x\n", irq);
29                 return;
30         }
31         port = irq2port(irq);
32         data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
33         outl(data, port);
34 }
35
36 static void enable_mappi2_irq(unsigned int irq)
37 {
38         unsigned long port, data;
39
40         if ((irq == 0) ||(irq >= NR_IRQS))  {
41                 printk("bad irq 0x%08x\n", irq);
42                 return;
43         }
44         port = irq2port(irq);
45         data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
46         outl(data, port);
47 }
48
49 static void mask_mappi2(struct irq_data *data)
50 {
51         disable_mappi2_irq(data->irq);
52 }
53
54 static void unmask_mappi2(struct irq_data *data)
55 {
56         enable_mappi2_irq(data->irq);
57 }
58
59 static void shutdown_mappi2(struct irq_data *data)
60 {
61         unsigned long port;
62
63         port = irq2port(data->irq);
64         outl(M32R_ICUCR_ILEVEL7, port);
65 }
66
67 static struct irq_chip mappi2_irq_type =
68 {
69         .name           = "MAPPI2-IRQ",
70         .irq_shutdown   = shutdown_mappi2,
71         .irq_mask       = mask_mappi2,
72         .irq_unmask     = unmask_mappi2,
73 };
74
75 void __init init_IRQ(void)
76 {
77 #if defined(CONFIG_SMC91X)
78         /* INT0 : LAN controller (SMC91111) */
79         set_irq_chip_and_handler(M32R_IRQ_INT0, &mappi2_irq_type,
80                                  handle_level_irq);
81         icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
82         disable_mappi2_irq(M32R_IRQ_INT0);
83 #endif  /* CONFIG_SMC91X */
84
85         /* MFT2 : system timer */
86         set_irq_chip_and_handler(M32R_IRQ_MFT2, &mappi2_irq_type,
87                                  handle_level_irq);
88         icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
89         disable_mappi2_irq(M32R_IRQ_MFT2);
90
91 #ifdef CONFIG_SERIAL_M32R_SIO
92         /* SIO0_R : uart receive data */
93         set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &mappi2_irq_type,
94                                  handle_level_irq);
95         icu_data[M32R_IRQ_SIO0_R].icucr = 0;
96         disable_mappi2_irq(M32R_IRQ_SIO0_R);
97
98         /* SIO0_S : uart send data */
99         set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &mappi2_irq_type,
100                                  handle_level_irq);
101         icu_data[M32R_IRQ_SIO0_S].icucr = 0;
102         disable_mappi2_irq(M32R_IRQ_SIO0_S);
103         /* SIO1_R : uart receive data */
104         set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &mappi2_irq_type,
105                                  handle_level_irq);
106         icu_data[M32R_IRQ_SIO1_R].icucr = 0;
107         disable_mappi2_irq(M32R_IRQ_SIO1_R);
108
109         /* SIO1_S : uart send data */
110         set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &mappi2_irq_type,
111                                  handle_level_irq);
112         icu_data[M32R_IRQ_SIO1_S].icucr = 0;
113         disable_mappi2_irq(M32R_IRQ_SIO1_S);
114 #endif  /* CONFIG_M32R_USE_DBG_CONSOLE */
115
116 #if defined(CONFIG_USB)
117         /* INT1 : USB Host controller interrupt */
118         set_irq_chip_and_handler(M32R_IRQ_INT1, &mappi2_irq_type,
119                                  handle_level_irq);
120         icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
121         disable_mappi2_irq(M32R_IRQ_INT1);
122 #endif /* CONFIG_USB */
123
124         /* ICUCR40: CFC IREQ */
125         set_irq_chip_and_handler(PLD_IRQ_CFIREQ, &mappi2_irq_type,
126                                  handle_level_irq);
127         icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
128         disable_mappi2_irq(PLD_IRQ_CFIREQ);
129
130 #if defined(CONFIG_M32R_CFC)
131         /* ICUCR41: CFC Insert */
132         set_irq_chip_and_handler(PLD_IRQ_CFC_INSERT, &mappi2_irq_type,
133                                  handle_level_irq);
134         icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
135         disable_mappi2_irq(PLD_IRQ_CFC_INSERT);
136
137         /* ICUCR42: CFC Eject */
138         set_irq_chip_and_handler(PLD_IRQ_CFC_EJECT, &mappi2_irq_type,
139                                  handle_level_irq);
140         icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
141         disable_mappi2_irq(PLD_IRQ_CFC_EJECT);
142 #endif /* CONFIG_MAPPI2_CFC */
143 }
144
145 #define LAN_IOSTART     0x300
146 #define LAN_IOEND       0x320
147 static struct resource smc91x_resources[] = {
148         [0] = {
149                 .start  = (LAN_IOSTART),
150                 .end    = (LAN_IOEND),
151                 .flags  = IORESOURCE_MEM,
152         },
153         [1] = {
154                 .start  = M32R_IRQ_INT0,
155                 .end    = M32R_IRQ_INT0,
156                 .flags  = IORESOURCE_IRQ,
157         }
158 };
159
160 static struct platform_device smc91x_device = {
161         .name           = "smc91x",
162         .id             = 0,
163         .num_resources  = ARRAY_SIZE(smc91x_resources),
164         .resource       = smc91x_resources,
165 };
166
167 static int __init platform_init(void)
168 {
169         platform_device_register(&smc91x_device);
170         return 0;
171 }
172 arch_initcall(platform_init);