2 * linux/arch/m32r/mm/fault.c
4 * Copyright (c) 2001, 2002 Hitoshi Yamamoto, and H. Kondo
5 * Copyright (c) 2004 Naoto Sugai, NIIBE Yutaka
7 * Some code taken from i386 version.
8 * Copyright (C) 1995 Linus Torvalds
11 #include <linux/signal.h>
12 #include <linux/sched.h>
13 #include <linux/kernel.h>
14 #include <linux/errno.h>
15 #include <linux/string.h>
16 #include <linux/types.h>
17 #include <linux/ptrace.h>
18 #include <linux/mman.h>
20 #include <linux/smp.h>
21 #include <linux/interrupt.h>
22 #include <linux/init.h>
23 #include <linux/tty.h>
24 #include <linux/vt_kern.h> /* For unblank_screen() */
25 #include <linux/highmem.h>
26 #include <linux/module.h>
29 #include <asm/system.h>
30 #include <asm/uaccess.h>
31 #include <asm/hardirq.h>
32 #include <asm/mmu_context.h>
33 #include <asm/tlbflush.h>
35 extern void die(const char *, struct pt_regs *, long);
38 asmlinkage unsigned int tlb_entry_i_dat;
39 asmlinkage unsigned int tlb_entry_d_dat;
40 #define tlb_entry_i tlb_entry_i_dat
41 #define tlb_entry_d tlb_entry_d_dat
43 unsigned int tlb_entry_i_dat[NR_CPUS];
44 unsigned int tlb_entry_d_dat[NR_CPUS];
45 #define tlb_entry_i tlb_entry_i_dat[smp_processor_id()]
46 #define tlb_entry_d tlb_entry_d_dat[smp_processor_id()]
49 extern void init_tlb(void);
51 /*======================================================================*
53 *======================================================================*
54 * This routine handles page faults. It determines the address,
55 * and the problem, and then passes it off to one of the appropriate
60 * error_code : See below
61 * address : M32R MMU MDEVA reg. (Operand ACE)
62 * : M32R BPC reg. (Instruction ACE)
65 * bit 0 == 0 means no page found, 1 means protection fault
66 * bit 1 == 0 means read, 1 means write
67 * bit 2 == 0 means kernel, 1 means user-mode
68 * bit 3 == 0 means data, 1 means instruction
69 *======================================================================*/
70 #define ACE_PROTECTION 1
72 #define ACE_USERMODE 4
73 #define ACE_INSTRUCTION 8
75 asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long error_code,
76 unsigned long address)
78 struct task_struct *tsk;
80 struct vm_area_struct * vma;
81 unsigned long page, addr;
87 * If BPSW IE bit enable --> set PSW IE bit
89 if (regs->psw & M32R_PSW_BIE)
94 info.si_code = SEGV_MAPERR;
97 * We fault-in kernel-space virtual memory on-demand. The
98 * 'reference' page table is init_mm.pgd.
100 * NOTE! We MUST NOT take any locks for this case. We may
101 * be in an interrupt or a critical region, and should
102 * only copy the information from the master page table,
105 * This verifies that the fault happens in kernel space
106 * (error_code & ACE_USERMODE) == 0, and that the fault was not a
107 * protection error (error_code & ACE_PROTECTION) == 0.
109 if (address >= TASK_SIZE && !(error_code & ACE_USERMODE))
115 * If we're in an interrupt or have no user context or are running in an
116 * atomic region then we must not take the fault..
118 if (in_atomic() || !mm)
119 goto bad_area_nosemaphore;
121 /* When running in the kernel we expect faults to occur only to
122 * addresses in user space. All other faults represent errors in the
123 * kernel and should generate an OOPS. Unfortunately, in the case of an
124 * erroneous fault occurring in a code path which already holds mmap_sem
125 * we will deadlock attempting to validate the fault against the
126 * address space. Luckily the kernel only validly references user
127 * space from well defined areas of code, which are listed in the
130 * As the vast majority of faults will be valid we will only perform
131 * the source reference check when there is a possibility of a deadlock.
132 * Attempt to lock the address space, if we cannot we then validate the
133 * source. If this is invalid we can skip the address space check,
134 * thus avoiding the deadlock.
136 if (!down_read_trylock(&mm->mmap_sem)) {
137 if ((error_code & ACE_USERMODE) == 0 &&
138 !search_exception_tables(regs->psw))
139 goto bad_area_nosemaphore;
140 down_read(&mm->mmap_sem);
143 vma = find_vma(mm, address);
146 if (vma->vm_start <= address)
148 if (!(vma->vm_flags & VM_GROWSDOWN))
151 if (error_code & ACE_USERMODE) {
153 * accessing the stack below "spu" is always a bug.
154 * The "+ 4" is there due to the push instruction
155 * doing pre-decrement on the stack and that
156 * doesn't show up until later..
158 if (address + 4 < regs->spu)
162 if (expand_stack(vma, address))
165 * Ok, we have a good vm_area for this memory access, so
169 info.si_code = SEGV_ACCERR;
171 switch (error_code & (ACE_WRITE|ACE_PROTECTION)) {
172 default: /* 3: write, present */
174 case ACE_WRITE: /* write, not present */
175 if (!(vma->vm_flags & VM_WRITE))
179 case ACE_PROTECTION: /* read, present */
180 case 0: /* read, not present */
181 if (!(vma->vm_flags & (VM_READ | VM_EXEC)))
186 * For instruction access exception, check if the area is executable
188 if ((error_code & ACE_INSTRUCTION) && !(vma->vm_flags & VM_EXEC))
192 * If for any reason at all we couldn't handle the fault,
193 * make sure we exit gracefully rather than endlessly redo
196 addr = (address & PAGE_MASK);
197 set_thread_fault_code(error_code);
198 fault = handle_mm_fault(mm, vma, addr, write ? FAULT_FLAG_WRITE : 0);
199 if (unlikely(fault & VM_FAULT_ERROR)) {
200 if (fault & VM_FAULT_OOM)
202 else if (fault & VM_FAULT_SIGSEGV)
204 else if (fault & VM_FAULT_SIGBUS)
208 if (fault & VM_FAULT_MAJOR)
212 set_thread_fault_code(0);
213 up_read(&mm->mmap_sem);
217 * Something tried to access memory that isn't in our memory map..
218 * Fix it, but check if it's kernel or user first..
221 up_read(&mm->mmap_sem);
223 bad_area_nosemaphore:
224 /* User mode accesses just cause a SIGSEGV */
225 if (error_code & ACE_USERMODE) {
226 tsk->thread.address = address;
227 tsk->thread.error_code = error_code | (address >= TASK_SIZE);
228 tsk->thread.trap_no = 14;
229 info.si_signo = SIGSEGV;
231 /* info.si_code has been set above */
232 info.si_addr = (void __user *)address;
233 force_sig_info(SIGSEGV, &info, tsk);
238 /* Are we prepared to handle this kernel fault? */
239 if (fixup_exception(regs))
243 * Oops. The kernel tried to access some bad page. We'll have to
244 * terminate things with extreme prejudice.
249 if (address < PAGE_SIZE)
250 printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference");
252 printk(KERN_ALERT "Unable to handle kernel paging request");
253 printk(" at virtual address %08lx\n",address);
254 printk(KERN_ALERT " printing bpc:\n");
255 printk("%08lx\n", regs->bpc);
256 page = *(unsigned long *)MPTB;
257 page = ((unsigned long *) page)[address >> PGDIR_SHIFT];
258 printk(KERN_ALERT "*pde = %08lx\n", page);
259 if (page & _PAGE_PRESENT) {
261 address &= 0x003ff000;
262 page = ((unsigned long *) __va(page))[address >> PAGE_SHIFT];
263 printk(KERN_ALERT "*pte = %08lx\n", page);
265 die("Oops", regs, error_code);
270 * We ran out of memory, or some other thing happened to us that made
271 * us unable to handle the page fault gracefully.
274 up_read(&mm->mmap_sem);
275 if (!(error_code & ACE_USERMODE))
277 pagefault_out_of_memory();
281 up_read(&mm->mmap_sem);
283 /* Kernel mode? Handle exception or die */
284 if (!(error_code & ACE_USERMODE))
287 tsk->thread.address = address;
288 tsk->thread.error_code = error_code;
289 tsk->thread.trap_no = 14;
290 info.si_signo = SIGBUS;
292 info.si_code = BUS_ADRERR;
293 info.si_addr = (void __user *)address;
294 force_sig_info(SIGBUS, &info, tsk);
300 * Synchronize this task's top level page-table
301 * with the 'reference' page table.
303 * Do _not_ use "tsk" here. We might be inside
304 * an interrupt in the middle of a task switch..
306 int offset = pgd_index(address);
311 pgd = (pgd_t *)*(unsigned long *)MPTB;
312 pgd = offset + (pgd_t *)pgd;
313 pgd_k = init_mm.pgd + offset;
315 if (!pgd_present(*pgd_k))
319 * set_pgd(pgd, *pgd_k); here would be useless on PAE
320 * and redundant with the set_pmd() on non-PAE.
323 pmd = pmd_offset(pgd, address);
324 pmd_k = pmd_offset(pgd_k, address);
325 if (!pmd_present(*pmd_k))
327 set_pmd(pmd, *pmd_k);
329 pte_k = pte_offset_kernel(pmd_k, address);
330 if (!pte_present(*pte_k))
333 addr = (address & PAGE_MASK);
334 set_thread_fault_code(error_code);
335 update_mmu_cache(NULL, addr, pte_k);
336 set_thread_fault_code(0);
341 /*======================================================================*
343 *======================================================================*/
344 #define TLB_MASK (NR_TLB_ENTRIES - 1)
345 #define ITLB_END (unsigned long *)(ITLB_BASE + (NR_TLB_ENTRIES * 8))
346 #define DTLB_END (unsigned long *)(DTLB_BASE + (NR_TLB_ENTRIES * 8))
347 void update_mmu_cache(struct vm_area_struct *vma, unsigned long vaddr,
350 volatile unsigned long *entry1, *entry2;
351 unsigned long pte_data, flags;
352 unsigned int *entry_dat;
353 int inst = get_thread_fault_code() & ACE_INSTRUCTION;
356 /* Ptrace may call this routine. */
357 if (vma && current->active_mm != vma->vm_mm)
360 local_irq_save(flags);
362 vaddr = (vaddr & PAGE_MASK) | get_asid();
364 pte_data = pte_val(*ptep);
366 #ifdef CONFIG_CHIP_OPSP
367 entry1 = (unsigned long *)ITLB_BASE;
368 for (i = 0; i < NR_TLB_ENTRIES; i++) {
369 if (*entry1++ == vaddr) {
370 set_tlb_data(entry1, pte_data);
375 entry2 = (unsigned long *)DTLB_BASE;
376 for (i = 0; i < NR_TLB_ENTRIES; i++) {
377 if (*entry2++ == vaddr) {
378 set_tlb_data(entry2, pte_data);
386 * entry1: ITLB entry address
387 * entry2: DTLB entry address
389 __asm__ __volatile__ (
390 "seth %0, #high(%4) \n\t"
391 "st %2, @(%5, %0) \n\t"
393 "st %1, @(%6, %0) \n\t"
394 "add3 r4, %0, %7 \n\t"
397 "ld %1, @(%6, %0) \n\t"
403 : "=&r" (entry1), "=&r" (entry2)
404 : "r" (vaddr), "r" (pte_data), "i" (MMU_REG_BASE),
405 "i" (MSVA_offset), "i" (MTOP_offset), "i" (MIDXI_offset)
410 if ((!inst && entry2 >= DTLB_END) || (inst && entry1 >= ITLB_END))
414 local_irq_restore(flags);
418 /* Valid entry not found */
421 * Update ITLB or DTLB entry
422 * entry1: TLB entry address
423 * entry2: TLB base address
426 entry2 = (unsigned long *)DTLB_BASE;
427 entry_dat = &tlb_entry_d;
429 entry2 = (unsigned long *)ITLB_BASE;
430 entry_dat = &tlb_entry_i;
432 entry1 = entry2 + (((*entry_dat - 1) & TLB_MASK) << 1);
434 for (i = 0 ; i < NR_TLB_ENTRIES ; i++) {
435 if (!(entry1[1] & 2)) /* Valid bit check */
438 if (entry1 != entry2)
441 entry1 += TLB_MASK << 1;
444 if (i >= NR_TLB_ENTRIES) { /* Empty entry not found */
445 entry1 = entry2 + (*entry_dat << 1);
446 *entry_dat = (*entry_dat + 1) & TLB_MASK;
448 *entry1++ = vaddr; /* Set TLB tag */
449 set_tlb_data(entry1, pte_data);
454 /*======================================================================*
455 * flush_tlb_page() : flushes one page
456 *======================================================================*/
457 void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
459 if (vma->vm_mm && mm_context(vma->vm_mm) != NO_CONTEXT) {
462 local_irq_save(flags);
464 page |= (mm_context(vma->vm_mm) & MMU_CONTEXT_ASID_MASK);
465 __flush_tlb_page(page);
466 local_irq_restore(flags);
470 /*======================================================================*
471 * flush_tlb_range() : flushes a range of pages
472 *======================================================================*/
473 void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
476 struct mm_struct *mm;
479 if (mm_context(mm) != NO_CONTEXT) {
483 local_irq_save(flags);
484 size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
485 if (size > (NR_TLB_ENTRIES / 4)) { /* Too many TLB to flush */
486 mm_context(mm) = NO_CONTEXT;
487 if (mm == current->mm)
488 activate_context(mm);
492 asid = mm_context(mm) & MMU_CONTEXT_ASID_MASK;
494 end += (PAGE_SIZE - 1);
499 while (start < end) {
500 __flush_tlb_page(start);
504 local_irq_restore(flags);
508 /*======================================================================*
509 * flush_tlb_mm() : flushes the specified mm context TLB's
510 *======================================================================*/
511 void local_flush_tlb_mm(struct mm_struct *mm)
513 /* Invalidate all TLB of this process. */
514 /* Instead of invalidating each TLB, we get new MMU context. */
515 if (mm_context(mm) != NO_CONTEXT) {
518 local_irq_save(flags);
519 mm_context(mm) = NO_CONTEXT;
520 if (mm == current->mm)
521 activate_context(mm);
522 local_irq_restore(flags);
526 /*======================================================================*
527 * flush_tlb_all() : flushes all processes TLBs
528 *======================================================================*/
529 void local_flush_tlb_all(void)
533 local_irq_save(flags);
535 local_irq_restore(flags);
538 /*======================================================================*
540 *======================================================================*/
541 void __init init_mmu(void)
545 mmu_context_cache = MMU_CONTEXT_FIRST_VERSION;
546 set_asid(mmu_context_cache & MMU_CONTEXT_ASID_MASK);
547 *(volatile unsigned long *)MPTB = (unsigned long)swapper_pg_dir;