arch/ia64/mm/tlb.c

   1 /*
   2  * TLB support routines.
   3  *
   4  * Copyright (C) 1998-2001, 2003 Hewlett-Packard Co
   5  *      David Mosberger-Tang <davidm@hpl.hp.com>
   6  *
   7  * 08/02/00 A. Mallick <asit.k.mallick@intel.com>
   8  *              Modified RID allocation for SMP
   9  *          Goutham Rao <goutham.rao@intel.com>
  10  *              IPI based ptc implementation and A-step IPI implementation.
  11  */
  12 #include <linux/config.h>
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/kernel.h>
  16 #include <linux/sched.h>
  17 #include <linux/smp.h>
  18 #include <linux/mm.h>
  19
  20 #include <asm/delay.h>
  21 #include <asm/mmu_context.h>
  22 #include <asm/pgalloc.h>
  23 #include <asm/pal.h>
  24 #include <asm/tlbflush.h>
  25
  26 static struct {
  27         unsigned long mask;     /* mask of supported purge page-sizes */
  28         unsigned long max_bits; /* log2() of largest supported purge page-size */
  29 } purge;
  30
  31 struct ia64_ctx ia64_ctx = {
  32         .lock =         SPIN_LOCK_UNLOCKED,
  33         .next =         1,
  34         .limit =        (1 << 15) - 1,          /* start out with the safe (architected) limit */
  35         .max_ctx =      ~0U
  36 };
  37
  38 DEFINE_PER_CPU(u8, ia64_need_tlb_flush);
  39
  40 /*
  41  * Acquire the ia64_ctx.lock before calling this function!
  42  */
  43 void
  44 wrap_mmu_context (struct mm_struct *mm)
  45 {
  46         unsigned long tsk_context, max_ctx = ia64_ctx.max_ctx;
  47         struct task_struct *tsk;
  48         int i;
  49
  50         if (ia64_ctx.next > max_ctx)
  51                 ia64_ctx.next = 300;    /* skip daemons */
  52         ia64_ctx.limit = max_ctx + 1;
  53
  54         /*
  55          * Scan all the task's mm->context and set proper safe range
  56          */
  57
  58         read_lock(&tasklist_lock);
  59   repeat:
  60         for_each_process(tsk) {
  61                 if (!tsk->mm)
  62                         continue;
  63                 tsk_context = tsk->mm->context;
  64                 if (tsk_context == ia64_ctx.next) {
  65                         if (++ia64_ctx.next >= ia64_ctx.limit) {
  66                                 /* empty range: reset the range limit and start over */
  67                                 if (ia64_ctx.next > max_ctx)
  68                                         ia64_ctx.next = 300;
  69                                 ia64_ctx.limit = max_ctx + 1;
  70                                 goto repeat;
  71                         }
  72                 }
  73                 if ((tsk_context > ia64_ctx.next) && (tsk_context < ia64_ctx.limit))
  74                         ia64_ctx.limit = tsk_context;
  75         }
  76         read_unlock(&tasklist_lock);
  77         /* can't call flush_tlb_all() here because of race condition with O(1) scheduler [EF] */
  78         {
  79                 int cpu = get_cpu(); /* prevent preemption/migration */
  80                 for_each_online_cpu(i) {
  81                         if (i != cpu)
  82                                 per_cpu(ia64_need_tlb_flush, i) = 1;
  83                 }
  84                 put_cpu();
  85         }
  86         local_flush_tlb_all();
  87 }
  88
  89 void
  90 ia64_global_tlb_purge (struct mm_struct *mm, unsigned long start, unsigned long end, unsigned long nbits)
  91 {
  92         static DEFINE_SPINLOCK(ptcg_lock);
  93
  94         if (mm != current->active_mm) {
  95                 flush_tlb_all();
  96                 return;
  97         }
  98
  99         /* HW requires global serialization of ptc.ga.  */
 100         spin_lock(&ptcg_lock);
 101         {
 102                 do {
 103                         /*
 104                          * Flush ALAT entries also.
 105                          */
 106                         ia64_ptcga(start, (nbits<<2));
 107                         ia64_srlz_i();
 108                         start += (1UL << nbits);
 109                 } while (start < end);
 110         }
 111         spin_unlock(&ptcg_lock);
 112 }
 113
 114 void
 115 local_flush_tlb_all (void)
 116 {
 117         unsigned long i, j, flags, count0, count1, stride0, stride1, addr;
 118
 119         addr    = local_cpu_data->ptce_base;
 120         count0  = local_cpu_data->ptce_count[0];
 121         count1  = local_cpu_data->ptce_count[1];
 122         stride0 = local_cpu_data->ptce_stride[0];
 123         stride1 = local_cpu_data->ptce_stride[1];
 124
 125         local_irq_save(flags);
 126         for (i = 0; i < count0; ++i) {
 127                 for (j = 0; j < count1; ++j) {
 128                         ia64_ptce(addr);
 129                         addr += stride1;
 130                 }
 131                 addr += stride0;
 132         }
 133         local_irq_restore(flags);
 134         ia64_srlz_i();                  /* srlz.i implies srlz.d */
 135 }
 136
 137 void
 138 flush_tlb_range (struct vm_area_struct *vma, unsigned long start, unsigned long end)
 139 {
 140         struct mm_struct *mm = vma->vm_mm;
 141         unsigned long size = end - start;
 142         unsigned long nbits;
 143
 144 #ifndef CONFIG_SMP
 145         if (mm != current->active_mm) {
 146                 mm->context = 0;
 147                 return;
 148         }
 149 #endif
 150
 151         nbits = ia64_fls(size + 0xfff);
 152         while (unlikely (((1UL << nbits) & purge.mask) == 0) && (nbits < purge.max_bits))
 153                 ++nbits;
 154         if (nbits > purge.max_bits)
 155                 nbits = purge.max_bits;
 156         start &= ~((1UL << nbits) - 1);
 157
 158 # ifdef CONFIG_SMP
 159         platform_global_tlb_purge(mm, start, end, nbits);
 160 # else
 161         do {
 162                 ia64_ptcl(start, (nbits<<2));
 163                 start += (1UL << nbits);
 164         } while (start < end);
 165 # endif
 166
 167         ia64_srlz_i();                  /* srlz.i implies srlz.d */
 168 }
 169 EXPORT_SYMBOL(flush_tlb_range);
 170
 171 void __devinit
 172 ia64_tlb_init (void)
 173 {
 174         ia64_ptce_info_t ptce_info;
 175         unsigned long tr_pgbits;
 176         long status;
 177
 178         if ((status = ia64_pal_vm_page_size(&tr_pgbits, &purge.mask)) != 0) {
 179                 printk(KERN_ERR "PAL_VM_PAGE_SIZE failed with status=%ld;"
 180                        "defaulting to architected purge page-sizes.\n", status);
 181                 purge.mask = 0x115557000UL;
 182         }
 183         purge.max_bits = ia64_fls(purge.mask);
 184
 185         ia64_get_ptce(&ptce_info);
 186         local_cpu_data->ptce_base = ptce_info.base;
 187         local_cpu_data->ptce_count[0] = ptce_info.count[0];
 188         local_cpu_data->ptce_count[1] = ptce_info.count[1];
 189         local_cpu_data->ptce_stride[0] = ptce_info.stride[0];
 190         local_cpu_data->ptce_stride[1] = ptce_info.stride[1];
 191
 192         local_flush_tlb_all();          /* nuke left overs from bootstrapping... */
 193 }