2 * MSI hooks for standard x86 apic
11 * Shifts for APIC-based data
14 #define MSI_DATA_VECTOR_SHIFT 0
15 #define MSI_DATA_VECTOR(v) (((u8)v) << MSI_DATA_VECTOR_SHIFT)
17 #define MSI_DATA_DELIVERY_SHIFT 8
18 #define MSI_DATA_DELIVERY_FIXED (0 << MSI_DATA_DELIVERY_SHIFT)
19 #define MSI_DATA_DELIVERY_LOWPRI (1 << MSI_DATA_DELIVERY_SHIFT)
21 #define MSI_DATA_LEVEL_SHIFT 14
22 #define MSI_DATA_LEVEL_DEASSERT (0 << MSI_DATA_LEVEL_SHIFT)
23 #define MSI_DATA_LEVEL_ASSERT (1 << MSI_DATA_LEVEL_SHIFT)
25 #define MSI_DATA_TRIGGER_SHIFT 15
26 #define MSI_DATA_TRIGGER_EDGE (0 << MSI_DATA_TRIGGER_SHIFT)
27 #define MSI_DATA_TRIGGER_LEVEL (1 << MSI_DATA_TRIGGER_SHIFT)
30 * Shift/mask fields for APIC-based bus address
33 #define MSI_TARGET_CPU_SHIFT 4
34 #define MSI_ADDR_HEADER 0xfee00000
36 #define MSI_ADDR_DESTID_MASK 0xfff0000f
37 #define MSI_ADDR_DESTID_CPU(cpu) ((cpu) << MSI_TARGET_CPU_SHIFT)
39 #define MSI_ADDR_DESTMODE_SHIFT 2
40 #define MSI_ADDR_DESTMODE_PHYS (0 << MSI_ADDR_DESTMODE_SHIFT)
41 #define MSI_ADDR_DESTMODE_LOGIC (1 << MSI_ADDR_DESTMODE_SHIFT)
43 #define MSI_ADDR_REDIRECTION_SHIFT 3
44 #define MSI_ADDR_REDIRECTION_CPU (0 << MSI_ADDR_REDIRECTION_SHIFT)
45 #define MSI_ADDR_REDIRECTION_LOWPRI (1 << MSI_ADDR_REDIRECTION_SHIFT)
47 static struct irq_chip ia64_msi_chip;
50 static void ia64_set_msi_irq_affinity(unsigned int irq, cpumask_t cpu_mask)
55 /* IRQ migration across domain is not supported yet */
56 cpus_and(cpu_mask, cpu_mask, irq_to_domain(irq));
57 if (cpus_empty(cpu_mask))
60 read_msi_msg(irq, &msg);
62 addr = msg.address_lo;
63 addr &= MSI_ADDR_DESTID_MASK;
64 addr |= MSI_ADDR_DESTID_CPU(cpu_physical_id(first_cpu(cpu_mask)));
65 msg.address_lo = addr;
67 write_msi_msg(irq, &msg);
68 irq_desc[irq].affinity = cpu_mask;
70 #endif /* CONFIG_SMP */
72 int ia64_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
75 unsigned long dest_phys_id;
83 set_irq_msi(irq, desc);
84 cpus_and(mask, irq_to_domain(irq), cpu_online_map);
85 dest_phys_id = cpu_physical_id(first_cpu(mask));
86 vector = irq_to_vector(irq);
91 MSI_ADDR_DESTMODE_PHYS |
92 MSI_ADDR_REDIRECTION_CPU |
93 MSI_ADDR_DESTID_CPU(dest_phys_id);
96 MSI_DATA_TRIGGER_EDGE |
97 MSI_DATA_LEVEL_ASSERT |
98 MSI_DATA_DELIVERY_FIXED |
99 MSI_DATA_VECTOR(vector);
101 write_msi_msg(irq, &msg);
102 set_irq_chip_and_handler(irq, &ia64_msi_chip, handle_edge_irq);
107 void ia64_teardown_msi_irq(unsigned int irq)
112 static void ia64_ack_msi_irq(unsigned int irq)
114 move_native_irq(irq);
118 static int ia64_msi_retrigger_irq(unsigned int irq)
120 unsigned int vector = irq_to_vector(irq);
121 ia64_resend_irq(vector);
127 * Generic ops used on most IA64 platforms.
129 static struct irq_chip ia64_msi_chip = {
131 .mask = mask_msi_irq,
132 .unmask = unmask_msi_irq,
133 .ack = ia64_ack_msi_irq,
135 .set_affinity = ia64_set_msi_irq_affinity,
137 .retrigger = ia64_msi_retrigger_irq,
141 int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
143 if (platform_setup_msi_irq)
144 return platform_setup_msi_irq(pdev, desc);
146 return ia64_setup_msi_irq(pdev, desc);
149 void arch_teardown_msi_irq(unsigned int irq)
151 if (platform_teardown_msi_irq)
152 return platform_teardown_msi_irq(irq);
154 return ia64_teardown_msi_irq(irq);