2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2008-2009 Cambridge Signal Processing
4 * 2005 National ICT Australia (NICTA)
5 * Aidan Williams <aidan@nicta.com.au>
7 * Licensed under the GPL-2 or later.
10 #include <linux/device.h>
11 #include <linux/platform_device.h>
12 #include <linux/mtd/mtd.h>
13 #include <linux/mtd/partitions.h>
14 #include <linux/spi/spi.h>
15 #include <linux/spi/flash.h>
16 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
17 #include <linux/usb/isp1362.h>
19 #include <linux/ata_platform.h>
20 #include <linux/irq.h>
21 #include <linux/interrupt.h>
22 #include <linux/usb/sl811.h>
24 #include <asm/bfin5xx_spi.h>
25 #include <asm/reboot.h>
26 #include <asm/portmux.h>
27 #include <linux/spi/ad7877.h>
30 * Name the Board for the /proc/cpuinfo
32 const char bfin_board_name[] = "CamSig Minotaur BF537";
34 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
35 static struct resource bfin_pcmcia_cf_resources[] = {
37 .start = 0x20310000, /* IO PORT */
39 .flags = IORESOURCE_MEM,
41 .start = 0x20311000, /* Attribute Memory */
43 .flags = IORESOURCE_MEM,
47 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
49 .start = IRQ_PF6, /* Card Detect PF6 */
51 .flags = IORESOURCE_IRQ,
55 static struct platform_device bfin_pcmcia_cf_device = {
56 .name = "bfin_cf_pcmcia",
58 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
59 .resource = bfin_pcmcia_cf_resources,
63 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
64 static struct platform_device rtc_device = {
70 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
71 static struct platform_device bfin_mii_bus = {
72 .name = "bfin_mii_bus",
75 static struct platform_device bfin_mac_device = {
77 .dev.platform_data = &bfin_mii_bus,
81 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
82 static struct resource net2272_bfin_resources[] = {
85 .end = 0x20300000 + 0x100,
86 .flags = IORESOURCE_MEM,
90 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
94 static struct platform_device net2272_bfin_device = {
97 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
98 .resource = net2272_bfin_resources,
102 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
103 /* all SPI peripherals info goes here */
105 #if defined(CONFIG_MTD_M25P80) \
106 || defined(CONFIG_MTD_M25P80_MODULE)
108 /* Partition sizes */
109 #define FLASH_SIZE 0x00400000
110 #define PSIZE_UBOOT 0x00030000
111 #define PSIZE_INITRAMFS 0x00240000
113 static struct mtd_partition bfin_spi_flash_partitions[] = {
115 .name = "bootloader(spi)",
118 .mask_flags = MTD_CAP_ROM
120 .name = "initramfs(spi)",
121 .size = PSIZE_INITRAMFS,
122 .offset = PSIZE_UBOOT
125 .size = FLASH_SIZE - (PSIZE_UBOOT + PSIZE_INITRAMFS),
126 .offset = PSIZE_UBOOT + PSIZE_INITRAMFS,
130 static struct flash_platform_data bfin_spi_flash_data = {
132 .parts = bfin_spi_flash_partitions,
133 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
137 /* SPI flash chip (m25p64) */
138 static struct bfin5xx_spi_chip spi_flash_chip_info = {
139 .enable_dma = 0, /* use dma transfer with this chip*/
144 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
145 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
151 static struct spi_board_info bfin_spi_board_info[] __initdata = {
152 #if defined(CONFIG_MTD_M25P80) \
153 || defined(CONFIG_MTD_M25P80_MODULE)
155 /* the modalias must be the same as spi device driver name */
156 .modalias = "m25p80", /* Name of spi_driver for this device */
157 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
158 .bus_num = 0, /* Framework bus number */
159 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
160 .platform_data = &bfin_spi_flash_data,
161 .controller_data = &spi_flash_chip_info,
166 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
168 .modalias = "mmc_spi",
169 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
172 .controller_data = &mmc_spi_chip_info,
178 /* SPI controller data */
179 static struct bfin5xx_spi_master bfin_spi0_info = {
181 .enable_dma = 1, /* master has the ability to do dma transfer */
185 static struct resource bfin_spi0_resource[] = {
187 .start = SPI0_REGBASE,
188 .end = SPI0_REGBASE + 0xFF,
189 .flags = IORESOURCE_MEM,
194 .flags = IORESOURCE_DMA,
199 .flags = IORESOURCE_IRQ,
203 static struct platform_device bfin_spi0_device = {
205 .id = 0, /* Bus number */
206 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
207 .resource = bfin_spi0_resource,
209 .platform_data = &bfin_spi0_info, /* Passed to driver */
212 #endif /* spi master and devices */
214 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
215 #ifdef CONFIG_SERIAL_BFIN_UART0
216 static struct resource bfin_uart0_resources[] = {
220 .flags = IORESOURCE_MEM,
223 .start = IRQ_UART0_RX,
224 .end = IRQ_UART0_RX+1,
225 .flags = IORESOURCE_IRQ,
228 .start = IRQ_UART0_ERROR,
229 .end = IRQ_UART0_ERROR,
230 .flags = IORESOURCE_IRQ,
233 .start = CH_UART0_TX,
235 .flags = IORESOURCE_DMA,
238 .start = CH_UART0_RX,
240 .flags = IORESOURCE_DMA,
244 unsigned short bfin_uart0_peripherals[] = {
245 P_UART0_TX, P_UART0_RX, 0
248 static struct platform_device bfin_uart0_device = {
251 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
252 .resource = bfin_uart0_resources,
254 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
258 #ifdef CONFIG_SERIAL_BFIN_UART1
259 static struct resource bfin_uart1_resources[] = {
263 .flags = IORESOURCE_MEM,
266 .start = IRQ_UART1_RX,
267 .end = IRQ_UART1_RX+1,
268 .flags = IORESOURCE_IRQ,
271 .start = IRQ_UART1_ERROR,
272 .end = IRQ_UART1_ERROR,
273 .flags = IORESOURCE_IRQ,
276 .start = CH_UART1_TX,
278 .flags = IORESOURCE_DMA,
281 .start = CH_UART1_RX,
283 .flags = IORESOURCE_DMA,
287 unsigned short bfin_uart1_peripherals[] = {
288 P_UART1_TX, P_UART1_RX, 0
291 static struct platform_device bfin_uart1_device = {
294 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
295 .resource = bfin_uart1_resources,
297 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
303 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
304 #ifdef CONFIG_BFIN_SIR0
305 static struct resource bfin_sir0_resources[] = {
309 .flags = IORESOURCE_MEM,
312 .start = IRQ_UART0_RX,
313 .end = IRQ_UART0_RX+1,
314 .flags = IORESOURCE_IRQ,
317 .start = CH_UART0_RX,
318 .end = CH_UART0_RX+1,
319 .flags = IORESOURCE_DMA,
323 static struct platform_device bfin_sir0_device = {
326 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
327 .resource = bfin_sir0_resources,
330 #ifdef CONFIG_BFIN_SIR1
331 static struct resource bfin_sir1_resources[] = {
335 .flags = IORESOURCE_MEM,
338 .start = IRQ_UART1_RX,
339 .end = IRQ_UART1_RX+1,
340 .flags = IORESOURCE_IRQ,
343 .start = CH_UART1_RX,
344 .end = CH_UART1_RX+1,
345 .flags = IORESOURCE_DMA,
349 static struct platform_device bfin_sir1_device = {
352 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
353 .resource = bfin_sir1_resources,
358 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
359 static struct resource bfin_twi0_resource[] = {
361 .start = TWI0_REGBASE,
362 .end = TWI0_REGBASE + 0xFF,
363 .flags = IORESOURCE_MEM,
368 .flags = IORESOURCE_IRQ,
372 static struct platform_device i2c_bfin_twi_device = {
373 .name = "i2c-bfin-twi",
375 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
376 .resource = bfin_twi0_resource,
380 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
381 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
382 static struct resource bfin_sport0_uart_resources[] = {
384 .start = SPORT0_TCR1,
385 .end = SPORT0_MRCS3+4,
386 .flags = IORESOURCE_MEM,
389 .start = IRQ_SPORT0_RX,
390 .end = IRQ_SPORT0_RX+1,
391 .flags = IORESOURCE_IRQ,
394 .start = IRQ_SPORT0_ERROR,
395 .end = IRQ_SPORT0_ERROR,
396 .flags = IORESOURCE_IRQ,
400 unsigned short bfin_sport0_peripherals[] = {
401 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
402 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
405 static struct platform_device bfin_sport0_uart_device = {
406 .name = "bfin-sport-uart",
408 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
409 .resource = bfin_sport0_uart_resources,
411 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
415 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
416 static struct resource bfin_sport1_uart_resources[] = {
418 .start = SPORT1_TCR1,
419 .end = SPORT1_MRCS3+4,
420 .flags = IORESOURCE_MEM,
423 .start = IRQ_SPORT1_RX,
424 .end = IRQ_SPORT1_RX+1,
425 .flags = IORESOURCE_IRQ,
428 .start = IRQ_SPORT1_ERROR,
429 .end = IRQ_SPORT1_ERROR,
430 .flags = IORESOURCE_IRQ,
434 unsigned short bfin_sport1_peripherals[] = {
435 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
436 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
439 static struct platform_device bfin_sport1_uart_device = {
440 .name = "bfin-sport-uart",
442 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
443 .resource = bfin_sport1_uart_resources,
445 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
451 static struct platform_device *minotaur_devices[] __initdata = {
452 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
453 &bfin_pcmcia_cf_device,
456 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
460 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
465 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
466 &net2272_bfin_device,
469 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
473 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
474 #ifdef CONFIG_SERIAL_BFIN_UART0
477 #ifdef CONFIG_SERIAL_BFIN_UART1
482 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
483 #ifdef CONFIG_BFIN_SIR0
486 #ifdef CONFIG_BFIN_SIR1
491 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
492 &i2c_bfin_twi_device,
495 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
496 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
497 &bfin_sport0_uart_device,
499 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
500 &bfin_sport1_uart_device,
506 static int __init minotaur_init(void)
508 printk(KERN_INFO "%s(): registering device resources\n", __func__);
509 platform_add_devices(minotaur_devices, ARRAY_SIZE(minotaur_devices));
510 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
511 spi_register_board_info(bfin_spi_board_info,
512 ARRAY_SIZE(bfin_spi_board_info));
518 arch_initcall(minotaur_init);
520 static struct platform_device *minotaur_early_devices[] __initdata = {
521 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
522 #ifdef CONFIG_SERIAL_BFIN_UART0
525 #ifdef CONFIG_SERIAL_BFIN_UART1
530 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
531 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
532 &bfin_sport0_uart_device,
534 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
535 &bfin_sport1_uart_device,
540 void __init native_machine_early_platform_add_devices(void)
542 printk(KERN_INFO "register early platform devices\n");
543 early_platform_add_devices(minotaur_early_devices,
544 ARRAY_SIZE(minotaur_early_devices));
547 void native_machine_restart(char *cmd)
549 /* workaround reboot hang when booting from SPI */
550 if ((bfin_read_SYSCR() & 0x7) == 0x3)
551 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);