arch/blackfin/mach-bf527/boards/tll6527m.c

   1 /* File:        arch/blackfin/mach-bf527/boards/tll6527m.c
   2  * Based on:    arch/blackfin/mach-bf527/boards/ezkit.c
   3  * Author:      Ashish Gupta
   4  *
   5  * Copyright: 2010 - The Learning Labs Inc.
   6  *
   7  * Licensed under the GPL-2 or later.
   8  */
   9
  10 #include <linux/device.h>
  11 #include <linux/platform_device.h>
  12 #include <linux/mtd/mtd.h>
  13 #include <linux/mtd/partitions.h>
  14 #include <linux/mtd/physmap.h>
  15 #include <linux/spi/spi.h>
  16 #include <linux/spi/flash.h>
  17 #include <linux/i2c.h>
  18 #include <linux/irq.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/usb/musb.h>
  21 #include <linux/leds.h>
  22 #include <linux/input.h>
  23 #include <asm/dma.h>
  24 #include <asm/bfin5xx_spi.h>
  25 #include <asm/reboot.h>
  26 #include <asm/nand.h>
  27 #include <asm/portmux.h>
  28 #include <asm/dpmc.h>
  29
  30 #if defined(CONFIG_TOUCHSCREEN_AD7879) \
  31         || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
  32 #include <linux/spi/ad7879.h>
  33 #define LCD_BACKLIGHT_GPIO 0x40
  34 /* TLL6527M uses TLL7UIQ35 / ADI LCD EZ Extender. AD7879 AUX GPIO is used for
  35  * LCD Backlight Enable
  36  */
  37 #endif
  38
  39 /*
  40  * Name the Board for the /proc/cpuinfo
  41  */
  42 const char bfin_board_name[] = "TLL6527M";
  43 /*
  44  *  Driver needs to know address, irq and flag pin.
  45  */
  46
  47 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  48 static struct resource musb_resources[] = {
  49         [0] = {
  50                 .start  = 0xffc03800,
  51                 .end    = 0xffc03cff,
  52                 .flags  = IORESOURCE_MEM,
  53         },
  54         [1] = { /* general IRQ */
  55                 .start  = IRQ_USB_INT0,
  56                 .end    = IRQ_USB_INT0,
  57                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  58         },
  59         [2] = { /* DMA IRQ */
  60                 .start  = IRQ_USB_DMA,
  61                 .end    = IRQ_USB_DMA,
  62                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  63         },
  64 };
  65
  66 static struct musb_hdrc_config musb_config = {
  67         .multipoint     = 0,
  68         .dyn_fifo       = 0,
  69         .soft_con       = 1,
  70         .dma            = 1,
  71         .num_eps        = 8,
  72         .dma_channels   = 8,
  73         /*.gpio_vrsel   = GPIO_PG13,*/
  74         /* Some custom boards need to be active low, just set it to "0"
  75          * if it is the case.
  76          */
  77         .gpio_vrsel_active      = 1,
  78 };
  79
  80 static struct musb_hdrc_platform_data musb_plat = {
  81 #if defined(CONFIG_USB_MUSB_OTG)
  82         .mode           = MUSB_OTG,
  83 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  84         .mode           = MUSB_HOST,
  85 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  86         .mode           = MUSB_PERIPHERAL,
  87 #endif
  88         .config         = &musb_config,
  89 };
  90
  91 static u64 musb_dmamask = ~(u32)0;
  92
  93 static struct platform_device musb_device = {
  94         .name           = "musb_hdrc",
  95         .id             = 0,
  96         .dev = {
  97                 .dma_mask               = &musb_dmamask,
  98                 .coherent_dma_mask      = 0xffffffff,
  99                 .platform_data          = &musb_plat,
 100         },
 101         .num_resources  = ARRAY_SIZE(musb_resources),
 102         .resource       = musb_resources,
 103 };
 104 #endif
 105
 106 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 107 #include <asm/bfin-lq035q1.h>
 108
 109 static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
 110         .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
 111         .ppi_mode = USE_RGB565_16_BIT_PPI,
 112         .use_bl = 1,
 113         .gpio_bl = LCD_BACKLIGHT_GPIO,
 114 };
 115
 116 static struct resource bfin_lq035q1_resources[] = {
 117         {
 118                 .start = IRQ_PPI_ERROR,
 119                 .end = IRQ_PPI_ERROR,
 120                 .flags = IORESOURCE_IRQ,
 121         },
 122 };
 123
 124 static struct platform_device bfin_lq035q1_device = {
 125         .name           = "bfin-lq035q1",
 126         .id             = -1,
 127         .num_resources  = ARRAY_SIZE(bfin_lq035q1_resources),
 128         .resource       = bfin_lq035q1_resources,
 129         .dev            = {
 130                 .platform_data = &bfin_lq035q1_data,
 131         },
 132 };
 133 #endif
 134
 135 #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
 136 static struct mtd_partition tll6527m_partitions[] = {
 137         {
 138                 .name       = "bootloader(nor)",
 139                 .size       = 0xA0000,
 140                 .offset     = 0,
 141         }, {
 142                 .name       = "linux kernel(nor)",
 143                 .size       = 0xD00000,
 144                 .offset     = MTDPART_OFS_APPEND,
 145         }, {
 146                 .name       = "file system(nor)",
 147                 .size       = MTDPART_SIZ_FULL,
 148                 .offset     = MTDPART_OFS_APPEND,
 149         }
 150 };
 151
 152 static struct physmap_flash_data tll6527m_flash_data = {
 153         .width      = 2,
 154         .parts      = tll6527m_partitions,
 155         .nr_parts   = ARRAY_SIZE(tll6527m_partitions),
 156 };
 157
 158 static unsigned tll6527m_flash_gpios[] = { GPIO_PG11, GPIO_PH11, GPIO_PH12 };
 159
 160 static struct resource tll6527m_flash_resource[] = {
 161         {
 162                 .name  = "cfi_probe",
 163                 .start = 0x20000000,
 164                 .end   = 0x201fffff,
 165                 .flags = IORESOURCE_MEM,
 166         }, {
 167                 .start = (unsigned long)tll6527m_flash_gpios,
 168                 .end   = ARRAY_SIZE(tll6527m_flash_gpios),
 169                 .flags = IORESOURCE_IRQ,
 170         }
 171 };
 172
 173 static struct platform_device tll6527m_flash_device = {
 174         .name          = "gpio-addr-flash",
 175         .id            = 0,
 176         .dev = {
 177                 .platform_data = &tll6527m_flash_data,
 178         },
 179         .num_resources = ARRAY_SIZE(tll6527m_flash_resource),
 180         .resource      = tll6527m_flash_resource,
 181 };
 182 #endif
 183
 184 #if defined(CONFIG_GPIO_DECODER) || defined(CONFIG_GPIO_DECODER_MODULE)
 185 /* An SN74LVC138A 3:8 decoder chip has been used to generate 7 augmented
 186  * outputs used as SPI CS lines for all SPI SLAVE devices on TLL6527v1-0.
 187  * EXP_GPIO_SPISEL_BASE is the base number for the expanded outputs being
 188  * used as SPI CS lines, this should be > MAX_BLACKFIN_GPIOS
 189  */
 190 #include <linux/gpio-decoder.h>
 191 #define EXP_GPIO_SPISEL_BASE 0x64
 192 static unsigned gpio_addr_inputs[] = {
 193         GPIO_PG1, GPIO_PH9, GPIO_PH10
 194 };
 195
 196 static struct gpio_decoder_platfrom_data spi_decoded_cs = {
 197         .base           = EXP_GPIO_SPISEL_BASE,
 198         .input_addrs    = gpio_addr_inputs,
 199         .nr_input_addrs = ARRAY_SIZE(gpio_addr_inputs),
 200         .default_output = 0,
 201 /*      .default_output = (1 << ARRAY_SIZE(gpio_addr_inputs)) - 1 */
 202 };
 203
 204 static struct platform_device spi_decoded_gpio = {
 205         .name   = "gpio-decoder",
 206         .id     = 0,
 207         .dev    = {
 208                 .platform_data = &spi_decoded_cs,
 209         },
 210 };
 211
 212 #else
 213 #define EXP_GPIO_SPISEL_BASE 0x0
 214
 215 #endif
 216
 217 #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
 218 #include <linux/input/adxl34x.h>
 219 static const struct adxl34x_platform_data adxl345_info = {
 220         .x_axis_offset = 0,
 221         .y_axis_offset = 0,
 222         .z_axis_offset = 0,
 223         .tap_threshold = 0x31,
 224         .tap_duration = 0x10,
 225         .tap_latency = 0x60,
 226         .tap_window = 0xF0,
 227         .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
 228         .act_axis_control = 0xFF,
 229         .activity_threshold = 5,
 230         .inactivity_threshold = 2,
 231         .inactivity_time = 2,
 232         .free_fall_threshold = 0x7,
 233         .free_fall_time = 0x20,
 234         .data_rate = 0x8,
 235         .data_range = ADXL_FULL_RES,
 236
 237         .ev_type = EV_ABS,
 238         .ev_code_x = ABS_X,             /* EV_REL */
 239         .ev_code_y = ABS_Y,             /* EV_REL */
 240         .ev_code_z = ABS_Z,             /* EV_REL */
 241
 242         .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
 243
 244 /*      .ev_code_ff = KEY_F,*/          /* EV_KEY */
 245         .ev_code_act_inactivity = KEY_A,        /* EV_KEY */
 246         .use_int2 = 1,
 247         .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
 248         .fifo_mode = ADXL_FIFO_STREAM,
 249 };
 250 #endif
 251
 252 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 253 static struct platform_device rtc_device = {
 254         .name = "rtc-bfin",
 255         .id   = -1,
 256 };
 257 #endif
 258
 259 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 260 static struct platform_device bfin_mii_bus = {
 261         .name = "bfin_mii_bus",
 262 };
 263
 264 static struct platform_device bfin_mac_device = {
 265         .name = "bfin_mac",
 266         .dev.platform_data = &bfin_mii_bus,
 267 };
 268 #endif
 269
 270 #if defined(CONFIG_MTD_M25P80) \
 271         || defined(CONFIG_MTD_M25P80_MODULE)
 272 static struct mtd_partition bfin_spi_flash_partitions[] = {
 273         {
 274                 .name = "bootloader(spi)",
 275                 .size = 0x00040000,
 276                 .offset = 0,
 277                 .mask_flags = MTD_CAP_ROM
 278         }, {
 279                 .name = "linux kernel(spi)",
 280                 .size = MTDPART_SIZ_FULL,
 281                 .offset = MTDPART_OFS_APPEND,
 282         }
 283 };
 284
 285 static struct flash_platform_data bfin_spi_flash_data = {
 286         .name = "m25p80",
 287         .parts = bfin_spi_flash_partitions,
 288         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 289         .type = "m25p16",
 290 };
 291
 292 /* SPI flash chip (m25p64) */
 293 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 294         .enable_dma = 0,         /* use dma transfer with this chip*/
 295         .bits_per_word = 8,
 296 };
 297 #endif
 298
 299 #if defined(CONFIG_BFIN_SPI_ADC) \
 300         || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 301 /* SPI ADC chip */
 302 static struct bfin5xx_spi_chip spi_adc_chip_info = {
 303         .enable_dma = 0,         /* use dma transfer with this chip*/
 304 /*
 305  * tll6527m V1.0 does not support native spi slave selects
 306  * hence DMA mode will not be useful since the ADC needs
 307  * CS to toggle for each sample and cs_change_per_word
 308  * seems to be removed from spi_bfin5xx.c
 309  */
 310         .bits_per_word = 16,
 311 };
 312 #endif
 313
 314 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 315 static struct bfin5xx_spi_chip  mmc_spi_chip_info = {
 316         .enable_dma = 0,
 317         .bits_per_word = 8,
 318 };
 319 #endif
 320
 321 #if defined(CONFIG_TOUCHSCREEN_AD7879) \
 322         || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
 323 static const struct ad7879_platform_data bfin_ad7879_ts_info = {
 324         .model                  = 7879, /* Model = AD7879 */
 325         .x_plate_ohms           = 620,  /* 620 Ohm from the touch datasheet */
 326         .pressure_max           = 10000,
 327         .pressure_min           = 0,
 328         .first_conversion_delay = 3,
 329                                 /* wait 512us before do a first conversion */
 330         .acquisition_time       = 1,    /* 4us acquisition time per sample */
 331         .median                 = 2,    /* do 8 measurements */
 332         .averaging              = 1,
 333                                 /* take the average of 4 middle samples */
 334         .pen_down_acc_interval  = 255,  /* 9.4 ms */
 335         .gpio_export            = 1,    /* configure AUX as GPIO output*/
 336         .gpio_base              = LCD_BACKLIGHT_GPIO,
 337 };
 338 #endif
 339
 340 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) \
 341         || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
 342 static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
 343         .enable_dma = 0,
 344         .bits_per_word = 16,
 345 };
 346 #endif
 347
 348 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 349 static struct bfin5xx_spi_chip spidev_chip_info = {
 350         .enable_dma = 0,
 351         .bits_per_word = 8,
 352 };
 353 #endif
 354
 355 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
 356 static struct platform_device bfin_i2s = {
 357         .name = "bfin-i2s",
 358         .id = CONFIG_SND_BF5XX_SPORT_NUM,
 359         /* TODO: add platform data here */
 360 };
 361 #endif
 362
 363 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 364 static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
 365         .enable_dma     = 0,
 366         .bits_per_word  = 8,
 367 };
 368 #endif
 369
 370 #if defined(CONFIG_GPIO_MCP23S08) || defined(CONFIG_GPIO_MCP23S08_MODULE)
 371 static struct bfin5xx_spi_chip spi_mcp23s08_sys_chip_info = {
 372         .enable_dma = 0,
 373         .bits_per_word = 8,
 374 };
 375
 376 static struct bfin5xx_spi_chip spi_mcp23s08_usr_chip_info = {
 377         .enable_dma = 0,
 378         .bits_per_word = 8,
 379 };
 380
 381 #include <linux/spi/mcp23s08.h>
 382 static const struct mcp23s08_platform_data bfin_mcp23s08_sys_gpio_info = {
 383         .chip[0].is_present = true,
 384         .base = 0x30,
 385 };
 386 static const struct mcp23s08_platform_data bfin_mcp23s08_usr_gpio_info = {
 387         .chip[2].is_present = true,
 388         .base = 0x38,
 389 };
 390 #endif
 391
 392 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 393 #if defined(CONFIG_MTD_M25P80) \
 394         || defined(CONFIG_MTD_M25P80_MODULE)
 395         {
 396                 /* the modalias must be the same as spi device driver name */
 397                 .modalias = "m25p80", /* Name of spi_driver for this device */
 398                 .max_speed_hz = 25000000,
 399                                 /* max spi clock (SCK) speed in HZ */
 400                 .bus_num = 0, /* Framework bus number */
 401                 .chip_select = EXP_GPIO_SPISEL_BASE + 0x04 + MAX_CTRL_CS,
 402                 /* Can be connected to TLL6527M GPIO connector */
 403                 /* Either SPI_ADC or M25P80 FLASH can be installed at a time */
 404                 .platform_data = &bfin_spi_flash_data,
 405                 .controller_data = &spi_flash_chip_info,
 406                 .mode = SPI_MODE_3,
 407         },
 408 #endif
 409
 410 #if defined(CONFIG_BFIN_SPI_ADC)
 411         || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 412         {
 413                 .modalias = "bfin_spi_adc",
 414                                 /* Name of spi_driver for this device */
 415                 .max_speed_hz = 10000000,
 416                                 /* max spi clock (SCK) speed in HZ */
 417                 .bus_num = 0, /* Framework bus number */
 418                 .chip_select = EXP_GPIO_SPISEL_BASE + 0x04 + MAX_CTRL_CS,
 419                  /* Framework chip select. */
 420                 .platform_data = NULL, /* No spi_driver specific config */
 421                 .controller_data = &spi_adc_chip_info,
 422                 .mode = SPI_MODE_0,
 423         },
 424 #endif
 425
 426 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 427         {
 428                 .modalias = "mmc_spi",
 429 /*
 430  * TLL6527M V1.0 does not support SD Card at SPI Clock > 10 MHz due to
 431  * SPI buffer limitations
 432  */
 433                 .max_speed_hz = 10000000,
 434                                         /* max spi clock (SCK) speed in HZ */
 435                 .bus_num = 0,
 436                 .chip_select = EXP_GPIO_SPISEL_BASE + 0x05 + MAX_CTRL_CS,
 437                 .controller_data = &mmc_spi_chip_info,
 438                 .mode = SPI_MODE_0,
 439         },
 440 #endif
 441 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) \
 442         || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
 443         {
 444                 .modalias = "ad7879",
 445                 .platform_data = &bfin_ad7879_ts_info,
 446                 .irq = IRQ_PH14,
 447                 .max_speed_hz = 5000000,
 448                                         /* max spi clock (SCK) speed in HZ */
 449                 .bus_num = 0,
 450                 .chip_select = EXP_GPIO_SPISEL_BASE + 0x07 + MAX_CTRL_CS,
 451                 .controller_data = &spi_ad7879_chip_info,
 452                 .mode = SPI_CPHA | SPI_CPOL,
 453         },
 454 #endif
 455 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 456         {
 457                 .modalias = "spidev",
 458                 .max_speed_hz = 10000000,
 459                 /* TLL6527Mv1-0 supports max spi clock (SCK) speed = 10 MHz */
 460                 .bus_num = 0,
 461                 .chip_select = EXP_GPIO_SPISEL_BASE + 0x03 + MAX_CTRL_CS,
 462                 .mode = SPI_CPHA | SPI_CPOL,
 463                 .controller_data = &spidev_chip_info,
 464         },
 465 #endif
 466 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 467         {
 468                 .modalias = "bfin-lq035q1-spi",
 469                 .max_speed_hz = 20000000,
 470                 .bus_num = 0,
 471                 .chip_select = EXP_GPIO_SPISEL_BASE + 0x06 + MAX_CTRL_CS,
 472                 .controller_data = &lq035q1_spi_chip_info,
 473                 .mode = SPI_CPHA | SPI_CPOL,
 474         },
 475 #endif
 476 #if defined(CONFIG_GPIO_MCP23S08) || defined(CONFIG_GPIO_MCP23S08_MODULE)
 477         {
 478                 .modalias = "mcp23s08",
 479                 .platform_data = &bfin_mcp23s08_sys_gpio_info,
 480                 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
 481                 .bus_num = 0,
 482                 .chip_select = EXP_GPIO_SPISEL_BASE + 0x01 + MAX_CTRL_CS,
 483                 .controller_data = &spi_mcp23s08_sys_chip_info,
 484                 .mode = SPI_CPHA | SPI_CPOL,
 485         },
 486         {
 487                 .modalias = "mcp23s08",
 488                 .platform_data = &bfin_mcp23s08_usr_gpio_info,
 489                 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
 490                 .bus_num = 0,
 491                 .chip_select = EXP_GPIO_SPISEL_BASE + 0x02 + MAX_CTRL_CS,
 492                 .controller_data = &spi_mcp23s08_usr_chip_info,
 493                 .mode = SPI_CPHA | SPI_CPOL,
 494         },
 495 #endif
 496 };
 497
 498 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 499 /* SPI controller data */
 500 static struct bfin5xx_spi_master bfin_spi0_info = {
 501         .num_chipselect = EXP_GPIO_SPISEL_BASE + 8 + MAX_CTRL_CS,
 502         /* EXP_GPIO_SPISEL_BASE will be > MAX_BLACKFIN_GPIOS */
 503         .enable_dma = 1,  /* master has the ability to do dma transfer */
 504         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 505 };
 506
 507 /* SPI (0) */
 508 static struct resource bfin_spi0_resource[] = {
 509         [0] = {
 510                 .start = SPI0_REGBASE,
 511                 .end   = SPI0_REGBASE + 0xFF,
 512                 .flags = IORESOURCE_MEM,
 513                 },
 514         [1] = {
 515                 .start = CH_SPI,
 516                 .end   = CH_SPI,
 517                 .flags = IORESOURCE_DMA,
 518         },
 519         [2] = {
 520                 .start = IRQ_SPI,
 521                 .end   = IRQ_SPI,
 522                 .flags = IORESOURCE_IRQ,
 523         },
 524 };
 525
 526 static struct platform_device bfin_spi0_device = {
 527         .name = "bfin-spi",
 528         .id = 0, /* Bus number */
 529         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 530         .resource = bfin_spi0_resource,
 531         .dev = {
 532                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 533         },
 534 };
 535 #endif  /* spi master and devices */
 536
 537 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 538 #ifdef CONFIG_SERIAL_BFIN_UART0
 539 static struct resource bfin_uart0_resources[] = {
 540         {
 541                 .start = UART0_THR,
 542                 .end = UART0_GCTL+2,
 543                 .flags = IORESOURCE_MEM,
 544         },
 545         {
 546                 .start = IRQ_UART0_RX,
 547                 .end = IRQ_UART0_RX+1,
 548                 .flags = IORESOURCE_IRQ,
 549         },
 550         {
 551                 .start = IRQ_UART0_ERROR,
 552                 .end = IRQ_UART0_ERROR,
 553                 .flags = IORESOURCE_IRQ,
 554         },
 555         {
 556                 .start = CH_UART0_TX,
 557                 .end = CH_UART0_TX,
 558                 .flags = IORESOURCE_DMA,
 559         },
 560         {
 561                 .start = CH_UART0_RX,
 562                 .end = CH_UART0_RX,
 563                 .flags = IORESOURCE_DMA,
 564         },
 565 };
 566
 567 unsigned short bfin_uart0_peripherals[] = {
 568         P_UART0_TX, P_UART0_RX, 0
 569 };
 570
 571 static struct platform_device bfin_uart0_device = {
 572         .name = "bfin-uart",
 573         .id = 0,
 574         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 575         .resource = bfin_uart0_resources,
 576         .dev = {
 577                 .platform_data = &bfin_uart0_peripherals,
 578                                         /* Passed to driver */
 579         },
 580 };
 581 #endif
 582 #ifdef CONFIG_SERIAL_BFIN_UART1
 583 static struct resource bfin_uart1_resources[] = {
 584         {
 585                 .start = UART1_THR,
 586                 .end = UART1_GCTL+2,
 587                 .flags = IORESOURCE_MEM,
 588         },
 589         {
 590                 .start = IRQ_UART1_RX,
 591                 .end = IRQ_UART1_RX+1,
 592                 .flags = IORESOURCE_IRQ,
 593         },
 594         {
 595                 .start = IRQ_UART1_ERROR,
 596                 .end = IRQ_UART1_ERROR,
 597                 .flags = IORESOURCE_IRQ,
 598         },
 599         {
 600                 .start = CH_UART1_TX,
 601                 .end = CH_UART1_TX,
 602                 .flags = IORESOURCE_DMA,
 603         },
 604         {
 605                 .start = CH_UART1_RX,
 606                 .end = CH_UART1_RX,
 607                 .flags = IORESOURCE_DMA,
 608         },
 609 #ifdef CONFIG_BFIN_UART1_CTSRTS
 610         {       /* CTS pin */
 611                 .start = GPIO_PF9,
 612                 .end = GPIO_PF9,
 613                 .flags = IORESOURCE_IO,
 614         },
 615         {       /* RTS pin */
 616                 .start = GPIO_PF10,
 617                 .end = GPIO_PF10,
 618                 .flags = IORESOURCE_IO,
 619         },
 620 #endif
 621 };
 622
 623 unsigned short bfin_uart1_peripherals[] = {
 624         P_UART1_TX, P_UART1_RX, 0
 625 };
 626
 627 static struct platform_device bfin_uart1_device = {
 628         .name = "bfin-uart",
 629         .id = 1,
 630         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 631         .resource = bfin_uart1_resources,
 632         .dev = {
 633                 .platform_data = &bfin_uart1_peripherals,
 634                                                 /* Passed to driver */
 635         },
 636 };
 637 #endif
 638 #endif
 639
 640 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 641 #ifdef CONFIG_BFIN_SIR0
 642 static struct resource bfin_sir0_resources[] = {
 643         {
 644                 .start = 0xFFC00400,
 645                 .end = 0xFFC004FF,
 646                 .flags = IORESOURCE_MEM,
 647         },
 648         {
 649                 .start = IRQ_UART0_RX,
 650                 .end = IRQ_UART0_RX+1,
 651                 .flags = IORESOURCE_IRQ,
 652         },
 653         {
 654                 .start = CH_UART0_RX,
 655                 .end = CH_UART0_RX+1,
 656                 .flags = IORESOURCE_DMA,
 657         },
 658 };
 659
 660 static struct platform_device bfin_sir0_device = {
 661         .name = "bfin_sir",
 662         .id = 0,
 663         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 664         .resource = bfin_sir0_resources,
 665 };
 666 #endif
 667 #ifdef CONFIG_BFIN_SIR1
 668 static struct resource bfin_sir1_resources[] = {
 669         {
 670                 .start = 0xFFC02000,
 671                 .end = 0xFFC020FF,
 672                 .flags = IORESOURCE_MEM,
 673         },
 674         {
 675                 .start = IRQ_UART1_RX,
 676                 .end = IRQ_UART1_RX+1,
 677                 .flags = IORESOURCE_IRQ,
 678         },
 679         {
 680                 .start = CH_UART1_RX,
 681                 .end = CH_UART1_RX+1,
 682                 .flags = IORESOURCE_DMA,
 683         },
 684 };
 685
 686 static struct platform_device bfin_sir1_device = {
 687         .name = "bfin_sir",
 688         .id = 1,
 689         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 690         .resource = bfin_sir1_resources,
 691 };
 692 #endif
 693 #endif
 694
 695 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 696 static struct resource bfin_twi0_resource[] = {
 697         [0] = {
 698                 .start = TWI0_REGBASE,
 699                 .end   = TWI0_REGBASE,
 700                 .flags = IORESOURCE_MEM,
 701         },
 702         [1] = {
 703                 .start = IRQ_TWI,
 704                 .end   = IRQ_TWI,
 705                 .flags = IORESOURCE_IRQ,
 706         },
 707 };
 708
 709 static struct platform_device i2c_bfin_twi_device = {
 710         .name = "i2c-bfin-twi",
 711         .id = 0,
 712         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 713         .resource = bfin_twi0_resource,
 714 };
 715 #endif
 716
 717 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 718 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
 719         {
 720                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
 721         },
 722 #endif
 723
 724 #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
 725         {
 726                 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
 727         },
 728 #endif
 729 #if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) \
 730         || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
 731         {
 732                 I2C_BOARD_INFO("ad7879", 0x2C),
 733                 .irq = IRQ_PH14,
 734                 .platform_data = (void *)&bfin_ad7879_ts_info,
 735         },
 736 #endif
 737 #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
 738         {
 739                 I2C_BOARD_INFO("ssm2602", 0x1b),
 740         },
 741 #endif
 742         {
 743                 I2C_BOARD_INFO("adm1192", 0x2e),
 744         },
 745
 746         {
 747                 I2C_BOARD_INFO("ltc3576", 0x09),
 748         },
 749 #if defined(CONFIG_INPUT_ADXL34X_I2C) \
 750         || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
 751         {
 752                 I2C_BOARD_INFO("adxl34x", 0x53),
 753                 .irq = IRQ_PH13,
 754                 .platform_data = (void *)&adxl345_info,
 755         },
 756 #endif
 757 };
 758
 759 #if defined(CONFIG_SERIAL_BFIN_SPORT) \
 760         || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 761 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 762 static struct resource bfin_sport0_uart_resources[] = {
 763         {
 764                 .start = SPORT0_TCR1,
 765                 .end = SPORT0_MRCS3+4,
 766                 .flags = IORESOURCE_MEM,
 767         },
 768         {
 769                 .start = IRQ_SPORT0_RX,
 770                 .end = IRQ_SPORT0_RX+1,
 771                 .flags = IORESOURCE_IRQ,
 772         },
 773         {
 774                 .start = IRQ_SPORT0_ERROR,
 775                 .end = IRQ_SPORT0_ERROR,
 776                 .flags = IORESOURCE_IRQ,
 777         },
 778 };
 779
 780 unsigned short bfin_sport0_peripherals[] = {
 781         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 782         P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
 783 };
 784
 785 static struct platform_device bfin_sport0_uart_device = {
 786         .name = "bfin-sport-uart",
 787         .id = 0,
 788         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 789         .resource = bfin_sport0_uart_resources,
 790         .dev = {
 791                 .platform_data = &bfin_sport0_peripherals,
 792                 /* Passed to driver */
 793         },
 794 };
 795 #endif
 796 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 797 static struct resource bfin_sport1_uart_resources[] = {
 798         {
 799                 .start = SPORT1_TCR1,
 800                 .end = SPORT1_MRCS3+4,
 801                 .flags = IORESOURCE_MEM,
 802         },
 803         {
 804                 .start = IRQ_SPORT1_RX,
 805                 .end = IRQ_SPORT1_RX+1,
 806                 .flags = IORESOURCE_IRQ,
 807         },
 808         {
 809                 .start = IRQ_SPORT1_ERROR,
 810                 .end = IRQ_SPORT1_ERROR,
 811                 .flags = IORESOURCE_IRQ,
 812         },
 813 };
 814
 815 unsigned short bfin_sport1_peripherals[] = {
 816         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 817         P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
 818 };
 819
 820 static struct platform_device bfin_sport1_uart_device = {
 821         .name = "bfin-sport-uart",
 822         .id = 1,
 823         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 824         .resource = bfin_sport1_uart_resources,
 825         .dev = {
 826                 .platform_data = &bfin_sport1_peripherals,
 827                 /* Passed to driver */
 828         },
 829 };
 830 #endif
 831 #endif
 832
 833 static const unsigned int cclk_vlev_datasheet[] = {
 834         VRPAIR(VLEV_100, 400000000),
 835         VRPAIR(VLEV_105, 426000000),
 836         VRPAIR(VLEV_110, 500000000),
 837         VRPAIR(VLEV_115, 533000000),
 838         VRPAIR(VLEV_120, 600000000),
 839 };
 840
 841 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 842         .tuple_tab = cclk_vlev_datasheet,
 843         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 844         .vr_settling_time = 25 /* us */,
 845 };
 846
 847 static struct platform_device bfin_dpmc = {
 848         .name = "bfin dpmc",
 849         .dev = {
 850                 .platform_data = &bfin_dmpc_vreg_data,
 851         },
 852 };
 853
 854 static struct platform_device *tll6527m_devices[] __initdata = {
 855
 856         &bfin_dpmc,
 857
 858 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 859         &rtc_device,
 860 #endif
 861
 862 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
 863         &musb_device,
 864 #endif
 865
 866 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 867         &bfin_mii_bus,
 868         &bfin_mac_device,
 869 #endif
 870
 871 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 872         &bfin_spi0_device,
 873 #endif
 874
 875 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 876         &bfin_lq035q1_device,
 877 #endif
 878
 879 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 880 #ifdef CONFIG_SERIAL_BFIN_UART0
 881         &bfin_uart0_device,
 882 #endif
 883 #ifdef CONFIG_SERIAL_BFIN_UART1
 884         &bfin_uart1_device,
 885 #endif
 886 #endif
 887
 888 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 889 #ifdef CONFIG_BFIN_SIR0
 890         &bfin_sir0_device,
 891 #endif
 892 #ifdef CONFIG_BFIN_SIR1
 893         &bfin_sir1_device,
 894 #endif
 895 #endif
 896
 897 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 898         &i2c_bfin_twi_device,
 899 #endif
 900
 901 #if defined(CONFIG_SERIAL_BFIN_SPORT) \
 902         || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 903 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 904         &bfin_sport0_uart_device,
 905 #endif
 906 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 907         &bfin_sport1_uart_device,
 908 #endif
 909 #endif
 910
 911 #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
 912         &tll6527m_flash_device,
 913 #endif
 914
 915 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
 916         &bfin_i2s,
 917 #endif
 918
 919 #if defined(CONFIG_GPIO_DECODER) || defined(CONFIG_GPIO_DECODER_MODULE)
 920         &spi_decoded_gpio,
 921 #endif
 922 };
 923
 924 static int __init tll6527m_init(void)
 925 {
 926         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 927         i2c_register_board_info(0, bfin_i2c_board_info,
 928                                 ARRAY_SIZE(bfin_i2c_board_info));
 929         platform_add_devices(tll6527m_devices, ARRAY_SIZE(tll6527m_devices));
 930         spi_register_board_info(bfin_spi_board_info,
 931                                 ARRAY_SIZE(bfin_spi_board_info));
 932         return 0;
 933 }
 934
 935 arch_initcall(tll6527m_init);
 936
 937 static struct platform_device *tll6527m_early_devices[] __initdata = {
 938 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
 939 #ifdef CONFIG_SERIAL_BFIN_UART0
 940         &bfin_uart0_device,
 941 #endif
 942 #ifdef CONFIG_SERIAL_BFIN_UART1
 943         &bfin_uart1_device,
 944 #endif
 945 #endif
 946
 947 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
 948 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 949         &bfin_sport0_uart_device,
 950 #endif
 951 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 952         &bfin_sport1_uart_device,
 953 #endif
 954 #endif
 955 };
 956
 957 void __init native_machine_early_platform_add_devices(void)
 958 {
 959         printk(KERN_INFO "register early platform devices\n");
 960         early_platform_add_devices(tll6527m_early_devices,
 961                 ARRAY_SIZE(tll6527m_early_devices));
 962 }
 963
 964 void native_machine_restart(char *cmd)
 965 {
 966         /* workaround reboot hang when booting from SPI */
 967         if ((bfin_read_SYSCR() & 0x7) == 0x3)
 968                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 969 }
 970
 971 void bfin_get_ether_addr(char *addr)
 972 {
 973         /* the MAC is stored in OTP memory page 0xDF */
 974         u32 ret;
 975         u64 otp_mac;
 976         u32 (*otp_read)(u32 page, u32 flags,
 977                         u64 *page_content) = (void *)0xEF00001A;
 978
 979         ret = otp_read(0xDF, 0x00, &otp_mac);
 980         if (!(ret & 0x1)) {
 981                 char *otp_mac_p = (char *)&otp_mac;
 982                 for (ret = 0; ret < 6; ++ret)
 983                         addr[ret] = otp_mac_p[5 - ret];
 984         }
 985 }
 986 EXPORT_SYMBOL(bfin_get_ether_addr);