2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
6 * Licensed under the GPL-2 or later.
9 #include <linux/device.h>
10 #include <linux/platform_device.h>
11 #include <linux/mtd/mtd.h>
12 #include <linux/mtd/partitions.h>
13 #include <linux/mtd/physmap.h>
14 #include <linux/spi/spi.h>
15 #include <linux/spi/flash.h>
17 #include <linux/i2c.h>
18 #include <linux/irq.h>
19 #include <linux/interrupt.h>
20 #include <linux/usb/musb.h>
22 #include <asm/bfin5xx_spi.h>
23 #include <asm/reboot.h>
25 #include <asm/portmux.h>
27 #include <linux/spi/ad7877.h>
30 * Name the Board for the /proc/cpuinfo
32 const char bfin_board_name[] = "ADI BF526-EZBRD";
35 * Driver needs to know address, irq and flag pin.
38 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
39 static struct resource musb_resources[] = {
43 .flags = IORESOURCE_MEM,
45 [1] = { /* general IRQ */
46 .start = IRQ_USB_INT0,
48 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
54 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
59 static struct musb_hdrc_config musb_config = {
66 .gpio_vrsel = GPIO_PG13,
67 /* Some custom boards need to be active low, just set it to "0"
70 .gpio_vrsel_active = 1,
73 static struct musb_hdrc_platform_data musb_plat = {
74 #if defined(CONFIG_USB_MUSB_OTG)
76 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
78 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
79 .mode = MUSB_PERIPHERAL,
81 .config = &musb_config,
84 static u64 musb_dmamask = ~(u32)0;
86 static struct platform_device musb_device = {
87 .name = "musb-blackfin",
90 .dma_mask = &musb_dmamask,
91 .coherent_dma_mask = 0xffffffff,
92 .platform_data = &musb_plat,
94 .num_resources = ARRAY_SIZE(musb_resources),
95 .resource = musb_resources,
99 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
100 static struct mtd_partition ezbrd_partitions[] = {
102 .name = "bootloader(nor)",
106 .name = "linux kernel(nor)",
108 .offset = MTDPART_OFS_APPEND,
110 .name = "file system(nor)",
111 .size = MTDPART_SIZ_FULL,
112 .offset = MTDPART_OFS_APPEND,
116 static struct physmap_flash_data ezbrd_flash_data = {
118 .parts = ezbrd_partitions,
119 .nr_parts = ARRAY_SIZE(ezbrd_partitions),
122 static struct resource ezbrd_flash_resource = {
125 .flags = IORESOURCE_MEM,
128 static struct platform_device ezbrd_flash_device = {
129 .name = "physmap-flash",
132 .platform_data = &ezbrd_flash_data,
135 .resource = &ezbrd_flash_resource,
139 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
140 static struct mtd_partition partition_info[] = {
142 .name = "bootloader(nand)",
146 .name = "linux kernel(nand)",
147 .offset = MTDPART_OFS_APPEND,
148 .size = 4 * 1024 * 1024,
151 .name = "file system(nand)",
152 .offset = MTDPART_OFS_APPEND,
153 .size = MTDPART_SIZ_FULL,
157 static struct bf5xx_nand_platform bf5xx_nand_platform = {
158 .data_width = NFC_NWIDTH_8,
159 .partitions = partition_info,
160 .nr_partitions = ARRAY_SIZE(partition_info),
165 static struct resource bf5xx_nand_resources[] = {
168 .end = NFC_DATA_RD + 2,
169 .flags = IORESOURCE_MEM,
174 .flags = IORESOURCE_IRQ,
178 static struct platform_device bf5xx_nand_device = {
179 .name = "bf5xx-nand",
181 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
182 .resource = bf5xx_nand_resources,
184 .platform_data = &bf5xx_nand_platform,
189 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
190 static struct platform_device rtc_device = {
197 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
198 #include <linux/bfin_mac.h>
199 static const unsigned short bfin_mac_peripherals[] = P_RMII0;
201 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
204 .irq = IRQ_MAC_PHYINT,
208 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
210 .phydev_data = bfin_phydev_data,
211 .phy_mode = PHY_INTERFACE_MODE_RMII,
212 .mac_peripherals = bfin_mac_peripherals,
215 static struct platform_device bfin_mii_bus = {
216 .name = "bfin_mii_bus",
218 .platform_data = &bfin_mii_bus_data,
222 static struct platform_device bfin_mac_device = {
225 .platform_data = &bfin_mii_bus,
230 #if defined(CONFIG_MTD_M25P80) \
231 || defined(CONFIG_MTD_M25P80_MODULE)
232 static struct mtd_partition bfin_spi_flash_partitions[] = {
234 .name = "bootloader(spi)",
237 .mask_flags = MTD_CAP_ROM
239 .name = "linux kernel(spi)",
240 .size = MTDPART_SIZ_FULL,
241 .offset = MTDPART_OFS_APPEND,
245 static struct flash_platform_data bfin_spi_flash_data = {
247 .parts = bfin_spi_flash_partitions,
248 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
249 .type = "sst25wf040",
252 /* SPI flash chip (sst25wf040) */
253 static struct bfin5xx_spi_chip spi_flash_chip_info = {
254 .enable_dma = 0, /* use dma transfer with this chip*/
259 #if defined(CONFIG_BFIN_SPI_ADC) \
260 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
262 static struct bfin5xx_spi_chip spi_adc_chip_info = {
263 .enable_dma = 1, /* use dma transfer with this chip*/
268 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
269 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
275 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
276 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
281 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
283 .vref_delay_usecs = 50, /* internal, no capacitor */
286 .pressure_max = 1000,
288 .stopacq_polarity = 1,
289 .first_conversion_delay = 3,
290 .acquisition_time = 1,
292 .pen_down_acc_interval = 1,
296 #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
297 #include <linux/spi/ad7879.h>
298 static const struct ad7879_platform_data bfin_ad7879_ts_info = {
299 .model = 7879, /* Model = AD7879 */
300 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
301 .pressure_max = 10000,
303 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
304 .acquisition_time = 1, /* 4us acquisition time per sample */
305 .median = 2, /* do 8 measurements */
306 .averaging = 1, /* take the average of 4 middle samples */
307 .pen_down_acc_interval = 255, /* 9.4 ms */
308 .gpio_export = 1, /* Export GPIO to gpiolib */
309 .gpio_base = -1, /* Dynamic allocation */
313 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
314 static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
320 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
321 && defined(CONFIG_SND_SOC_WM8731_SPI)
322 static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
328 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
329 static struct bfin5xx_spi_chip spidev_chip_info = {
335 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
336 static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
342 static struct spi_board_info bfin_spi_board_info[] __initdata = {
343 #if defined(CONFIG_MTD_M25P80) \
344 || defined(CONFIG_MTD_M25P80_MODULE)
346 /* the modalias must be the same as spi device driver name */
347 .modalias = "m25p80", /* Name of spi_driver for this device */
348 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
349 .bus_num = 0, /* Framework bus number */
350 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
351 .platform_data = &bfin_spi_flash_data,
352 .controller_data = &spi_flash_chip_info,
357 #if defined(CONFIG_BFIN_SPI_ADC) \
358 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
360 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
361 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
362 .bus_num = 0, /* Framework bus number */
363 .chip_select = 1, /* Framework chip select. */
364 .platform_data = NULL, /* No spi_driver specific config */
365 .controller_data = &spi_adc_chip_info,
369 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
371 .modalias = "mmc_spi",
372 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
375 .controller_data = &mmc_spi_chip_info,
379 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
381 .modalias = "ad7877",
382 .platform_data = &bfin_ad7877_ts_info,
384 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
387 .controller_data = &spi_ad7877_chip_info,
390 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
392 .modalias = "ad7879",
393 .platform_data = &bfin_ad7879_ts_info,
395 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
398 .controller_data = &spi_ad7879_chip_info,
399 .mode = SPI_CPHA | SPI_CPOL,
402 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
403 && defined(CONFIG_SND_SOC_WM8731_SPI)
405 .modalias = "wm8731",
406 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
409 .controller_data = &spi_wm8731_chip_info,
413 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
415 .modalias = "spidev",
416 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
419 .controller_data = &spidev_chip_info,
422 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
424 .modalias = "bfin-lq035q1-spi",
425 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
428 .controller_data = &lq035q1_spi_chip_info,
429 .mode = SPI_CPHA | SPI_CPOL,
434 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
435 /* SPI controller data */
436 static struct bfin5xx_spi_master bfin_spi0_info = {
438 .enable_dma = 1, /* master has the ability to do dma transfer */
439 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
443 static struct resource bfin_spi0_resource[] = {
445 .start = SPI0_REGBASE,
446 .end = SPI0_REGBASE + 0xFF,
447 .flags = IORESOURCE_MEM,
452 .flags = IORESOURCE_DMA,
457 .flags = IORESOURCE_IRQ,
461 static struct platform_device bfin_spi0_device = {
463 .id = 0, /* Bus number */
464 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
465 .resource = bfin_spi0_resource,
467 .platform_data = &bfin_spi0_info, /* Passed to driver */
470 #endif /* spi master and devices */
472 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
473 #ifdef CONFIG_SERIAL_BFIN_UART0
474 static struct resource bfin_uart0_resources[] = {
478 .flags = IORESOURCE_MEM,
481 .start = IRQ_UART0_RX,
482 .end = IRQ_UART0_RX+1,
483 .flags = IORESOURCE_IRQ,
486 .start = IRQ_UART0_ERROR,
487 .end = IRQ_UART0_ERROR,
488 .flags = IORESOURCE_IRQ,
491 .start = CH_UART0_TX,
493 .flags = IORESOURCE_DMA,
496 .start = CH_UART0_RX,
498 .flags = IORESOURCE_DMA,
502 unsigned short bfin_uart0_peripherals[] = {
503 P_UART0_TX, P_UART0_RX, 0
506 static struct platform_device bfin_uart0_device = {
509 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
510 .resource = bfin_uart0_resources,
512 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
516 #ifdef CONFIG_SERIAL_BFIN_UART1
517 static struct resource bfin_uart1_resources[] = {
521 .flags = IORESOURCE_MEM,
524 .start = IRQ_UART1_RX,
525 .end = IRQ_UART1_RX+1,
526 .flags = IORESOURCE_IRQ,
529 .start = IRQ_UART1_ERROR,
530 .end = IRQ_UART1_ERROR,
531 .flags = IORESOURCE_IRQ,
534 .start = CH_UART1_TX,
536 .flags = IORESOURCE_DMA,
539 .start = CH_UART1_RX,
541 .flags = IORESOURCE_DMA,
543 #ifdef CONFIG_BFIN_UART1_CTSRTS
547 .flags = IORESOURCE_IO,
552 .flags = IORESOURCE_IO,
557 unsigned short bfin_uart1_peripherals[] = {
558 P_UART1_TX, P_UART1_RX, 0
561 static struct platform_device bfin_uart1_device = {
564 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
565 .resource = bfin_uart1_resources,
567 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
573 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
574 #ifdef CONFIG_BFIN_SIR0
575 static struct resource bfin_sir0_resources[] = {
579 .flags = IORESOURCE_MEM,
582 .start = IRQ_UART0_RX,
583 .end = IRQ_UART0_RX+1,
584 .flags = IORESOURCE_IRQ,
587 .start = CH_UART0_RX,
588 .end = CH_UART0_RX+1,
589 .flags = IORESOURCE_DMA,
593 static struct platform_device bfin_sir0_device = {
596 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
597 .resource = bfin_sir0_resources,
600 #ifdef CONFIG_BFIN_SIR1
601 static struct resource bfin_sir1_resources[] = {
605 .flags = IORESOURCE_MEM,
608 .start = IRQ_UART1_RX,
609 .end = IRQ_UART1_RX+1,
610 .flags = IORESOURCE_IRQ,
613 .start = CH_UART1_RX,
614 .end = CH_UART1_RX+1,
615 .flags = IORESOURCE_DMA,
619 static struct platform_device bfin_sir1_device = {
622 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
623 .resource = bfin_sir1_resources,
628 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
629 static struct resource bfin_twi0_resource[] = {
631 .start = TWI0_REGBASE,
633 .flags = IORESOURCE_MEM,
638 .flags = IORESOURCE_IRQ,
642 static struct platform_device i2c_bfin_twi_device = {
643 .name = "i2c-bfin-twi",
645 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
646 .resource = bfin_twi0_resource,
650 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
651 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
653 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
656 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
658 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
664 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
665 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
666 static struct resource bfin_sport0_uart_resources[] = {
668 .start = SPORT0_TCR1,
669 .end = SPORT0_MRCS3+4,
670 .flags = IORESOURCE_MEM,
673 .start = IRQ_SPORT0_RX,
674 .end = IRQ_SPORT0_RX+1,
675 .flags = IORESOURCE_IRQ,
678 .start = IRQ_SPORT0_ERROR,
679 .end = IRQ_SPORT0_ERROR,
680 .flags = IORESOURCE_IRQ,
684 unsigned short bfin_sport0_peripherals[] = {
685 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
686 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
689 static struct platform_device bfin_sport0_uart_device = {
690 .name = "bfin-sport-uart",
692 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
693 .resource = bfin_sport0_uart_resources,
695 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
699 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
700 static struct resource bfin_sport1_uart_resources[] = {
702 .start = SPORT1_TCR1,
703 .end = SPORT1_MRCS3+4,
704 .flags = IORESOURCE_MEM,
707 .start = IRQ_SPORT1_RX,
708 .end = IRQ_SPORT1_RX+1,
709 .flags = IORESOURCE_IRQ,
712 .start = IRQ_SPORT1_ERROR,
713 .end = IRQ_SPORT1_ERROR,
714 .flags = IORESOURCE_IRQ,
718 unsigned short bfin_sport1_peripherals[] = {
719 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
720 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
723 static struct platform_device bfin_sport1_uart_device = {
724 .name = "bfin-sport-uart",
726 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
727 .resource = bfin_sport1_uart_resources,
729 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
735 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
736 #include <linux/input.h>
737 #include <linux/gpio_keys.h>
739 static struct gpio_keys_button bfin_gpio_keys_table[] = {
740 {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
741 {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
744 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
745 .buttons = bfin_gpio_keys_table,
746 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
749 static struct platform_device bfin_device_gpiokeys = {
752 .platform_data = &bfin_gpio_keys_data,
757 static const unsigned int cclk_vlev_datasheet[] =
759 VRPAIR(VLEV_100, 400000000),
760 VRPAIR(VLEV_105, 426000000),
761 VRPAIR(VLEV_110, 500000000),
762 VRPAIR(VLEV_115, 533000000),
763 VRPAIR(VLEV_120, 600000000),
766 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
767 .tuple_tab = cclk_vlev_datasheet,
768 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
769 .vr_settling_time = 25 /* us */,
772 static struct platform_device bfin_dpmc = {
775 .platform_data = &bfin_dmpc_vreg_data,
779 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
780 #include <asm/bfin-lq035q1.h>
782 static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
783 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
784 .ppi_mode = USE_RGB565_16_BIT_PPI,
786 .gpio_bl = GPIO_PG12,
789 static struct resource bfin_lq035q1_resources[] = {
791 .start = IRQ_PPI_ERROR,
792 .end = IRQ_PPI_ERROR,
793 .flags = IORESOURCE_IRQ,
797 static struct platform_device bfin_lq035q1_device = {
798 .name = "bfin-lq035q1",
800 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
801 .resource = bfin_lq035q1_resources,
803 .platform_data = &bfin_lq035q1_data,
808 static struct platform_device *stamp_devices[] __initdata = {
812 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
816 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
820 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
824 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
829 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
833 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
834 #ifdef CONFIG_SERIAL_BFIN_UART0
837 #ifdef CONFIG_SERIAL_BFIN_UART1
842 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
843 &bfin_lq035q1_device,
846 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
847 #ifdef CONFIG_BFIN_SIR0
850 #ifdef CONFIG_BFIN_SIR1
855 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
856 &i2c_bfin_twi_device,
859 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
860 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
861 &bfin_sport0_uart_device,
863 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
864 &bfin_sport1_uart_device,
868 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
869 &bfin_device_gpiokeys,
872 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
877 static int __init ezbrd_init(void)
879 printk(KERN_INFO "%s(): registering device resources\n", __func__);
880 i2c_register_board_info(0, bfin_i2c_board_info,
881 ARRAY_SIZE(bfin_i2c_board_info));
882 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
883 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
887 arch_initcall(ezbrd_init);
889 static struct platform_device *ezbrd_early_devices[] __initdata = {
890 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
891 #ifdef CONFIG_SERIAL_BFIN_UART0
894 #ifdef CONFIG_SERIAL_BFIN_UART1
899 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
900 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
901 &bfin_sport0_uart_device,
903 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
904 &bfin_sport1_uart_device,
909 void __init native_machine_early_platform_add_devices(void)
911 printk(KERN_INFO "register early platform devices\n");
912 early_platform_add_devices(ezbrd_early_devices,
913 ARRAY_SIZE(ezbrd_early_devices));
916 void native_machine_restart(char *cmd)
918 /* workaround reboot hang when booting from SPI */
919 if ((bfin_read_SYSCR() & 0x7) == 0x3)
920 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
923 void bfin_get_ether_addr(char *addr)
925 /* the MAC is stored in OTP memory page 0xDF */
928 u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
930 ret = otp_read(0xDF, 0x00, &otp_mac);
932 char *otp_mac_p = (char *)&otp_mac;
933 for (ret = 0; ret < 6; ++ret)
934 addr[ret] = otp_mac_p[5 - ret];
937 EXPORT_SYMBOL(bfin_get_ether_addr);