arch/blackfin/mach-bf527/boards/ezbrd.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *                2005 National ICT Australia (NICTA)
   4  *                      Aidan Williams <aidan@nicta.com.au>
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/platform_device.h>
  11 #include <linux/mtd/mtd.h>
  12 #include <linux/mtd/partitions.h>
  13 #include <linux/mtd/physmap.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/spi/flash.h>
  16
  17 #include <linux/i2c.h>
  18 #include <linux/irq.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/usb/musb.h>
  21 #include <asm/dma.h>
  22 #include <asm/bfin5xx_spi.h>
  23 #include <asm/reboot.h>
  24 #include <asm/nand.h>
  25 #include <asm/portmux.h>
  26 #include <asm/dpmc.h>
  27 #include <linux/spi/ad7877.h>
  28
  29 /*
  30  * Name the Board for the /proc/cpuinfo
  31  */
  32 const char bfin_board_name[] = "ADI BF526-EZBRD";
  33
  34 /*
  35  *  Driver needs to know address, irq and flag pin.
  36  */
  37
  38 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  39 static struct resource musb_resources[] = {
  40         [0] = {
  41                 .start  = 0xffc03800,
  42                 .end    = 0xffc03cff,
  43                 .flags  = IORESOURCE_MEM,
  44         },
  45         [1] = { /* general IRQ */
  46                 .start  = IRQ_USB_INT0,
  47                 .end    = IRQ_USB_INT0,
  48                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  49                 .name   = "mc"
  50         },
  51         [2] = { /* DMA IRQ */
  52                 .start  = IRQ_USB_DMA,
  53                 .end    = IRQ_USB_DMA,
  54                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  55                 .name   = "dma"
  56         },
  57 };
  58
  59 static struct musb_hdrc_config musb_config = {
  60         .multipoint     = 0,
  61         .dyn_fifo       = 0,
  62         .soft_con       = 1,
  63         .dma            = 1,
  64         .num_eps        = 8,
  65         .dma_channels   = 8,
  66         .gpio_vrsel     = GPIO_PG13,
  67         /* Some custom boards need to be active low, just set it to "0"
  68          * if it is the case.
  69          */
  70         .gpio_vrsel_active      = 1,
  71 };
  72
  73 static struct musb_hdrc_platform_data musb_plat = {
  74 #if defined(CONFIG_USB_MUSB_OTG)
  75         .mode           = MUSB_OTG,
  76 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  77         .mode           = MUSB_HOST,
  78 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  79         .mode           = MUSB_PERIPHERAL,
  80 #endif
  81         .config         = &musb_config,
  82 };
  83
  84 static u64 musb_dmamask = ~(u32)0;
  85
  86 static struct platform_device musb_device = {
  87         .name           = "musb-blackfin",
  88         .id             = 0,
  89         .dev = {
  90                 .dma_mask               = &musb_dmamask,
  91                 .coherent_dma_mask      = 0xffffffff,
  92                 .platform_data          = &musb_plat,
  93         },
  94         .num_resources  = ARRAY_SIZE(musb_resources),
  95         .resource       = musb_resources,
  96 };
  97 #endif
  98
  99 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 100 static struct mtd_partition ezbrd_partitions[] = {
 101         {
 102                 .name       = "bootloader(nor)",
 103                 .size       = 0x40000,
 104                 .offset     = 0,
 105         }, {
 106                 .name       = "linux kernel(nor)",
 107                 .size       = 0x1C0000,
 108                 .offset     = MTDPART_OFS_APPEND,
 109         }, {
 110                 .name       = "file system(nor)",
 111                 .size       = MTDPART_SIZ_FULL,
 112                 .offset     = MTDPART_OFS_APPEND,
 113         }
 114 };
 115
 116 static struct physmap_flash_data ezbrd_flash_data = {
 117         .width      = 2,
 118         .parts      = ezbrd_partitions,
 119         .nr_parts   = ARRAY_SIZE(ezbrd_partitions),
 120 };
 121
 122 static struct resource ezbrd_flash_resource = {
 123         .start = 0x20000000,
 124         .end   = 0x203fffff,
 125         .flags = IORESOURCE_MEM,
 126 };
 127
 128 static struct platform_device ezbrd_flash_device = {
 129         .name          = "physmap-flash",
 130         .id            = 0,
 131         .dev = {
 132                 .platform_data = &ezbrd_flash_data,
 133         },
 134         .num_resources = 1,
 135         .resource      = &ezbrd_flash_resource,
 136 };
 137 #endif
 138
 139 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 140 static struct mtd_partition partition_info[] = {
 141         {
 142                 .name = "bootloader(nand)",
 143                 .offset = 0,
 144                 .size = 0x40000,
 145         }, {
 146                 .name = "linux kernel(nand)",
 147                 .offset = MTDPART_OFS_APPEND,
 148                 .size = 4 * 1024 * 1024,
 149         },
 150         {
 151                 .name = "file system(nand)",
 152                 .offset = MTDPART_OFS_APPEND,
 153                 .size = MTDPART_SIZ_FULL,
 154         },
 155 };
 156
 157 static struct bf5xx_nand_platform bf5xx_nand_platform = {
 158         .data_width = NFC_NWIDTH_8,
 159         .partitions = partition_info,
 160         .nr_partitions = ARRAY_SIZE(partition_info),
 161         .rd_dly = 3,
 162         .wr_dly = 3,
 163 };
 164
 165 static struct resource bf5xx_nand_resources[] = {
 166         {
 167                 .start = NFC_CTL,
 168                 .end = NFC_DATA_RD + 2,
 169                 .flags = IORESOURCE_MEM,
 170         },
 171         {
 172                 .start = CH_NFC,
 173                 .end = CH_NFC,
 174                 .flags = IORESOURCE_IRQ,
 175         },
 176 };
 177
 178 static struct platform_device bf5xx_nand_device = {
 179         .name = "bf5xx-nand",
 180         .id = 0,
 181         .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
 182         .resource = bf5xx_nand_resources,
 183         .dev = {
 184                 .platform_data = &bf5xx_nand_platform,
 185         },
 186 };
 187 #endif
 188
 189 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 190 static struct platform_device rtc_device = {
 191         .name = "rtc-bfin",
 192         .id   = -1,
 193 };
 194 #endif
 195
 196
 197 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 198 #include <linux/bfin_mac.h>
 199 static const unsigned short bfin_mac_peripherals[] = P_RMII0;
 200
 201 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
 202         {
 203                 .addr = 1,
 204                 .irq = IRQ_MAC_PHYINT,
 205         },
 206 };
 207
 208 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
 209         .phydev_number = 1,
 210         .phydev_data = bfin_phydev_data,
 211         .phy_mode = PHY_INTERFACE_MODE_RMII,
 212         .mac_peripherals = bfin_mac_peripherals,
 213 };
 214
 215 static struct platform_device bfin_mii_bus = {
 216         .name = "bfin_mii_bus",
 217         .dev = {
 218                 .platform_data = &bfin_mii_bus_data,
 219         }
 220 };
 221
 222 static struct platform_device bfin_mac_device = {
 223         .name = "bfin_mac",
 224         .dev = {
 225                 .platform_data = &bfin_mii_bus,
 226         }
 227 };
 228 #endif
 229
 230 #if defined(CONFIG_MTD_M25P80) \
 231         || defined(CONFIG_MTD_M25P80_MODULE)
 232 static struct mtd_partition bfin_spi_flash_partitions[] = {
 233         {
 234                 .name = "bootloader(spi)",
 235                 .size = 0x00040000,
 236                 .offset = 0,
 237                 .mask_flags = MTD_CAP_ROM
 238         }, {
 239                 .name = "linux kernel(spi)",
 240                 .size = MTDPART_SIZ_FULL,
 241                 .offset = MTDPART_OFS_APPEND,
 242         }
 243 };
 244
 245 static struct flash_platform_data bfin_spi_flash_data = {
 246         .name = "m25p80",
 247         .parts = bfin_spi_flash_partitions,
 248         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 249         .type = "sst25wf040",
 250 };
 251
 252 /* SPI flash chip (sst25wf040) */
 253 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 254         .enable_dma = 0,         /* use dma transfer with this chip*/
 255         .bits_per_word = 8,
 256 };
 257 #endif
 258
 259 #if defined(CONFIG_BFIN_SPI_ADC) \
 260         || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 261 /* SPI ADC chip */
 262 static struct bfin5xx_spi_chip spi_adc_chip_info = {
 263         .enable_dma = 1,         /* use dma transfer with this chip*/
 264         .bits_per_word = 16,
 265 };
 266 #endif
 267
 268 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 269 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
 270         .enable_dma = 0,
 271         .bits_per_word = 8,
 272 };
 273 #endif
 274
 275 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 276 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
 277         .enable_dma = 0,
 278         .bits_per_word = 16,
 279 };
 280
 281 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
 282         .model                  = 7877,
 283         .vref_delay_usecs       = 50,   /* internal, no capacitor */
 284         .x_plate_ohms           = 419,
 285         .y_plate_ohms           = 486,
 286         .pressure_max           = 1000,
 287         .pressure_min           = 0,
 288         .stopacq_polarity       = 1,
 289         .first_conversion_delay = 3,
 290         .acquisition_time       = 1,
 291         .averaging              = 1,
 292         .pen_down_acc_interval  = 1,
 293 };
 294 #endif
 295
 296 #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
 297 #include <linux/spi/ad7879.h>
 298 static const struct ad7879_platform_data bfin_ad7879_ts_info = {
 299         .model                  = 7879, /* Model = AD7879 */
 300         .x_plate_ohms           = 620,  /* 620 Ohm from the touch datasheet */
 301         .pressure_max           = 10000,
 302         .pressure_min           = 0,
 303         .first_conversion_delay = 3,    /* wait 512us before do a first conversion */
 304         .acquisition_time       = 1,    /* 4us acquisition time per sample */
 305         .median                 = 2,    /* do 8 measurements */
 306         .averaging              = 1,    /* take the average of 4 middle samples */
 307         .pen_down_acc_interval  = 255,  /* 9.4 ms */
 308         .gpio_export            = 1,    /* Export GPIO to gpiolib */
 309         .gpio_base              = -1,   /* Dynamic allocation */
 310 };
 311 #endif
 312
 313 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
 314 static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
 315         .enable_dma = 0,
 316         .bits_per_word = 16,
 317 };
 318 #endif
 319
 320 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
 321          && defined(CONFIG_SND_SOC_WM8731_SPI)
 322 static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
 323         .enable_dma = 0,
 324         .bits_per_word = 16,
 325 };
 326 #endif
 327
 328 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 329 static struct bfin5xx_spi_chip spidev_chip_info = {
 330         .enable_dma = 0,
 331         .bits_per_word = 8,
 332 };
 333 #endif
 334
 335 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 336 static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
 337         .enable_dma = 0,
 338         .bits_per_word = 8,
 339 };
 340 #endif
 341
 342 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 343 #if defined(CONFIG_MTD_M25P80) \
 344         || defined(CONFIG_MTD_M25P80_MODULE)
 345         {
 346                 /* the modalias must be the same as spi device driver name */
 347                 .modalias = "m25p80", /* Name of spi_driver for this device */
 348                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 349                 .bus_num = 0, /* Framework bus number */
 350                 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
 351                 .platform_data = &bfin_spi_flash_data,
 352                 .controller_data = &spi_flash_chip_info,
 353                 .mode = SPI_MODE_3,
 354         },
 355 #endif
 356
 357 #if defined(CONFIG_BFIN_SPI_ADC) \
 358         || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 359         {
 360                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
 361                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
 362                 .bus_num = 0, /* Framework bus number */
 363                 .chip_select = 1, /* Framework chip select. */
 364                 .platform_data = NULL, /* No spi_driver specific config */
 365                 .controller_data = &spi_adc_chip_info,
 366         },
 367 #endif
 368
 369 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 370         {
 371                 .modalias = "mmc_spi",
 372                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 373                 .bus_num = 0,
 374                 .chip_select = 5,
 375                 .controller_data = &mmc_spi_chip_info,
 376                 .mode = SPI_MODE_3,
 377         },
 378 #endif
 379 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 380         {
 381                 .modalias               = "ad7877",
 382                 .platform_data          = &bfin_ad7877_ts_info,
 383                 .irq                    = IRQ_PF8,
 384                 .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
 385                 .bus_num        = 0,
 386                 .chip_select  = 2,
 387                 .controller_data = &spi_ad7877_chip_info,
 388         },
 389 #endif
 390 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
 391         {
 392                 .modalias = "ad7879",
 393                 .platform_data = &bfin_ad7879_ts_info,
 394                 .irq = IRQ_PG0,
 395                 .max_speed_hz = 5000000,     /* max spi clock (SCK) speed in HZ */
 396                 .bus_num = 0,
 397                 .chip_select = 5,
 398                 .controller_data = &spi_ad7879_chip_info,
 399                 .mode = SPI_CPHA | SPI_CPOL,
 400         },
 401 #endif
 402 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
 403          && defined(CONFIG_SND_SOC_WM8731_SPI)
 404         {
 405                 .modalias       = "wm8731",
 406                 .max_speed_hz   = 3125000,     /* max spi clock (SCK) speed in HZ */
 407                 .bus_num        = 0,
 408                 .chip_select    = 5,
 409                 .controller_data = &spi_wm8731_chip_info,
 410                 .mode = SPI_MODE_0,
 411         },
 412 #endif
 413 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 414         {
 415                 .modalias = "spidev",
 416                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 417                 .bus_num = 0,
 418                 .chip_select = 1,
 419                 .controller_data = &spidev_chip_info,
 420         },
 421 #endif
 422 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 423         {
 424                 .modalias = "bfin-lq035q1-spi",
 425                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 426                 .bus_num = 0,
 427                 .chip_select = 1,
 428                 .controller_data = &lq035q1_spi_chip_info,
 429                 .mode = SPI_CPHA | SPI_CPOL,
 430         },
 431 #endif
 432 };
 433
 434 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 435 /* SPI controller data */
 436 static struct bfin5xx_spi_master bfin_spi0_info = {
 437         .num_chipselect = 8,
 438         .enable_dma = 1,  /* master has the ability to do dma transfer */
 439         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 440 };
 441
 442 /* SPI (0) */
 443 static struct resource bfin_spi0_resource[] = {
 444         [0] = {
 445                 .start = SPI0_REGBASE,
 446                 .end   = SPI0_REGBASE + 0xFF,
 447                 .flags = IORESOURCE_MEM,
 448                 },
 449         [1] = {
 450                 .start = CH_SPI,
 451                 .end   = CH_SPI,
 452                 .flags = IORESOURCE_DMA,
 453         },
 454         [2] = {
 455                 .start = IRQ_SPI,
 456                 .end   = IRQ_SPI,
 457                 .flags = IORESOURCE_IRQ,
 458         },
 459 };
 460
 461 static struct platform_device bfin_spi0_device = {
 462         .name = "bfin-spi",
 463         .id = 0, /* Bus number */
 464         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 465         .resource = bfin_spi0_resource,
 466         .dev = {
 467                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 468         },
 469 };
 470 #endif  /* spi master and devices */
 471
 472 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 473 #ifdef CONFIG_SERIAL_BFIN_UART0
 474 static struct resource bfin_uart0_resources[] = {
 475         {
 476                 .start = UART0_THR,
 477                 .end = UART0_GCTL+2,
 478                 .flags = IORESOURCE_MEM,
 479         },
 480         {
 481                 .start = IRQ_UART0_RX,
 482                 .end = IRQ_UART0_RX+1,
 483                 .flags = IORESOURCE_IRQ,
 484         },
 485         {
 486                 .start = IRQ_UART0_ERROR,
 487                 .end = IRQ_UART0_ERROR,
 488                 .flags = IORESOURCE_IRQ,
 489         },
 490         {
 491                 .start = CH_UART0_TX,
 492                 .end = CH_UART0_TX,
 493                 .flags = IORESOURCE_DMA,
 494         },
 495         {
 496                 .start = CH_UART0_RX,
 497                 .end = CH_UART0_RX,
 498                 .flags = IORESOURCE_DMA,
 499         },
 500 };
 501
 502 unsigned short bfin_uart0_peripherals[] = {
 503         P_UART0_TX, P_UART0_RX, 0
 504 };
 505
 506 static struct platform_device bfin_uart0_device = {
 507         .name = "bfin-uart",
 508         .id = 0,
 509         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 510         .resource = bfin_uart0_resources,
 511         .dev = {
 512                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 513         },
 514 };
 515 #endif
 516 #ifdef CONFIG_SERIAL_BFIN_UART1
 517 static struct resource bfin_uart1_resources[] = {
 518         {
 519                 .start = UART1_THR,
 520                 .end = UART1_GCTL+2,
 521                 .flags = IORESOURCE_MEM,
 522         },
 523         {
 524                 .start = IRQ_UART1_RX,
 525                 .end = IRQ_UART1_RX+1,
 526                 .flags = IORESOURCE_IRQ,
 527         },
 528         {
 529                 .start = IRQ_UART1_ERROR,
 530                 .end = IRQ_UART1_ERROR,
 531                 .flags = IORESOURCE_IRQ,
 532         },
 533         {
 534                 .start = CH_UART1_TX,
 535                 .end = CH_UART1_TX,
 536                 .flags = IORESOURCE_DMA,
 537         },
 538         {
 539                 .start = CH_UART1_RX,
 540                 .end = CH_UART1_RX,
 541                 .flags = IORESOURCE_DMA,
 542         },
 543 #ifdef CONFIG_BFIN_UART1_CTSRTS
 544         {       /* CTS pin */
 545                 .start = GPIO_PG0,
 546                 .end = GPIO_PG0,
 547                 .flags = IORESOURCE_IO,
 548         },
 549         {       /* RTS pin */
 550                 .start = GPIO_PF10,
 551                 .end = GPIO_PF10,
 552                 .flags = IORESOURCE_IO,
 553         },
 554 #endif
 555 };
 556
 557 unsigned short bfin_uart1_peripherals[] = {
 558         P_UART1_TX, P_UART1_RX, 0
 559 };
 560
 561 static struct platform_device bfin_uart1_device = {
 562         .name = "bfin-uart",
 563         .id = 1,
 564         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 565         .resource = bfin_uart1_resources,
 566         .dev = {
 567                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 568         },
 569 };
 570 #endif
 571 #endif
 572
 573 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 574 #ifdef CONFIG_BFIN_SIR0
 575 static struct resource bfin_sir0_resources[] = {
 576         {
 577                 .start = 0xFFC00400,
 578                 .end = 0xFFC004FF,
 579                 .flags = IORESOURCE_MEM,
 580         },
 581         {
 582                 .start = IRQ_UART0_RX,
 583                 .end = IRQ_UART0_RX+1,
 584                 .flags = IORESOURCE_IRQ,
 585         },
 586         {
 587                 .start = CH_UART0_RX,
 588                 .end = CH_UART0_RX+1,
 589                 .flags = IORESOURCE_DMA,
 590         },
 591 };
 592
 593 static struct platform_device bfin_sir0_device = {
 594         .name = "bfin_sir",
 595         .id = 0,
 596         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 597         .resource = bfin_sir0_resources,
 598 };
 599 #endif
 600 #ifdef CONFIG_BFIN_SIR1
 601 static struct resource bfin_sir1_resources[] = {
 602         {
 603                 .start = 0xFFC02000,
 604                 .end = 0xFFC020FF,
 605                 .flags = IORESOURCE_MEM,
 606         },
 607         {
 608                 .start = IRQ_UART1_RX,
 609                 .end = IRQ_UART1_RX+1,
 610                 .flags = IORESOURCE_IRQ,
 611         },
 612         {
 613                 .start = CH_UART1_RX,
 614                 .end = CH_UART1_RX+1,
 615                 .flags = IORESOURCE_DMA,
 616         },
 617 };
 618
 619 static struct platform_device bfin_sir1_device = {
 620         .name = "bfin_sir",
 621         .id = 1,
 622         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 623         .resource = bfin_sir1_resources,
 624 };
 625 #endif
 626 #endif
 627
 628 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 629 static struct resource bfin_twi0_resource[] = {
 630         [0] = {
 631                 .start = TWI0_REGBASE,
 632                 .end   = TWI0_REGBASE,
 633                 .flags = IORESOURCE_MEM,
 634         },
 635         [1] = {
 636                 .start = IRQ_TWI,
 637                 .end   = IRQ_TWI,
 638                 .flags = IORESOURCE_IRQ,
 639         },
 640 };
 641
 642 static struct platform_device i2c_bfin_twi_device = {
 643         .name = "i2c-bfin-twi",
 644         .id = 0,
 645         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 646         .resource = bfin_twi0_resource,
 647 };
 648 #endif
 649
 650 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 651 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
 652         {
 653                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
 654         },
 655 #endif
 656 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
 657         {
 658                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
 659                 .irq = IRQ_PF8,
 660         },
 661 #endif
 662 };
 663
 664 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 665 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 666 static struct resource bfin_sport0_uart_resources[] = {
 667         {
 668                 .start = SPORT0_TCR1,
 669                 .end = SPORT0_MRCS3+4,
 670                 .flags = IORESOURCE_MEM,
 671         },
 672         {
 673                 .start = IRQ_SPORT0_RX,
 674                 .end = IRQ_SPORT0_RX+1,
 675                 .flags = IORESOURCE_IRQ,
 676         },
 677         {
 678                 .start = IRQ_SPORT0_ERROR,
 679                 .end = IRQ_SPORT0_ERROR,
 680                 .flags = IORESOURCE_IRQ,
 681         },
 682 };
 683
 684 unsigned short bfin_sport0_peripherals[] = {
 685         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 686         P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
 687 };
 688
 689 static struct platform_device bfin_sport0_uart_device = {
 690         .name = "bfin-sport-uart",
 691         .id = 0,
 692         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 693         .resource = bfin_sport0_uart_resources,
 694         .dev = {
 695                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
 696         },
 697 };
 698 #endif
 699 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 700 static struct resource bfin_sport1_uart_resources[] = {
 701         {
 702                 .start = SPORT1_TCR1,
 703                 .end = SPORT1_MRCS3+4,
 704                 .flags = IORESOURCE_MEM,
 705         },
 706         {
 707                 .start = IRQ_SPORT1_RX,
 708                 .end = IRQ_SPORT1_RX+1,
 709                 .flags = IORESOURCE_IRQ,
 710         },
 711         {
 712                 .start = IRQ_SPORT1_ERROR,
 713                 .end = IRQ_SPORT1_ERROR,
 714                 .flags = IORESOURCE_IRQ,
 715         },
 716 };
 717
 718 unsigned short bfin_sport1_peripherals[] = {
 719         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 720         P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
 721 };
 722
 723 static struct platform_device bfin_sport1_uart_device = {
 724         .name = "bfin-sport-uart",
 725         .id = 1,
 726         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 727         .resource = bfin_sport1_uart_resources,
 728         .dev = {
 729                 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
 730         },
 731 };
 732 #endif
 733 #endif
 734
 735 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 736 #include <linux/input.h>
 737 #include <linux/gpio_keys.h>
 738
 739 static struct gpio_keys_button bfin_gpio_keys_table[] = {
 740         {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
 741         {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
 742 };
 743
 744 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
 745         .buttons        = bfin_gpio_keys_table,
 746         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
 747 };
 748
 749 static struct platform_device bfin_device_gpiokeys = {
 750         .name      = "gpio-keys",
 751         .dev = {
 752                 .platform_data = &bfin_gpio_keys_data,
 753         },
 754 };
 755 #endif
 756
 757 static const unsigned int cclk_vlev_datasheet[] =
 758 {
 759         VRPAIR(VLEV_100, 400000000),
 760         VRPAIR(VLEV_105, 426000000),
 761         VRPAIR(VLEV_110, 500000000),
 762         VRPAIR(VLEV_115, 533000000),
 763         VRPAIR(VLEV_120, 600000000),
 764 };
 765
 766 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 767         .tuple_tab = cclk_vlev_datasheet,
 768         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 769         .vr_settling_time = 25 /* us */,
 770 };
 771
 772 static struct platform_device bfin_dpmc = {
 773         .name = "bfin dpmc",
 774         .dev = {
 775                 .platform_data = &bfin_dmpc_vreg_data,
 776         },
 777 };
 778
 779 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 780 #include <asm/bfin-lq035q1.h>
 781
 782 static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
 783         .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
 784         .ppi_mode = USE_RGB565_16_BIT_PPI,
 785         .use_bl = 1,
 786         .gpio_bl = GPIO_PG12,
 787 };
 788
 789 static struct resource bfin_lq035q1_resources[] = {
 790         {
 791                 .start = IRQ_PPI_ERROR,
 792                 .end = IRQ_PPI_ERROR,
 793                 .flags = IORESOURCE_IRQ,
 794         },
 795 };
 796
 797 static struct platform_device bfin_lq035q1_device = {
 798         .name           = "bfin-lq035q1",
 799         .id             = -1,
 800         .num_resources  = ARRAY_SIZE(bfin_lq035q1_resources),
 801         .resource       = bfin_lq035q1_resources,
 802         .dev            = {
 803                 .platform_data = &bfin_lq035q1_data,
 804         },
 805 };
 806 #endif
 807
 808 static struct platform_device *stamp_devices[] __initdata = {
 809
 810         &bfin_dpmc,
 811
 812 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 813         &bf5xx_nand_device,
 814 #endif
 815
 816 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 817         &rtc_device,
 818 #endif
 819
 820 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
 821         &musb_device,
 822 #endif
 823
 824 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 825         &bfin_mii_bus,
 826         &bfin_mac_device,
 827 #endif
 828
 829 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 830         &bfin_spi0_device,
 831 #endif
 832
 833 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 834 #ifdef CONFIG_SERIAL_BFIN_UART0
 835         &bfin_uart0_device,
 836 #endif
 837 #ifdef CONFIG_SERIAL_BFIN_UART1
 838         &bfin_uart1_device,
 839 #endif
 840 #endif
 841
 842 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 843         &bfin_lq035q1_device,
 844 #endif
 845
 846 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 847 #ifdef CONFIG_BFIN_SIR0
 848         &bfin_sir0_device,
 849 #endif
 850 #ifdef CONFIG_BFIN_SIR1
 851         &bfin_sir1_device,
 852 #endif
 853 #endif
 854
 855 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 856         &i2c_bfin_twi_device,
 857 #endif
 858
 859 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 860 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 861         &bfin_sport0_uart_device,
 862 #endif
 863 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 864         &bfin_sport1_uart_device,
 865 #endif
 866 #endif
 867
 868 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 869         &bfin_device_gpiokeys,
 870 #endif
 871
 872 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 873         &ezbrd_flash_device,
 874 #endif
 875 };
 876
 877 static int __init ezbrd_init(void)
 878 {
 879         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 880         i2c_register_board_info(0, bfin_i2c_board_info,
 881                                 ARRAY_SIZE(bfin_i2c_board_info));
 882         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
 883         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 884         return 0;
 885 }
 886
 887 arch_initcall(ezbrd_init);
 888
 889 static struct platform_device *ezbrd_early_devices[] __initdata = {
 890 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
 891 #ifdef CONFIG_SERIAL_BFIN_UART0
 892         &bfin_uart0_device,
 893 #endif
 894 #ifdef CONFIG_SERIAL_BFIN_UART1
 895         &bfin_uart1_device,
 896 #endif
 897 #endif
 898
 899 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
 900 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 901         &bfin_sport0_uart_device,
 902 #endif
 903 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 904         &bfin_sport1_uart_device,
 905 #endif
 906 #endif
 907 };
 908
 909 void __init native_machine_early_platform_add_devices(void)
 910 {
 911         printk(KERN_INFO "register early platform devices\n");
 912         early_platform_add_devices(ezbrd_early_devices,
 913                 ARRAY_SIZE(ezbrd_early_devices));
 914 }
 915
 916 void native_machine_restart(char *cmd)
 917 {
 918         /* workaround reboot hang when booting from SPI */
 919         if ((bfin_read_SYSCR() & 0x7) == 0x3)
 920                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 921 }
 922
 923 void bfin_get_ether_addr(char *addr)
 924 {
 925         /* the MAC is stored in OTP memory page 0xDF */
 926         u32 ret;
 927         u64 otp_mac;
 928         u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
 929
 930         ret = otp_read(0xDF, 0x00, &otp_mac);
 931         if (!(ret & 0x1)) {
 932                 char *otp_mac_p = (char *)&otp_mac;
 933                 for (ret = 0; ret < 6; ++ret)
 934                         addr[ret] = otp_mac_p[5 - ret];
 935         }
 936 }
 937 EXPORT_SYMBOL(bfin_get_ether_addr);