2 * Copyright 2004-20010 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
6 * Licensed under the GPL-2 or later.
9 #include <linux/device.h>
10 #include <linux/platform_device.h>
11 #include <linux/mtd/mtd.h>
12 #include <linux/mtd/partitions.h>
13 #include <linux/mtd/physmap.h>
14 #include <linux/spi/spi.h>
15 #include <linux/spi/flash.h>
16 #include <linux/i2c.h>
17 #include <linux/irq.h>
18 #include <linux/interrupt.h>
19 #include <linux/usb/musb.h>
20 #include <linux/leds.h>
21 #include <linux/input.h>
23 #include <asm/bfin5xx_spi.h>
24 #include <asm/reboot.h>
26 #include <asm/portmux.h>
31 * Name the Board for the /proc/cpuinfo
33 const char bfin_board_name[] = "ADI BF527-AD7160EVAL";
36 * Driver needs to know address, irq and flag pin.
39 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
40 static struct resource musb_resources[] = {
44 .flags = IORESOURCE_MEM,
46 [1] = { /* general IRQ */
47 .start = IRQ_USB_INT0,
49 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
54 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
58 static struct musb_hdrc_config musb_config = {
65 .gpio_vrsel = GPIO_PG13,
66 /* Some custom boards need to be active low, just set it to "0"
69 .gpio_vrsel_active = 1,
72 static struct musb_hdrc_platform_data musb_plat = {
73 #if defined(CONFIG_USB_MUSB_OTG)
75 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
77 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
78 .mode = MUSB_PERIPHERAL,
80 .config = &musb_config,
83 static u64 musb_dmamask = ~(u32)0;
85 static struct platform_device musb_device = {
89 .dma_mask = &musb_dmamask,
90 .coherent_dma_mask = 0xffffffff,
91 .platform_data = &musb_plat,
93 .num_resources = ARRAY_SIZE(musb_resources),
94 .resource = musb_resources,
98 #if defined(CONFIG_FB_BFIN_RA158Z) || defined(CONFIG_FB_BFIN_RA158Z_MODULE)
99 static struct resource bf52x_ra158z_resources[] = {
101 .start = IRQ_PPI_ERROR,
102 .end = IRQ_PPI_ERROR,
103 .flags = IORESOURCE_IRQ,
107 static struct platform_device bf52x_ra158z_device = {
108 .name = "bfin-ra158z",
110 .num_resources = ARRAY_SIZE(bf52x_ra158z_resources),
111 .resource = bf52x_ra158z_resources,
115 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
116 static struct mtd_partition ad7160eval_partitions[] = {
118 .name = "bootloader(nor)",
122 .name = "linux kernel(nor)",
124 .offset = MTDPART_OFS_APPEND,
126 .name = "file system(nor)",
127 .size = MTDPART_SIZ_FULL,
128 .offset = MTDPART_OFS_APPEND,
132 static struct physmap_flash_data ad7160eval_flash_data = {
134 .parts = ad7160eval_partitions,
135 .nr_parts = ARRAY_SIZE(ad7160eval_partitions),
138 static struct resource ad7160eval_flash_resource = {
141 .flags = IORESOURCE_MEM,
144 static struct platform_device ad7160eval_flash_device = {
145 .name = "physmap-flash",
148 .platform_data = &ad7160eval_flash_data,
151 .resource = &ad7160eval_flash_resource,
155 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
156 static struct mtd_partition partition_info[] = {
158 .name = "linux kernel(nand)",
160 .size = 4 * 1024 * 1024,
163 .name = "file system(nand)",
164 .offset = MTDPART_OFS_APPEND,
165 .size = MTDPART_SIZ_FULL,
169 static struct bf5xx_nand_platform bf5xx_nand_platform = {
170 .data_width = NFC_NWIDTH_8,
171 .partitions = partition_info,
172 .nr_partitions = ARRAY_SIZE(partition_info),
177 static struct resource bf5xx_nand_resources[] = {
180 .end = NFC_DATA_RD + 2,
181 .flags = IORESOURCE_MEM,
186 .flags = IORESOURCE_IRQ,
190 static struct platform_device bf5xx_nand_device = {
191 .name = "bf5xx-nand",
193 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
194 .resource = bf5xx_nand_resources,
196 .platform_data = &bf5xx_nand_platform,
201 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
202 static struct platform_device rtc_device = {
208 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
209 #include <linux/bfin_mac.h>
210 static const unsigned short bfin_mac_peripherals[] = P_RMII0;
212 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
215 .irq = IRQ_MAC_PHYINT,
219 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
221 .phydev_data = bfin_phydev_data,
222 .phy_mode = PHY_INTERFACE_MODE_RMII,
223 .mac_peripherals = bfin_mac_peripherals,
226 static struct platform_device bfin_mii_bus = {
227 .name = "bfin_mii_bus",
229 .platform_data = &bfin_mii_bus_data,
233 static struct platform_device bfin_mac_device = {
236 .platform_data = &bfin_mii_bus,
242 #if defined(CONFIG_MTD_M25P80) \
243 || defined(CONFIG_MTD_M25P80_MODULE)
244 static struct mtd_partition bfin_spi_flash_partitions[] = {
246 .name = "bootloader(spi)",
249 .mask_flags = MTD_CAP_ROM
251 .name = "linux kernel(spi)",
252 .size = MTDPART_SIZ_FULL,
253 .offset = MTDPART_OFS_APPEND,
257 static struct flash_platform_data bfin_spi_flash_data = {
259 .parts = bfin_spi_flash_partitions,
260 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
264 /* SPI flash chip (m25p64) */
265 static struct bfin5xx_spi_chip spi_flash_chip_info = {
266 .enable_dma = 0, /* use dma transfer with this chip*/
271 #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
272 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
273 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
279 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
280 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
286 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
287 static struct bfin5xx_spi_chip spidev_chip_info = {
293 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
294 static struct platform_device bfin_i2s = {
296 .id = CONFIG_SND_BF5XX_SPORT_NUM,
297 /* TODO: add platform data here */
301 #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
302 static struct platform_device bfin_tdm = {
304 .id = CONFIG_SND_BF5XX_SPORT_NUM,
305 /* TODO: add platform data here */
309 static struct spi_board_info bfin_spi_board_info[] __initdata = {
310 #if defined(CONFIG_MTD_M25P80) \
311 || defined(CONFIG_MTD_M25P80_MODULE)
313 /* the modalias must be the same as spi device driver name */
314 .modalias = "m25p80", /* Name of spi_driver for this device */
315 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
316 .bus_num = 0, /* Framework bus number */
317 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
318 .platform_data = &bfin_spi_flash_data,
319 .controller_data = &spi_flash_chip_info,
323 #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
324 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
326 .modalias = "ad183x",
327 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
330 .controller_data = &ad1836_spi_chip_info,
333 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
335 .modalias = "mmc_spi",
336 .max_speed_hz = 30000000, /* max spi clock (SCK) speed in HZ */
338 .chip_select = GPIO_PH3 + MAX_CTRL_CS,
339 .controller_data = &mmc_spi_chip_info,
343 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
345 .modalias = "spidev",
346 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
349 .controller_data = &spidev_chip_info,
354 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
355 /* SPI controller data */
356 static struct bfin5xx_spi_master bfin_spi0_info = {
357 .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
358 .enable_dma = 1, /* master has the ability to do dma transfer */
359 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
363 static struct resource bfin_spi0_resource[] = {
365 .start = SPI0_REGBASE,
366 .end = SPI0_REGBASE + 0xFF,
367 .flags = IORESOURCE_MEM,
372 .flags = IORESOURCE_DMA,
377 .flags = IORESOURCE_IRQ,
381 static struct platform_device bfin_spi0_device = {
383 .id = 0, /* Bus number */
384 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
385 .resource = bfin_spi0_resource,
387 .platform_data = &bfin_spi0_info, /* Passed to driver */
390 #endif /* spi master and devices */
392 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
393 #ifdef CONFIG_SERIAL_BFIN_UART0
394 static struct resource bfin_uart0_resources[] = {
398 .flags = IORESOURCE_MEM,
401 .start = IRQ_UART0_RX,
402 .end = IRQ_UART0_RX+1,
403 .flags = IORESOURCE_IRQ,
406 .start = IRQ_UART0_ERROR,
407 .end = IRQ_UART0_ERROR,
408 .flags = IORESOURCE_IRQ,
411 .start = CH_UART0_TX,
413 .flags = IORESOURCE_DMA,
416 .start = CH_UART0_RX,
418 .flags = IORESOURCE_DMA,
422 unsigned short bfin_uart0_peripherals[] = {
423 P_UART0_TX, P_UART0_RX, 0
426 static struct platform_device bfin_uart0_device = {
429 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
430 .resource = bfin_uart0_resources,
432 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
436 #ifdef CONFIG_SERIAL_BFIN_UART1
437 static struct resource bfin_uart1_resources[] = {
441 .flags = IORESOURCE_MEM,
444 .start = IRQ_UART1_RX,
445 .end = IRQ_UART1_RX+1,
446 .flags = IORESOURCE_IRQ,
449 .start = IRQ_UART1_ERROR,
450 .end = IRQ_UART1_ERROR,
451 .flags = IORESOURCE_IRQ,
454 .start = CH_UART1_TX,
456 .flags = IORESOURCE_DMA,
459 .start = CH_UART1_RX,
461 .flags = IORESOURCE_DMA,
463 #ifdef CONFIG_BFIN_UART1_CTSRTS
467 .flags = IORESOURCE_IO,
472 .flags = IORESOURCE_IO,
477 unsigned short bfin_uart1_peripherals[] = {
478 P_UART1_TX, P_UART1_RX, 0
481 static struct platform_device bfin_uart1_device = {
484 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
485 .resource = bfin_uart1_resources,
487 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
493 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
494 #ifdef CONFIG_BFIN_SIR0
495 static struct resource bfin_sir0_resources[] = {
499 .flags = IORESOURCE_MEM,
502 .start = IRQ_UART0_RX,
503 .end = IRQ_UART0_RX+1,
504 .flags = IORESOURCE_IRQ,
507 .start = CH_UART0_RX,
508 .end = CH_UART0_RX+1,
509 .flags = IORESOURCE_DMA,
513 static struct platform_device bfin_sir0_device = {
516 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
517 .resource = bfin_sir0_resources,
520 #ifdef CONFIG_BFIN_SIR1
521 static struct resource bfin_sir1_resources[] = {
525 .flags = IORESOURCE_MEM,
528 .start = IRQ_UART1_RX,
529 .end = IRQ_UART1_RX+1,
530 .flags = IORESOURCE_IRQ,
533 .start = CH_UART1_RX,
534 .end = CH_UART1_RX+1,
535 .flags = IORESOURCE_DMA,
539 static struct platform_device bfin_sir1_device = {
542 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
543 .resource = bfin_sir1_resources,
548 #if defined(CONFIG_TOUCHSCREEN_AD7160) || defined(CONFIG_TOUCHSCREEN_AD7160_MODULE)
549 #include <linux/input/ad7160.h>
550 static const struct ad7160_platform_data bfin_ad7160_ts_info = {
555 .coord_pref = AD7160_ORIG_TOP_LEFT,
556 .first_touch_window = 5,
558 .event_cabs = AD7160_EMIT_ABS_MT_TRACKING_ID |
559 AD7160_EMIT_ABS_MT_PRESSURE |
560 AD7160_TRACKING_ID_ASCENDING,
561 .finger_act_ctrl = 0x64,
562 .haptic_effect1_ctrl = AD7160_HAPTIC_SLOT_A(60) |
563 AD7160_HAPTIC_SLOT_A_LVL_HIGH |
564 AD7160_HAPTIC_SLOT_B(60) |
565 AD7160_HAPTIC_SLOT_B_LVL_LOW,
567 .haptic_effect2_ctrl = AD7160_HAPTIC_SLOT_A(20) |
568 AD7160_HAPTIC_SLOT_A_LVL_HIGH |
569 AD7160_HAPTIC_SLOT_B(80) |
570 AD7160_HAPTIC_SLOT_B_LVL_LOW |
571 AD7160_HAPTIC_SLOT_C(120) |
572 AD7160_HAPTIC_SLOT_C_LVL_HIGH |
573 AD7160_HAPTIC_SLOT_D(30) |
574 AD7160_HAPTIC_SLOT_D_LVL_LOW,
578 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
579 static struct resource bfin_twi0_resource[] = {
581 .start = TWI0_REGBASE,
583 .flags = IORESOURCE_MEM,
588 .flags = IORESOURCE_IRQ,
592 static struct platform_device i2c_bfin_twi_device = {
593 .name = "i2c-bfin-twi",
595 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
596 .resource = bfin_twi0_resource,
600 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
601 #if defined(CONFIG_TOUCHSCREEN_AD7160) || defined(CONFIG_TOUCHSCREEN_AD7160_MODULE)
603 I2C_BOARD_INFO("ad7160", 0x33),
605 .platform_data = (void *)&bfin_ad7160_ts_info,
610 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
611 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
612 static struct resource bfin_sport0_uart_resources[] = {
614 .start = SPORT0_TCR1,
615 .end = SPORT0_MRCS3+4,
616 .flags = IORESOURCE_MEM,
619 .start = IRQ_SPORT0_RX,
620 .end = IRQ_SPORT0_RX+1,
621 .flags = IORESOURCE_IRQ,
624 .start = IRQ_SPORT0_ERROR,
625 .end = IRQ_SPORT0_ERROR,
626 .flags = IORESOURCE_IRQ,
630 unsigned short bfin_sport0_peripherals[] = {
631 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
632 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
635 static struct platform_device bfin_sport0_uart_device = {
636 .name = "bfin-sport-uart",
638 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
639 .resource = bfin_sport0_uart_resources,
641 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
645 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
646 static struct resource bfin_sport1_uart_resources[] = {
648 .start = SPORT1_TCR1,
649 .end = SPORT1_MRCS3+4,
650 .flags = IORESOURCE_MEM,
653 .start = IRQ_SPORT1_RX,
654 .end = IRQ_SPORT1_RX+1,
655 .flags = IORESOURCE_IRQ,
658 .start = IRQ_SPORT1_ERROR,
659 .end = IRQ_SPORT1_ERROR,
660 .flags = IORESOURCE_IRQ,
664 unsigned short bfin_sport1_peripherals[] = {
665 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
666 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
669 static struct platform_device bfin_sport1_uart_device = {
670 .name = "bfin-sport-uart",
672 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
673 .resource = bfin_sport1_uart_resources,
675 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
681 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
682 #include <asm/bfin_rotary.h>
684 static struct bfin_rotary_platform_data bfin_rotary_data = {
685 /*.rotary_up_key = KEY_UP,*/
686 /*.rotary_down_key = KEY_DOWN,*/
687 .rotary_rel_code = REL_WHEEL,
688 .rotary_button_key = KEY_ENTER,
689 .debounce = 10, /* 0..17 */
690 .mode = ROT_QUAD_ENC | ROT_DEBE,
693 static struct resource bfin_rotary_resources[] = {
697 .flags = IORESOURCE_IRQ,
701 static struct platform_device bfin_rotary_device = {
702 .name = "bfin-rotary",
704 .num_resources = ARRAY_SIZE(bfin_rotary_resources),
705 .resource = bfin_rotary_resources,
707 .platform_data = &bfin_rotary_data,
712 static const unsigned int cclk_vlev_datasheet[] = {
713 VRPAIR(VLEV_100, 400000000),
714 VRPAIR(VLEV_105, 426000000),
715 VRPAIR(VLEV_110, 500000000),
716 VRPAIR(VLEV_115, 533000000),
717 VRPAIR(VLEV_120, 600000000),
720 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
721 .tuple_tab = cclk_vlev_datasheet,
722 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
723 .vr_settling_time = 25 /* us */,
726 static struct platform_device bfin_dpmc = {
729 .platform_data = &bfin_dmpc_vreg_data,
733 static struct platform_device *stamp_devices[] __initdata = {
737 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
741 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
745 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
749 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
754 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
758 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
759 #ifdef CONFIG_SERIAL_BFIN_UART0
762 #ifdef CONFIG_SERIAL_BFIN_UART1
767 #if defined(CONFIG_FB_BFIN_RA158Z) || defined(CONFIG_FB_BFIN_RA158Z_MODULE)
768 &bf52x_ra158z_device,
771 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
772 #ifdef CONFIG_BFIN_SIR0
775 #ifdef CONFIG_BFIN_SIR1
780 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
781 &i2c_bfin_twi_device,
784 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
785 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
786 &bfin_sport0_uart_device,
788 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
789 &bfin_sport1_uart_device,
793 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
797 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
798 &ad7160eval_flash_device,
801 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
805 #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
810 static int __init ad7160eval_init(void)
812 printk(KERN_INFO "%s(): registering device resources\n", __func__);
813 i2c_register_board_info(0, bfin_i2c_board_info,
814 ARRAY_SIZE(bfin_i2c_board_info));
815 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
816 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
820 arch_initcall(ad7160eval_init);
822 static struct platform_device *ad7160eval_early_devices[] __initdata = {
823 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
824 #ifdef CONFIG_SERIAL_BFIN_UART0
827 #ifdef CONFIG_SERIAL_BFIN_UART1
832 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
833 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
834 &bfin_sport0_uart_device,
836 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
837 &bfin_sport1_uart_device,
842 void __init native_machine_early_platform_add_devices(void)
844 printk(KERN_INFO "register early platform devices\n");
845 early_platform_add_devices(ad7160eval_early_devices,
846 ARRAY_SIZE(ad7160eval_early_devices));
849 void native_machine_restart(char *cmd)
851 /* workaround reboot hang when booting from SPI */
852 if ((bfin_read_SYSCR() & 0x7) == 0x3)
853 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
856 void bfin_get_ether_addr(char *addr)
858 /* the MAC is stored in OTP memory page 0xDF */
861 u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
863 ret = otp_read(0xDF, 0x00, &otp_mac);
865 char *otp_mac_p = (char *)&otp_mac;
866 for (ret = 0; ret < 6; ++ret)
867 addr[ret] = otp_mac_p[5 - ret];
870 EXPORT_SYMBOL(bfin_get_ether_addr);