arch/blackfin/mach-bf518/boards/ezbrd.c

   1 /*
   2  * File:         arch/blackfin/mach-bf518/boards/ezbrd.c
   3  * Based on:     arch/blackfin/mach-bf527/boards/ezbrd.c
   4  * Author:       Bryan Wu <cooloney@kernel.org>
   5  *
   6  * Created:
   7  * Description:
   8  *
   9  * Modified:
  10  *               Copyright 2005 National ICT Australia (NICTA)
  11  *               Copyright 2004-2008 Analog Devices Inc.
  12  *
  13  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
  14  *
  15  * This program is free software; you can redistribute it and/or modify
  16  * it under the terms of the GNU General Public License as published by
  17  * the Free Software Foundation; either version 2 of the License, or
  18  * (at your option) any later version.
  19  *
  20  * This program is distributed in the hope that it will be useful,
  21  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  * GNU General Public License for more details.
  24  *
  25  * You should have received a copy of the GNU General Public License
  26  * along with this program; if not, see the file COPYING, or write
  27  * to the Free Software Foundation, Inc.,
  28  * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  29  */
  30
  31 #include <linux/device.h>
  32 #include <linux/platform_device.h>
  33 #include <linux/mtd/mtd.h>
  34 #include <linux/mtd/partitions.h>
  35 #include <linux/mtd/physmap.h>
  36 #include <linux/spi/spi.h>
  37 #include <linux/spi/flash.h>
  38
  39 #include <linux/i2c.h>
  40 #include <linux/irq.h>
  41 #include <linux/interrupt.h>
  42 #include <asm/dma.h>
  43 #include <asm/bfin5xx_spi.h>
  44 #include <asm/reboot.h>
  45 #include <asm/portmux.h>
  46 #include <asm/dpmc.h>
  47 #include <asm/bfin_sdh.h>
  48 #include <linux/spi/ad7877.h>
  49 #include <net/dsa.h>
  50
  51 /*
  52  * Name the Board for the /proc/cpuinfo
  53  */
  54 const char bfin_board_name[] = "ADI BF518F-EZBRD";
  55
  56 /*
  57  *  Driver needs to know address, irq and flag pin.
  58  */
  59
  60 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  61 static struct mtd_partition ezbrd_partitions[] = {
  62         {
  63                 .name       = "bootloader(nor)",
  64                 .size       = 0x40000,
  65                 .offset     = 0,
  66         }, {
  67                 .name       = "linux kernel(nor)",
  68                 .size       = 0x1C0000,
  69                 .offset     = MTDPART_OFS_APPEND,
  70         }, {
  71                 .name       = "file system(nor)",
  72                 .size       = MTDPART_SIZ_FULL,
  73                 .offset     = MTDPART_OFS_APPEND,
  74         }
  75 };
  76
  77 static struct physmap_flash_data ezbrd_flash_data = {
  78         .width      = 2,
  79         .parts      = ezbrd_partitions,
  80         .nr_parts   = ARRAY_SIZE(ezbrd_partitions),
  81 };
  82
  83 static struct resource ezbrd_flash_resource = {
  84         .start = 0x20000000,
  85 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  86         .end   = 0x202fffff,
  87 #else
  88         .end   = 0x203fffff,
  89 #endif
  90         .flags = IORESOURCE_MEM,
  91 };
  92
  93 static struct platform_device ezbrd_flash_device = {
  94         .name          = "physmap-flash",
  95         .id            = 0,
  96         .dev = {
  97                 .platform_data = &ezbrd_flash_data,
  98         },
  99         .num_resources = 1,
 100         .resource      = &ezbrd_flash_resource,
 101 };
 102 #endif
 103
 104 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 105 static struct platform_device rtc_device = {
 106         .name = "rtc-bfin",
 107         .id   = -1,
 108 };
 109 #endif
 110
 111 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 112 static struct platform_device bfin_mii_bus = {
 113         .name = "bfin_mii_bus",
 114 };
 115
 116 static struct platform_device bfin_mac_device = {
 117         .name = "bfin_mac",
 118         .dev.platform_data = &bfin_mii_bus,
 119 };
 120
 121 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 122 static struct dsa_platform_data ksz8893m_switch_data = {
 123         .mii_bus = &bfin_mii_bus.dev,
 124         .netdev = &bfin_mac_device.dev,
 125         .port_names[0]  = NULL,
 126         .port_names[1]  = "eth%d",
 127         .port_names[2]  = "eth%d",
 128         .port_names[3]  = "cpu",
 129 };
 130
 131 static struct platform_device ksz8893m_switch_device = {
 132         .name           = "dsa",
 133         .id             = 0,
 134         .num_resources  = 0,
 135         .dev.platform_data = &ksz8893m_switch_data,
 136 };
 137 #endif
 138 #endif
 139
 140 #if defined(CONFIG_MTD_M25P80) \
 141         || defined(CONFIG_MTD_M25P80_MODULE)
 142 static struct mtd_partition bfin_spi_flash_partitions[] = {
 143         {
 144                 .name = "bootloader(spi)",
 145                 .size = 0x00040000,
 146                 .offset = 0,
 147                 .mask_flags = MTD_CAP_ROM
 148         }, {
 149                 .name = "linux kernel(spi)",
 150                 .size = MTDPART_SIZ_FULL,
 151                 .offset = MTDPART_OFS_APPEND,
 152         }
 153 };
 154
 155 static struct flash_platform_data bfin_spi_flash_data = {
 156         .name = "m25p80",
 157         .parts = bfin_spi_flash_partitions,
 158         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 159         .type = "m25p16",
 160 };
 161
 162 /* SPI flash chip (m25p64) */
 163 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 164         .enable_dma = 0,         /* use dma transfer with this chip*/
 165         .bits_per_word = 8,
 166 };
 167 #endif
 168
 169 #if defined(CONFIG_BFIN_SPI_ADC) \
 170         || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 171 /* SPI ADC chip */
 172 static struct bfin5xx_spi_chip spi_adc_chip_info = {
 173         .enable_dma = 1,         /* use dma transfer with this chip*/
 174         .bits_per_word = 16,
 175 };
 176 #endif
 177
 178 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 179 #if defined(CONFIG_NET_DSA_KSZ8893M) \
 180         || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 181 /* SPI SWITCH CHIP */
 182 static struct bfin5xx_spi_chip spi_switch_info = {
 183         .enable_dma = 0,
 184         .bits_per_word = 8,
 185 };
 186 #endif
 187 #endif
 188
 189 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 190 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
 191         .enable_dma = 0,
 192         .bits_per_word = 8,
 193 };
 194 #endif
 195
 196 #if defined(CONFIG_PBX)
 197 static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
 198         .ctl_reg        = 0x4, /* send zero */
 199         .enable_dma     = 0,
 200         .bits_per_word  = 8,
 201         .cs_change_per_word = 1,
 202 };
 203 #endif
 204
 205 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 206 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
 207         .enable_dma = 0,
 208         .bits_per_word = 16,
 209 };
 210
 211 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
 212         .model                  = 7877,
 213         .vref_delay_usecs       = 50,   /* internal, no capacitor */
 214         .x_plate_ohms           = 419,
 215         .y_plate_ohms           = 486,
 216         .pressure_max           = 1000,
 217         .pressure_min           = 0,
 218         .stopacq_polarity       = 1,
 219         .first_conversion_delay = 3,
 220         .acquisition_time       = 1,
 221         .averaging              = 1,
 222         .pen_down_acc_interval  = 1,
 223 };
 224 #endif
 225
 226 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
 227          && defined(CONFIG_SND_SOC_WM8731_SPI)
 228 static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
 229         .enable_dma = 0,
 230         .bits_per_word = 16,
 231 };
 232 #endif
 233
 234 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 235 static struct bfin5xx_spi_chip spidev_chip_info = {
 236         .enable_dma = 0,
 237         .bits_per_word = 8,
 238 };
 239 #endif
 240
 241 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 242 #if defined(CONFIG_MTD_M25P80) \
 243         || defined(CONFIG_MTD_M25P80_MODULE)
 244         {
 245                 /* the modalias must be the same as spi device driver name */
 246                 .modalias = "m25p80", /* Name of spi_driver for this device */
 247                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 248                 .bus_num = 0, /* Framework bus number */
 249                 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
 250                 .platform_data = &bfin_spi_flash_data,
 251                 .controller_data = &spi_flash_chip_info,
 252                 .mode = SPI_MODE_3,
 253         },
 254 #endif
 255
 256 #if defined(CONFIG_BFIN_SPI_ADC) \
 257         || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 258         {
 259                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
 260                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
 261                 .bus_num = 0, /* Framework bus number */
 262                 .chip_select = 1, /* Framework chip select. */
 263                 .platform_data = NULL, /* No spi_driver specific config */
 264                 .controller_data = &spi_adc_chip_info,
 265         },
 266 #endif
 267
 268 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 269 #if defined(CONFIG_NET_DSA_KSZ8893M) \
 270         || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 271         {
 272                 .modalias = "ksz8893m",
 273                 .max_speed_hz = 5000000,
 274                 .bus_num = 0,
 275                 .chip_select = 1,
 276                 .platform_data = NULL,
 277                 .controller_data = &spi_switch_info,
 278                 .mode = SPI_MODE_3,
 279         },
 280 #endif
 281 #endif
 282
 283 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 284         {
 285                 .modalias = "mmc_spi",
 286                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 287                 .bus_num = 0,
 288                 .chip_select = 5,
 289                 .controller_data = &mmc_spi_chip_info,
 290                 .mode = SPI_MODE_3,
 291         },
 292 #endif
 293 #if defined(CONFIG_PBX)
 294         {
 295                 .modalias = "fxs-spi",
 296                 .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
 297                 .bus_num = 0,
 298                 .chip_select = 8 - CONFIG_J11_JUMPER,
 299                 .controller_data = &spi_si3xxx_chip_info,
 300                 .mode = SPI_MODE_3,
 301         },
 302         {
 303                 .modalias = "fxo-spi",
 304                 .max_speed_hz = 12500000,     /* max spi clock (SCK) speed in HZ */
 305                 .bus_num = 0,
 306                 .chip_select = 8 - CONFIG_J19_JUMPER,
 307                 .controller_data = &spi_si3xxx_chip_info,
 308                 .mode = SPI_MODE_3,
 309         },
 310 #endif
 311 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 312         {
 313                 .modalias               = "ad7877",
 314                 .platform_data          = &bfin_ad7877_ts_info,
 315                 .irq                    = IRQ_PF8,
 316                 .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
 317                 .bus_num        = 0,
 318                 .chip_select  = 2,
 319                 .controller_data = &spi_ad7877_chip_info,
 320         },
 321 #endif
 322 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
 323          && defined(CONFIG_SND_SOC_WM8731_SPI)
 324         {
 325                 .modalias       = "wm8731",
 326                 .max_speed_hz   = 3125000,     /* max spi clock (SCK) speed in HZ */
 327                 .bus_num        = 0,
 328                 .chip_select    = 5,
 329                 .controller_data = &spi_wm8731_chip_info,
 330                 .mode = SPI_MODE_0,
 331         },
 332 #endif
 333 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 334         {
 335                 .modalias = "spidev",
 336                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 337                 .bus_num = 0,
 338                 .chip_select = 1,
 339                 .controller_data = &spidev_chip_info,
 340         },
 341 #endif
 342 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 343         {
 344                 .modalias = "bfin-lq035q1-spi",
 345                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 346                 .bus_num = 0,
 347                 .chip_select = 1,
 348                 .controller_data = &lq035q1_spi_chip_info,
 349                 .mode = SPI_CPHA | SPI_CPOL,
 350         },
 351 #endif
 352 };
 353
 354 /* SPI controller data */
 355 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 356 /* SPI (0) */
 357 static struct bfin5xx_spi_master bfin_spi0_info = {
 358         .num_chipselect = 5,
 359         .enable_dma = 1,  /* master has the ability to do dma transfer */
 360         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 361 };
 362
 363 static struct resource bfin_spi0_resource[] = {
 364         [0] = {
 365                 .start = SPI0_REGBASE,
 366                 .end   = SPI0_REGBASE + 0xFF,
 367                 .flags = IORESOURCE_MEM,
 368                 },
 369         [1] = {
 370                 .start = CH_SPI0,
 371                 .end   = CH_SPI0,
 372                 .flags = IORESOURCE_IRQ,
 373         },
 374 };
 375
 376 static struct platform_device bfin_spi0_device = {
 377         .name = "bfin-spi",
 378         .id = 0, /* Bus number */
 379         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 380         .resource = bfin_spi0_resource,
 381         .dev = {
 382                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 383         },
 384 };
 385
 386 /* SPI (1) */
 387 static struct bfin5xx_spi_master bfin_spi1_info = {
 388         .num_chipselect = 5,
 389         .enable_dma = 1,  /* master has the ability to do dma transfer */
 390         .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
 391 };
 392
 393 static struct resource bfin_spi1_resource[] = {
 394         [0] = {
 395                 .start = SPI1_REGBASE,
 396                 .end   = SPI1_REGBASE + 0xFF,
 397                 .flags = IORESOURCE_MEM,
 398                 },
 399         [1] = {
 400                 .start = CH_SPI1,
 401                 .end   = CH_SPI1,
 402                 .flags = IORESOURCE_IRQ,
 403         },
 404 };
 405
 406 static struct platform_device bfin_spi1_device = {
 407         .name = "bfin-spi",
 408         .id = 1, /* Bus number */
 409         .num_resources = ARRAY_SIZE(bfin_spi1_resource),
 410         .resource = bfin_spi1_resource,
 411         .dev = {
 412                 .platform_data = &bfin_spi1_info, /* Passed to driver */
 413         },
 414 };
 415 #endif  /* spi master and devices */
 416
 417 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 418 static struct resource bfin_uart_resources[] = {
 419 #ifdef CONFIG_SERIAL_BFIN_UART0
 420         {
 421                 .start = 0xFFC00400,
 422                 .end = 0xFFC004FF,
 423                 .flags = IORESOURCE_MEM,
 424         },
 425 #endif
 426 #ifdef CONFIG_SERIAL_BFIN_UART1
 427         {
 428                 .start = 0xFFC02000,
 429                 .end = 0xFFC020FF,
 430                 .flags = IORESOURCE_MEM,
 431         },
 432 #endif
 433 };
 434
 435 static struct platform_device bfin_uart_device = {
 436         .name = "bfin-uart",
 437         .id = 1,
 438         .num_resources = ARRAY_SIZE(bfin_uart_resources),
 439         .resource = bfin_uart_resources,
 440 };
 441 #endif
 442
 443 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 444 #ifdef CONFIG_BFIN_SIR0
 445 static struct resource bfin_sir0_resources[] = {
 446         {
 447                 .start = 0xFFC00400,
 448                 .end = 0xFFC004FF,
 449                 .flags = IORESOURCE_MEM,
 450         },
 451         {
 452                 .start = IRQ_UART0_RX,
 453                 .end = IRQ_UART0_RX+1,
 454                 .flags = IORESOURCE_IRQ,
 455         },
 456         {
 457                 .start = CH_UART0_RX,
 458                 .end = CH_UART0_RX+1,
 459                 .flags = IORESOURCE_DMA,
 460         },
 461 };
 462
 463 static struct platform_device bfin_sir0_device = {
 464         .name = "bfin_sir",
 465         .id = 0,
 466         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 467         .resource = bfin_sir0_resources,
 468 };
 469 #endif
 470 #ifdef CONFIG_BFIN_SIR1
 471 static struct resource bfin_sir1_resources[] = {
 472         {
 473                 .start = 0xFFC02000,
 474                 .end = 0xFFC020FF,
 475                 .flags = IORESOURCE_MEM,
 476         },
 477         {
 478                 .start = IRQ_UART1_RX,
 479                 .end = IRQ_UART1_RX+1,
 480                 .flags = IORESOURCE_IRQ,
 481         },
 482         {
 483                 .start = CH_UART1_RX,
 484                 .end = CH_UART1_RX+1,
 485                 .flags = IORESOURCE_DMA,
 486         },
 487 };
 488
 489 static struct platform_device bfin_sir1_device = {
 490         .name = "bfin_sir",
 491         .id = 1,
 492         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 493         .resource = bfin_sir1_resources,
 494 };
 495 #endif
 496 #endif
 497
 498 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 499 static struct resource bfin_twi0_resource[] = {
 500         [0] = {
 501                 .start = TWI0_REGBASE,
 502                 .end   = TWI0_REGBASE,
 503                 .flags = IORESOURCE_MEM,
 504         },
 505         [1] = {
 506                 .start = IRQ_TWI,
 507                 .end   = IRQ_TWI,
 508                 .flags = IORESOURCE_IRQ,
 509         },
 510 };
 511
 512 static struct platform_device i2c_bfin_twi_device = {
 513         .name = "i2c-bfin-twi",
 514         .id = 0,
 515         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 516         .resource = bfin_twi0_resource,
 517 };
 518 #endif
 519
 520 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 521 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
 522         {
 523                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
 524         },
 525 #endif
 526 #if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE)
 527         {
 528                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
 529                 .irq = IRQ_PF8,
 530         },
 531 #endif
 532 };
 533
 534 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 535 static struct platform_device bfin_sport0_uart_device = {
 536         .name = "bfin-sport-uart",
 537         .id = 0,
 538 };
 539
 540 static struct platform_device bfin_sport1_uart_device = {
 541         .name = "bfin-sport-uart",
 542         .id = 1,
 543 };
 544 #endif
 545
 546 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 547 #include <linux/input.h>
 548 #include <linux/gpio_keys.h>
 549
 550 static struct gpio_keys_button bfin_gpio_keys_table[] = {
 551         {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
 552         {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
 553 };
 554
 555 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
 556         .buttons        = bfin_gpio_keys_table,
 557         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
 558 };
 559
 560 static struct platform_device bfin_device_gpiokeys = {
 561         .name      = "gpio-keys",
 562         .dev = {
 563                 .platform_data = &bfin_gpio_keys_data,
 564         },
 565 };
 566 #endif
 567
 568 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
 569
 570 static struct bfin_sd_host bfin_sdh_data = {
 571         .dma_chan = CH_RSI,
 572         .irq_int0 = IRQ_RSI_INT0,
 573         .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
 574 };
 575
 576 static struct platform_device bf51x_sdh_device = {
 577         .name = "bfin-sdh",
 578         .id = 0,
 579         .dev = {
 580                 .platform_data = &bfin_sdh_data,
 581         },
 582 };
 583 #endif
 584
 585 static struct resource bfin_gpios_resources = {
 586         .start = 0,
 587         .end   = MAX_BLACKFIN_GPIOS - 1,
 588         .flags = IORESOURCE_IRQ,
 589 };
 590
 591 static struct platform_device bfin_gpios_device = {
 592         .name = "simple-gpio",
 593         .id = -1,
 594         .num_resources = 1,
 595         .resource = &bfin_gpios_resources,
 596 };
 597
 598 static const unsigned int cclk_vlev_datasheet[] =
 599 {
 600         VRPAIR(VLEV_100, 400000000),
 601         VRPAIR(VLEV_105, 426000000),
 602         VRPAIR(VLEV_110, 500000000),
 603         VRPAIR(VLEV_115, 533000000),
 604         VRPAIR(VLEV_120, 600000000),
 605 };
 606
 607 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 608         .tuple_tab = cclk_vlev_datasheet,
 609         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 610         .vr_settling_time = 25 /* us */,
 611 };
 612
 613 static struct platform_device bfin_dpmc = {
 614         .name = "bfin dpmc",
 615         .dev = {
 616                 .platform_data = &bfin_dmpc_vreg_data,
 617         },
 618 };
 619
 620 static struct platform_device *stamp_devices[] __initdata = {
 621
 622         &bfin_dpmc,
 623
 624 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 625         &rtc_device,
 626 #endif
 627
 628 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 629         &bfin_mii_bus,
 630         &bfin_mac_device,
 631 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 632         &ksz8893m_switch_device,
 633 #endif
 634 #endif
 635
 636 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 637         &bfin_spi0_device,
 638         &bfin_spi1_device,
 639 #endif
 640
 641 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 642         &bfin_uart_device,
 643 #endif
 644
 645 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 646 #ifdef CONFIG_BFIN_SIR0
 647         &bfin_sir0_device,
 648 #endif
 649 #ifdef CONFIG_BFIN_SIR1
 650         &bfin_sir1_device,
 651 #endif
 652 #endif
 653
 654 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 655         &i2c_bfin_twi_device,
 656 #endif
 657
 658 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 659         &bfin_sport0_uart_device,
 660         &bfin_sport1_uart_device,
 661 #endif
 662
 663 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 664         &bfin_device_gpiokeys,
 665 #endif
 666
 667 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
 668         &bf51x_sdh_device,
 669 #endif
 670
 671 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 672         &ezbrd_flash_device,
 673 #endif
 674
 675         &bfin_gpios_device,
 676 };
 677
 678 static int __init ezbrd_init(void)
 679 {
 680         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 681         i2c_register_board_info(0, bfin_i2c_board_info,
 682                                 ARRAY_SIZE(bfin_i2c_board_info));
 683         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
 684         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 685         /* setup BF518-EZBRD GPIO pin PG11 to AMS2, PG15 to AMS3. */
 686         peripheral_request(P_AMS2, "ParaFlash");
 687 #if !defined(CONFIG_SPI_BFIN) && !defined(CONFIG_SPI_BFIN_MODULE)
 688         peripheral_request(P_AMS3, "ParaFlash");
 689 #endif
 690         return 0;
 691 }
 692
 693 arch_initcall(ezbrd_init);
 694
 695 void native_machine_restart(char *cmd)
 696 {
 697         /* workaround reboot hang when booting from SPI */
 698         if ((bfin_read_SYSCR() & 0x7) == 0x3)
 699                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 700 }
 701
 702 void bfin_get_ether_addr(char *addr)
 703 {
 704         /* the MAC is stored in OTP memory page 0xDF */
 705         u32 ret;
 706         u64 otp_mac;
 707         u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
 708
 709         ret = otp_read(0xDF, 0x00, &otp_mac);
 710         if (!(ret & 0x1)) {
 711                 char *otp_mac_p = (char *)&otp_mac;
 712                 for (ret = 0; ret < 6; ++ret)
 713                         addr[ret] = otp_mac_p[5 - ret];
 714         }
 715 }
 716 EXPORT_SYMBOL(bfin_get_ether_addr);