arch/blackfin/mach-bf518/boards/ezbrd.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *                2005 National ICT Australia (NICTA)
   4  *                      Aidan Williams <aidan@nicta.com.au>
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/platform_device.h>
  11 #include <linux/mtd/mtd.h>
  12 #include <linux/mtd/partitions.h>
  13 #include <linux/mtd/physmap.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/spi/flash.h>
  16
  17 #include <linux/i2c.h>
  18 #include <linux/irq.h>
  19 #include <linux/interrupt.h>
  20 #include <asm/dma.h>
  21 #include <asm/bfin5xx_spi.h>
  22 #include <asm/reboot.h>
  23 #include <asm/portmux.h>
  24 #include <asm/dpmc.h>
  25 #include <asm/bfin_sdh.h>
  26 #include <linux/spi/ad7877.h>
  27 #include <net/dsa.h>
  28
  29 /*
  30  * Name the Board for the /proc/cpuinfo
  31  */
  32 const char bfin_board_name[] = "ADI BF518F-EZBRD";
  33
  34 /*
  35  *  Driver needs to know address, irq and flag pin.
  36  */
  37
  38 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  39 static struct mtd_partition ezbrd_partitions[] = {
  40         {
  41                 .name       = "bootloader(nor)",
  42                 .size       = 0x40000,
  43                 .offset     = 0,
  44         }, {
  45                 .name       = "linux kernel(nor)",
  46                 .size       = 0x1C0000,
  47                 .offset     = MTDPART_OFS_APPEND,
  48         }, {
  49                 .name       = "file system(nor)",
  50                 .size       = MTDPART_SIZ_FULL,
  51                 .offset     = MTDPART_OFS_APPEND,
  52         }
  53 };
  54
  55 static struct physmap_flash_data ezbrd_flash_data = {
  56         .width      = 2,
  57         .parts      = ezbrd_partitions,
  58         .nr_parts   = ARRAY_SIZE(ezbrd_partitions),
  59 };
  60
  61 static struct resource ezbrd_flash_resource = {
  62         .start = 0x20000000,
  63 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  64         .end   = 0x202fffff,
  65 #else
  66         .end   = 0x203fffff,
  67 #endif
  68         .flags = IORESOURCE_MEM,
  69 };
  70
  71 static struct platform_device ezbrd_flash_device = {
  72         .name          = "physmap-flash",
  73         .id            = 0,
  74         .dev = {
  75                 .platform_data = &ezbrd_flash_data,
  76         },
  77         .num_resources = 1,
  78         .resource      = &ezbrd_flash_resource,
  79 };
  80 #endif
  81
  82 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  83 static struct platform_device rtc_device = {
  84         .name = "rtc-bfin",
  85         .id   = -1,
  86 };
  87 #endif
  88
  89 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  90 #include <linux/bfin_mac.h>
  91 static const unsigned short bfin_mac_peripherals[] = {
  92         P_MII0_ETxD0,
  93         P_MII0_ETxD1,
  94         P_MII0_ETxEN,
  95         P_MII0_ERxD0,
  96         P_MII0_ERxD1,
  97         P_MII0_TxCLK,
  98         P_MII0_PHYINT,
  99         P_MII0_CRS,
 100         P_MII0_MDC,
 101         P_MII0_MDIO,
 102         0
 103 };
 104
 105 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
 106         {
 107                 .addr = 1,
 108                 .irq = IRQ_MAC_PHYINT,
 109         },
 110         {
 111                 .addr = 2,
 112                 .irq = IRQ_MAC_PHYINT,
 113         },
 114         {
 115                 .addr = 3,
 116                 .irq = IRQ_MAC_PHYINT,
 117         },
 118 };
 119
 120 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
 121         .phydev_number = 3,
 122         .phydev_data = bfin_phydev_data,
 123         .phy_mode = PHY_INTERFACE_MODE_MII,
 124         .mac_peripherals = bfin_mac_peripherals,
 125 };
 126
 127 static struct platform_device bfin_mii_bus = {
 128         .name = "bfin_mii_bus",
 129         .dev = {
 130                 .platform_data = &bfin_mii_bus_data,
 131         }
 132 };
 133
 134 static struct platform_device bfin_mac_device = {
 135         .name = "bfin_mac",
 136         .dev = {
 137                 .platform_data = &bfin_mii_bus,
 138         }
 139 };
 140
 141 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 142 static struct dsa_chip_data ksz8893m_switch_chip_data = {
 143         .mii_bus = &bfin_mii_bus.dev,
 144         .port_names = {
 145                 NULL,
 146                 "eth%d",
 147                 "eth%d",
 148                 "cpu",
 149         },
 150 };
 151 static struct dsa_platform_data ksz8893m_switch_data = {
 152         .nr_chips = 1,
 153         .netdev = &bfin_mac_device.dev,
 154         .chip = &ksz8893m_switch_chip_data,
 155 };
 156
 157 static struct platform_device ksz8893m_switch_device = {
 158         .name           = "dsa",
 159         .id             = 0,
 160         .num_resources  = 0,
 161         .dev.platform_data = &ksz8893m_switch_data,
 162 };
 163 #endif
 164 #endif
 165
 166 #if defined(CONFIG_MTD_M25P80) \
 167         || defined(CONFIG_MTD_M25P80_MODULE)
 168 static struct mtd_partition bfin_spi_flash_partitions[] = {
 169         {
 170                 .name = "bootloader(spi)",
 171                 .size = 0x00040000,
 172                 .offset = 0,
 173                 .mask_flags = MTD_CAP_ROM
 174         }, {
 175                 .name = "linux kernel(spi)",
 176                 .size = MTDPART_SIZ_FULL,
 177                 .offset = MTDPART_OFS_APPEND,
 178         }
 179 };
 180
 181 static struct flash_platform_data bfin_spi_flash_data = {
 182         .name = "m25p80",
 183         .parts = bfin_spi_flash_partitions,
 184         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 185         .type = "m25p16",
 186 };
 187
 188 /* SPI flash chip (m25p64) */
 189 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 190         .enable_dma = 0,         /* use dma transfer with this chip*/
 191         .bits_per_word = 8,
 192 };
 193 #endif
 194
 195 #if defined(CONFIG_BFIN_SPI_ADC) \
 196         || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 197 /* SPI ADC chip */
 198 static struct bfin5xx_spi_chip spi_adc_chip_info = {
 199         .enable_dma = 1,         /* use dma transfer with this chip*/
 200         .bits_per_word = 16,
 201 };
 202 #endif
 203
 204 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 205 #if defined(CONFIG_NET_DSA_KSZ8893M) \
 206         || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 207 /* SPI SWITCH CHIP */
 208 static struct bfin5xx_spi_chip spi_switch_info = {
 209         .enable_dma = 0,
 210         .bits_per_word = 8,
 211 };
 212 #endif
 213 #endif
 214
 215 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 216 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
 217         .enable_dma = 0,
 218         .bits_per_word = 8,
 219 };
 220 #endif
 221
 222 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 223 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
 224         .enable_dma = 0,
 225         .bits_per_word = 16,
 226 };
 227
 228 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
 229         .model                  = 7877,
 230         .vref_delay_usecs       = 50,   /* internal, no capacitor */
 231         .x_plate_ohms           = 419,
 232         .y_plate_ohms           = 486,
 233         .pressure_max           = 1000,
 234         .pressure_min           = 0,
 235         .stopacq_polarity       = 1,
 236         .first_conversion_delay = 3,
 237         .acquisition_time       = 1,
 238         .averaging              = 1,
 239         .pen_down_acc_interval  = 1,
 240 };
 241 #endif
 242
 243 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
 244          && defined(CONFIG_SND_SOC_WM8731_SPI)
 245 static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
 246         .enable_dma = 0,
 247         .bits_per_word = 16,
 248 };
 249 #endif
 250
 251 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 252 static struct bfin5xx_spi_chip spidev_chip_info = {
 253         .enable_dma = 0,
 254         .bits_per_word = 8,
 255 };
 256 #endif
 257
 258 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 259 #if defined(CONFIG_MTD_M25P80) \
 260         || defined(CONFIG_MTD_M25P80_MODULE)
 261         {
 262                 /* the modalias must be the same as spi device driver name */
 263                 .modalias = "m25p80", /* Name of spi_driver for this device */
 264                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 265                 .bus_num = 0, /* Framework bus number */
 266                 .chip_select = 2, /* On BF518F-EZBRD it's SPI0_SSEL2 */
 267                 .platform_data = &bfin_spi_flash_data,
 268                 .controller_data = &spi_flash_chip_info,
 269                 .mode = SPI_MODE_3,
 270         },
 271 #endif
 272
 273 #if defined(CONFIG_BFIN_SPI_ADC) \
 274         || defined(CONFIG_BFIN_SPI_ADC_MODULE)
 275         {
 276                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
 277                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
 278                 .bus_num = 0, /* Framework bus number */
 279                 .chip_select = 1, /* Framework chip select. */
 280                 .platform_data = NULL, /* No spi_driver specific config */
 281                 .controller_data = &spi_adc_chip_info,
 282         },
 283 #endif
 284
 285 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 286 #if defined(CONFIG_NET_DSA_KSZ8893M) \
 287         || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 288         {
 289                 .modalias = "ksz8893m",
 290                 .max_speed_hz = 5000000,
 291                 .bus_num = 0,
 292                 .chip_select = 1,
 293                 .platform_data = NULL,
 294                 .controller_data = &spi_switch_info,
 295                 .mode = SPI_MODE_3,
 296         },
 297 #endif
 298 #endif
 299
 300 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 301         {
 302                 .modalias = "mmc_spi",
 303                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 304                 .bus_num = 0,
 305                 .chip_select = 5,
 306                 .controller_data = &mmc_spi_chip_info,
 307                 .mode = SPI_MODE_3,
 308         },
 309 #endif
 310 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 311         {
 312                 .modalias               = "ad7877",
 313                 .platform_data          = &bfin_ad7877_ts_info,
 314                 .irq                    = IRQ_PF8,
 315                 .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
 316                 .bus_num        = 0,
 317                 .chip_select  = 2,
 318                 .controller_data = &spi_ad7877_chip_info,
 319         },
 320 #endif
 321 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
 322          && defined(CONFIG_SND_SOC_WM8731_SPI)
 323         {
 324                 .modalias       = "wm8731",
 325                 .max_speed_hz   = 3125000,     /* max spi clock (SCK) speed in HZ */
 326                 .bus_num        = 0,
 327                 .chip_select    = 5,
 328                 .controller_data = &spi_wm8731_chip_info,
 329                 .mode = SPI_MODE_0,
 330         },
 331 #endif
 332 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 333         {
 334                 .modalias = "spidev",
 335                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 336                 .bus_num = 0,
 337                 .chip_select = 1,
 338                 .controller_data = &spidev_chip_info,
 339         },
 340 #endif
 341 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 342         {
 343                 .modalias = "bfin-lq035q1-spi",
 344                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 345                 .bus_num = 0,
 346                 .chip_select = 1,
 347                 .controller_data = &lq035q1_spi_chip_info,
 348                 .mode = SPI_CPHA | SPI_CPOL,
 349         },
 350 #endif
 351 };
 352
 353 /* SPI controller data */
 354 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 355 /* SPI (0) */
 356 static struct bfin5xx_spi_master bfin_spi0_info = {
 357         .num_chipselect = 6,
 358         .enable_dma = 1,  /* master has the ability to do dma transfer */
 359         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 360 };
 361
 362 static struct resource bfin_spi0_resource[] = {
 363         [0] = {
 364                 .start = SPI0_REGBASE,
 365                 .end   = SPI0_REGBASE + 0xFF,
 366                 .flags = IORESOURCE_MEM,
 367                 },
 368         [1] = {
 369                 .start = CH_SPI0,
 370                 .end   = CH_SPI0,
 371                 .flags = IORESOURCE_DMA,
 372         },
 373         [2] = {
 374                 .start = IRQ_SPI0,
 375                 .end   = IRQ_SPI0,
 376                 .flags = IORESOURCE_IRQ,
 377         },
 378 };
 379
 380 static struct platform_device bfin_spi0_device = {
 381         .name = "bfin-spi",
 382         .id = 0, /* Bus number */
 383         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 384         .resource = bfin_spi0_resource,
 385         .dev = {
 386                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 387         },
 388 };
 389
 390 /* SPI (1) */
 391 static struct bfin5xx_spi_master bfin_spi1_info = {
 392         .num_chipselect = 6,
 393         .enable_dma = 1,  /* master has the ability to do dma transfer */
 394         .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
 395 };
 396
 397 static struct resource bfin_spi1_resource[] = {
 398         [0] = {
 399                 .start = SPI1_REGBASE,
 400                 .end   = SPI1_REGBASE + 0xFF,
 401                 .flags = IORESOURCE_MEM,
 402                 },
 403         [1] = {
 404                 .start = CH_SPI1,
 405                 .end   = CH_SPI1,
 406                 .flags = IORESOURCE_DMA,
 407         },
 408         [2] = {
 409                 .start = IRQ_SPI1,
 410                 .end   = IRQ_SPI1,
 411                 .flags = IORESOURCE_IRQ,
 412         },
 413 };
 414
 415 static struct platform_device bfin_spi1_device = {
 416         .name = "bfin-spi",
 417         .id = 1, /* Bus number */
 418         .num_resources = ARRAY_SIZE(bfin_spi1_resource),
 419         .resource = bfin_spi1_resource,
 420         .dev = {
 421                 .platform_data = &bfin_spi1_info, /* Passed to driver */
 422         },
 423 };
 424 #endif  /* spi master and devices */
 425
 426 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 427 #ifdef CONFIG_SERIAL_BFIN_UART0
 428 static struct resource bfin_uart0_resources[] = {
 429         {
 430                 .start = UART0_THR,
 431                 .end = UART0_GCTL+2,
 432                 .flags = IORESOURCE_MEM,
 433         },
 434         {
 435                 .start = IRQ_UART0_RX,
 436                 .end = IRQ_UART0_RX+1,
 437                 .flags = IORESOURCE_IRQ,
 438         },
 439         {
 440                 .start = IRQ_UART0_ERROR,
 441                 .end = IRQ_UART0_ERROR,
 442                 .flags = IORESOURCE_IRQ,
 443         },
 444         {
 445                 .start = CH_UART0_TX,
 446                 .end = CH_UART0_TX,
 447                 .flags = IORESOURCE_DMA,
 448         },
 449         {
 450                 .start = CH_UART0_RX,
 451                 .end = CH_UART0_RX,
 452                 .flags = IORESOURCE_DMA,
 453         },
 454 };
 455
 456 unsigned short bfin_uart0_peripherals[] = {
 457         P_UART0_TX, P_UART0_RX, 0
 458 };
 459
 460 static struct platform_device bfin_uart0_device = {
 461         .name = "bfin-uart",
 462         .id = 0,
 463         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 464         .resource = bfin_uart0_resources,
 465         .dev = {
 466                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 467         },
 468 };
 469 #endif
 470 #ifdef CONFIG_SERIAL_BFIN_UART1
 471 static struct resource bfin_uart1_resources[] = {
 472         {
 473                 .start = UART1_THR,
 474                 .end = UART1_GCTL+2,
 475                 .flags = IORESOURCE_MEM,
 476         },
 477         {
 478                 .start = IRQ_UART1_RX,
 479                 .end = IRQ_UART1_RX+1,
 480                 .flags = IORESOURCE_IRQ,
 481         },
 482         {
 483                 .start = IRQ_UART1_ERROR,
 484                 .end = IRQ_UART1_ERROR,
 485                 .flags = IORESOURCE_IRQ,
 486         },
 487         {
 488                 .start = CH_UART1_TX,
 489                 .end = CH_UART1_TX,
 490                 .flags = IORESOURCE_DMA,
 491         },
 492         {
 493                 .start = CH_UART1_RX,
 494                 .end = CH_UART1_RX,
 495                 .flags = IORESOURCE_DMA,
 496         },
 497 };
 498
 499 unsigned short bfin_uart1_peripherals[] = {
 500         P_UART1_TX, P_UART1_RX, 0
 501 };
 502
 503 static struct platform_device bfin_uart1_device = {
 504         .name = "bfin-uart",
 505         .id = 1,
 506         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 507         .resource = bfin_uart1_resources,
 508         .dev = {
 509                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 510         },
 511 };
 512 #endif
 513 #endif
 514
 515 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 516 #ifdef CONFIG_BFIN_SIR0
 517 static struct resource bfin_sir0_resources[] = {
 518         {
 519                 .start = 0xFFC00400,
 520                 .end = 0xFFC004FF,
 521                 .flags = IORESOURCE_MEM,
 522         },
 523         {
 524                 .start = IRQ_UART0_RX,
 525                 .end = IRQ_UART0_RX+1,
 526                 .flags = IORESOURCE_IRQ,
 527         },
 528         {
 529                 .start = CH_UART0_RX,
 530                 .end = CH_UART0_RX+1,
 531                 .flags = IORESOURCE_DMA,
 532         },
 533 };
 534
 535 static struct platform_device bfin_sir0_device = {
 536         .name = "bfin_sir",
 537         .id = 0,
 538         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 539         .resource = bfin_sir0_resources,
 540 };
 541 #endif
 542 #ifdef CONFIG_BFIN_SIR1
 543 static struct resource bfin_sir1_resources[] = {
 544         {
 545                 .start = 0xFFC02000,
 546                 .end = 0xFFC020FF,
 547                 .flags = IORESOURCE_MEM,
 548         },
 549         {
 550                 .start = IRQ_UART1_RX,
 551                 .end = IRQ_UART1_RX+1,
 552                 .flags = IORESOURCE_IRQ,
 553         },
 554         {
 555                 .start = CH_UART1_RX,
 556                 .end = CH_UART1_RX+1,
 557                 .flags = IORESOURCE_DMA,
 558         },
 559 };
 560
 561 static struct platform_device bfin_sir1_device = {
 562         .name = "bfin_sir",
 563         .id = 1,
 564         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 565         .resource = bfin_sir1_resources,
 566 };
 567 #endif
 568 #endif
 569
 570 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
 571 static struct platform_device bfin_i2s = {
 572         .name = "bfin-i2s",
 573         .id = CONFIG_SND_BF5XX_SPORT_NUM,
 574         /* TODO: add platform data here */
 575 };
 576 #endif
 577
 578 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 579 static struct resource bfin_twi0_resource[] = {
 580         [0] = {
 581                 .start = TWI0_REGBASE,
 582                 .end   = TWI0_REGBASE,
 583                 .flags = IORESOURCE_MEM,
 584         },
 585         [1] = {
 586                 .start = IRQ_TWI,
 587                 .end   = IRQ_TWI,
 588                 .flags = IORESOURCE_IRQ,
 589         },
 590 };
 591
 592 static struct platform_device i2c_bfin_twi_device = {
 593         .name = "i2c-bfin-twi",
 594         .id = 0,
 595         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 596         .resource = bfin_twi0_resource,
 597 };
 598 #endif
 599
 600 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 601 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
 602         {
 603                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
 604         },
 605 #endif
 606 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
 607         {
 608                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
 609                 .irq = IRQ_PF8,
 610         },
 611 #endif
 612 #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
 613         {
 614                 I2C_BOARD_INFO("ssm2602", 0x1b),
 615         },
 616 #endif
 617 };
 618
 619 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 620 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 621 static struct resource bfin_sport0_uart_resources[] = {
 622         {
 623                 .start = SPORT0_TCR1,
 624                 .end = SPORT0_MRCS3+4,
 625                 .flags = IORESOURCE_MEM,
 626         },
 627         {
 628                 .start = IRQ_SPORT0_RX,
 629                 .end = IRQ_SPORT0_RX+1,
 630                 .flags = IORESOURCE_IRQ,
 631         },
 632         {
 633                 .start = IRQ_SPORT0_ERROR,
 634                 .end = IRQ_SPORT0_ERROR,
 635                 .flags = IORESOURCE_IRQ,
 636         },
 637 };
 638
 639 unsigned short bfin_sport0_peripherals[] = {
 640         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 641         P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
 642 };
 643
 644 static struct platform_device bfin_sport0_uart_device = {
 645         .name = "bfin-sport-uart",
 646         .id = 0,
 647         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 648         .resource = bfin_sport0_uart_resources,
 649         .dev = {
 650                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
 651         },
 652 };
 653 #endif
 654 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 655 static struct resource bfin_sport1_uart_resources[] = {
 656         {
 657                 .start = SPORT1_TCR1,
 658                 .end = SPORT1_MRCS3+4,
 659                 .flags = IORESOURCE_MEM,
 660         },
 661         {
 662                 .start = IRQ_SPORT1_RX,
 663                 .end = IRQ_SPORT1_RX+1,
 664                 .flags = IORESOURCE_IRQ,
 665         },
 666         {
 667                 .start = IRQ_SPORT1_ERROR,
 668                 .end = IRQ_SPORT1_ERROR,
 669                 .flags = IORESOURCE_IRQ,
 670         },
 671 };
 672
 673 unsigned short bfin_sport1_peripherals[] = {
 674         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 675         P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
 676 };
 677
 678 static struct platform_device bfin_sport1_uart_device = {
 679         .name = "bfin-sport-uart",
 680         .id = 1,
 681         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 682         .resource = bfin_sport1_uart_resources,
 683         .dev = {
 684                 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
 685         },
 686 };
 687 #endif
 688 #endif
 689
 690 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 691 #include <linux/input.h>
 692 #include <linux/gpio_keys.h>
 693
 694 static struct gpio_keys_button bfin_gpio_keys_table[] = {
 695         {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
 696         {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
 697 };
 698
 699 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
 700         .buttons        = bfin_gpio_keys_table,
 701         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
 702 };
 703
 704 static struct platform_device bfin_device_gpiokeys = {
 705         .name      = "gpio-keys",
 706         .dev = {
 707                 .platform_data = &bfin_gpio_keys_data,
 708         },
 709 };
 710 #endif
 711
 712 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
 713
 714 static struct bfin_sd_host bfin_sdh_data = {
 715         .dma_chan = CH_RSI,
 716         .irq_int0 = IRQ_RSI_INT0,
 717         .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
 718 };
 719
 720 static struct platform_device bf51x_sdh_device = {
 721         .name = "bfin-sdh",
 722         .id = 0,
 723         .dev = {
 724                 .platform_data = &bfin_sdh_data,
 725         },
 726 };
 727 #endif
 728
 729 static const unsigned int cclk_vlev_datasheet[] =
 730 {
 731         VRPAIR(VLEV_100, 400000000),
 732         VRPAIR(VLEV_105, 426000000),
 733         VRPAIR(VLEV_110, 500000000),
 734         VRPAIR(VLEV_115, 533000000),
 735         VRPAIR(VLEV_120, 600000000),
 736 };
 737
 738 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 739         .tuple_tab = cclk_vlev_datasheet,
 740         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 741         .vr_settling_time = 25 /* us */,
 742 };
 743
 744 static struct platform_device bfin_dpmc = {
 745         .name = "bfin dpmc",
 746         .dev = {
 747                 .platform_data = &bfin_dmpc_vreg_data,
 748         },
 749 };
 750
 751 static struct platform_device *stamp_devices[] __initdata = {
 752
 753         &bfin_dpmc,
 754
 755 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 756         &rtc_device,
 757 #endif
 758
 759 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 760         &bfin_mii_bus,
 761         &bfin_mac_device,
 762 #if defined(CONFIG_NET_DSA_KSZ8893M) || defined(CONFIG_NET_DSA_KSZ8893M_MODULE)
 763         &ksz8893m_switch_device,
 764 #endif
 765 #endif
 766
 767 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 768         &bfin_spi0_device,
 769         &bfin_spi1_device,
 770 #endif
 771
 772 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 773 #ifdef CONFIG_SERIAL_BFIN_UART0
 774         &bfin_uart0_device,
 775 #endif
 776 #ifdef CONFIG_SERIAL_BFIN_UART1
 777         &bfin_uart1_device,
 778 #endif
 779 #endif
 780
 781 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 782 #ifdef CONFIG_BFIN_SIR0
 783         &bfin_sir0_device,
 784 #endif
 785 #ifdef CONFIG_BFIN_SIR1
 786         &bfin_sir1_device,
 787 #endif
 788 #endif
 789
 790 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 791         &i2c_bfin_twi_device,
 792 #endif
 793
 794 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
 795         &bfin_i2s,
 796 #endif
 797
 798 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 799 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 800         &bfin_sport0_uart_device,
 801 #endif
 802 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 803         &bfin_sport1_uart_device,
 804 #endif
 805 #endif
 806
 807 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 808         &bfin_device_gpiokeys,
 809 #endif
 810
 811 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
 812         &bf51x_sdh_device,
 813 #endif
 814
 815 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 816         &ezbrd_flash_device,
 817 #endif
 818 };
 819
 820 static int __init ezbrd_init(void)
 821 {
 822         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 823         i2c_register_board_info(0, bfin_i2c_board_info,
 824                                 ARRAY_SIZE(bfin_i2c_board_info));
 825         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
 826         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 827         /* setup BF518-EZBRD GPIO pin PG11 to AMS2, PG15 to AMS3. */
 828         peripheral_request(P_AMS2, "ParaFlash");
 829 #if !defined(CONFIG_SPI_BFIN) && !defined(CONFIG_SPI_BFIN_MODULE)
 830         peripheral_request(P_AMS3, "ParaFlash");
 831 #endif
 832         return 0;
 833 }
 834
 835 arch_initcall(ezbrd_init);
 836
 837 static struct platform_device *ezbrd_early_devices[] __initdata = {
 838 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
 839 #ifdef CONFIG_SERIAL_BFIN_UART0
 840         &bfin_uart0_device,
 841 #endif
 842 #ifdef CONFIG_SERIAL_BFIN_UART1
 843         &bfin_uart1_device,
 844 #endif
 845 #endif
 846
 847 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
 848 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 849         &bfin_sport0_uart_device,
 850 #endif
 851 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 852         &bfin_sport1_uart_device,
 853 #endif
 854 #endif
 855 };
 856
 857 void __init native_machine_early_platform_add_devices(void)
 858 {
 859         printk(KERN_INFO "register early platform devices\n");
 860         early_platform_add_devices(ezbrd_early_devices,
 861                 ARRAY_SIZE(ezbrd_early_devices));
 862 }
 863
 864 void native_machine_restart(char *cmd)
 865 {
 866         /* workaround reboot hang when booting from SPI */
 867         if ((bfin_read_SYSCR() & 0x7) == 0x3)
 868                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 869 }
 870
 871 void bfin_get_ether_addr(char *addr)
 872 {
 873         /* the MAC is stored in OTP memory page 0xDF */
 874         u32 ret;
 875         u64 otp_mac;
 876         u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
 877
 878         ret = otp_read(0xDF, 0x00, &otp_mac);
 879         if (!(ret & 0x1)) {
 880                 char *otp_mac_p = (char *)&otp_mac;
 881                 for (ret = 0; ret < 6; ++ret)
 882                         addr[ret] = otp_mac_p[5 - ret];
 883         }
 884 }
 885 EXPORT_SYMBOL(bfin_get_ether_addr);