arch/blackfin/kernel/setup.c

   1 /*
   2  * File:         arch/blackfin/kernel/setup.c
   3  * Based on:
   4  * Author:
   5  *
   6  * Created:
   7  * Description:
   8  *
   9  * Modified:
  10  *               Copyright 2004-2006 Analog Devices Inc.
  11  *
  12  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
  13  *
  14  * This program is free software; you can redistribute it and/or modify
  15  * it under the terms of the GNU General Public License as published by
  16  * the Free Software Foundation; either version 2 of the License, or
  17  * (at your option) any later version.
  18  *
  19  * This program is distributed in the hope that it will be useful,
  20  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22  * GNU General Public License for more details.
  23  *
  24  * You should have received a copy of the GNU General Public License
  25  * along with this program; if not, see the file COPYING, or write
  26  * to the Free Software Foundation, Inc.,
  27  * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  28  */
  29
  30 #include <linux/delay.h>
  31 #include <linux/console.h>
  32 #include <linux/bootmem.h>
  33 #include <linux/seq_file.h>
  34 #include <linux/cpu.h>
  35 #include <linux/module.h>
  36 #include <linux/tty.h>
  37
  38 #include <linux/ext2_fs.h>
  39 #include <linux/cramfs_fs.h>
  40 #include <linux/romfs_fs.h>
  41
  42 #include <asm/cplb.h>
  43 #include <asm/cacheflush.h>
  44 #include <asm/blackfin.h>
  45 #include <asm/cplbinit.h>
  46 #include <asm/fixed_code.h>
  47 #include <asm/early_printk.h>
  48
  49 u16 _bfin_swrst;
  50
  51 unsigned long memory_start, memory_end, physical_mem_end;
  52 unsigned long reserved_mem_dcache_on;
  53 unsigned long reserved_mem_icache_on;
  54 EXPORT_SYMBOL(memory_start);
  55 EXPORT_SYMBOL(memory_end);
  56 EXPORT_SYMBOL(physical_mem_end);
  57 EXPORT_SYMBOL(_ramend);
  58
  59 #ifdef CONFIG_MTD_UCLINUX
  60 unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
  61 unsigned long _ebss;
  62 EXPORT_SYMBOL(memory_mtd_end);
  63 EXPORT_SYMBOL(memory_mtd_start);
  64 EXPORT_SYMBOL(mtd_size);
  65 #endif
  66
  67 char __initdata command_line[COMMAND_LINE_SIZE];
  68
  69 void __init bf53x_cache_init(void)
  70 {
  71 #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
  72         generate_cpl_tables();
  73 #endif
  74
  75 #ifdef CONFIG_BFIN_ICACHE
  76         bfin_icache_init();
  77         printk(KERN_INFO "Instruction Cache Enabled\n");
  78 #endif
  79
  80 #ifdef CONFIG_BFIN_DCACHE
  81         bfin_dcache_init();
  82         printk(KERN_INFO "Data Cache Enabled"
  83 # if defined CONFIG_BFIN_WB
  84                 " (write-back)"
  85 # elif defined CONFIG_BFIN_WT
  86                 " (write-through)"
  87 # endif
  88                 "\n");
  89 #endif
  90 }
  91
  92 void __init bf53x_relocate_l1_mem(void)
  93 {
  94         unsigned long l1_code_length;
  95         unsigned long l1_data_a_length;
  96         unsigned long l1_data_b_length;
  97
  98         l1_code_length = _etext_l1 - _stext_l1;
  99         if (l1_code_length > L1_CODE_LENGTH)
 100                 l1_code_length = L1_CODE_LENGTH;
 101         /* cannot complain as printk is not available as yet.
 102          * But we can continue booting and complain later!
 103          */
 104
 105         /* Copy _stext_l1 to _etext_l1 to L1 instruction SRAM */
 106         dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length);
 107
 108         l1_data_a_length = _ebss_l1 - _sdata_l1;
 109         if (l1_data_a_length > L1_DATA_A_LENGTH)
 110                 l1_data_a_length = L1_DATA_A_LENGTH;
 111
 112         /* Copy _sdata_l1 to _ebss_l1 to L1 data bank A SRAM */
 113         dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);
 114
 115         l1_data_b_length = _ebss_b_l1 - _sdata_b_l1;
 116         if (l1_data_b_length > L1_DATA_B_LENGTH)
 117                 l1_data_b_length = L1_DATA_B_LENGTH;
 118
 119         /* Copy _sdata_b_l1 to _ebss_b_l1 to L1 data bank B SRAM */
 120         dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
 121                         l1_data_a_length, l1_data_b_length);
 122
 123 }
 124
 125 /*
 126  * Initial parsing of the command line.  Currently, we support:
 127  *  - Controlling the linux memory size: mem=xxx[KMG]
 128  *  - Controlling the physical memory size: max_mem=xxx[KMG][$][#]
 129  *       $ -> reserved memory is dcacheable
 130  *       # -> reserved memory is icacheable
 131  */
 132 static __init void parse_cmdline_early(char *cmdline_p)
 133 {
 134         char c = ' ', *to = cmdline_p;
 135         unsigned int memsize;
 136         for (;;) {
 137                 if (c == ' ') {
 138
 139                         if (!memcmp(to, "mem=", 4)) {
 140                                 to += 4;
 141                                 memsize = memparse(to, &to);
 142                                 if (memsize)
 143                                         _ramend = memsize;
 144
 145                         } else if (!memcmp(to, "max_mem=", 8)) {
 146                                 to += 8;
 147                                 memsize = memparse(to, &to);
 148                                 if (memsize) {
 149                                         physical_mem_end = memsize;
 150                                         if (*to != ' ') {
 151                                                 if (*to == '$'
 152                                                     || *(to + 1) == '$')
 153                                                         reserved_mem_dcache_on =
 154                                                             1;
 155                                                 if (*to == '#'
 156                                                     || *(to + 1) == '#')
 157                                                         reserved_mem_icache_on =
 158                                                             1;
 159                                         }
 160                                 }
 161                         } else if (!memcmp(to, "earlyprintk=", 12)) {
 162                                 to += 12;
 163                                 setup_early_printk(to);
 164                         }
 165                 }
 166                 c = *(to++);
 167                 if (!c)
 168                         break;
 169         }
 170 }
 171
 172 void __init setup_arch(char **cmdline_p)
 173 {
 174         int bootmap_size;
 175         unsigned long l1_length, sclk, cclk;
 176 #ifdef CONFIG_MTD_UCLINUX
 177         unsigned long mtd_phys = 0;
 178 #endif
 179
 180 #ifdef CONFIG_DUMMY_CONSOLE
 181         conswitchp = &dummy_con;
 182 #endif
 183
 184 #if defined(CONFIG_CMDLINE_BOOL)
 185         strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
 186         command_line[sizeof(command_line) - 1] = 0;
 187 #endif
 188
 189         /* Keep a copy of command line */
 190         *cmdline_p = &command_line[0];
 191         memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
 192         boot_command_line[COMMAND_LINE_SIZE - 1] = '\0';
 193
 194         /* setup memory defaults from the user config */
 195         physical_mem_end = 0;
 196         _ramend = CONFIG_MEM_SIZE * 1024 * 1024;
 197
 198         parse_cmdline_early(&command_line[0]);
 199
 200         cclk = get_cclk();
 201         sclk = get_sclk();
 202
 203 #if !defined(CONFIG_BFIN_KERNEL_CLOCK)
 204         if (ANOMALY_05000273 && cclk == sclk)
 205                 panic("ANOMALY 05000273, SCLK can not be same as CCLK");
 206 #endif
 207
 208 #ifdef BF561_FAMILY
 209         if (ANOMALY_05000266) {
 210                 bfin_read_IMDMA_D0_IRQ_STATUS();
 211                 bfin_read_IMDMA_D1_IRQ_STATUS();
 212         }
 213 #endif
 214
 215         printk(KERN_INFO "Hardware Trace ");
 216         if (bfin_read_TBUFCTL() & 0x1 )
 217                 printk("Active ");
 218         else
 219                 printk("Off ");
 220         if (bfin_read_TBUFCTL() & 0x2)
 221                 printk("and Enabled\n");
 222         else
 223         printk("and Disabled\n");
 224
 225
 226 #if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH)
 227         /* we need to initialize the Flashrom device here since we might
 228          * do things with flash early on in the boot
 229          */
 230         flash_probe();
 231 #endif
 232
 233         if (physical_mem_end == 0)
 234                 physical_mem_end = _ramend;
 235
 236         /* by now the stack is part of the init task */
 237         memory_end = _ramend - DMA_UNCACHED_REGION;
 238
 239         _ramstart = (unsigned long)__bss_stop;
 240         memory_start = PAGE_ALIGN(_ramstart);
 241
 242 #if defined(CONFIG_MTD_UCLINUX)
 243         /* generic memory mapped MTD driver */
 244         memory_mtd_end = memory_end;
 245
 246         mtd_phys = _ramstart;
 247         mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 8)));
 248
 249 # if defined(CONFIG_EXT2_FS) || defined(CONFIG_EXT3_FS)
 250         if (*((unsigned short *)(mtd_phys + 0x438)) == EXT2_SUPER_MAGIC)
 251                 mtd_size =
 252                     PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x404)) << 10);
 253 # endif
 254
 255 # if defined(CONFIG_CRAMFS)
 256         if (*((unsigned long *)(mtd_phys)) == CRAMFS_MAGIC)
 257                 mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x4)));
 258 # endif
 259
 260 # if defined(CONFIG_ROMFS_FS)
 261         if (((unsigned long *)mtd_phys)[0] == ROMSB_WORD0
 262             && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1)
 263                 mtd_size =
 264                     PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
 265 #  if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
 266         /* Due to a Hardware Anomaly we need to limit the size of usable
 267          * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
 268          * 05000263 - Hardware loop corrupted when taking an ICPLB exception
 269          */
 270 #   if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
 271         if (memory_end >= 56 * 1024 * 1024)
 272                 memory_end = 56 * 1024 * 1024;
 273 #   else
 274         if (memory_end >= 60 * 1024 * 1024)
 275                 memory_end = 60 * 1024 * 1024;
 276 #   endif                               /* CONFIG_DEBUG_HUNT_FOR_ZERO */
 277 #  endif                                /* ANOMALY_05000263 */
 278 # endif                         /* CONFIG_ROMFS_FS */
 279
 280         memory_end -= mtd_size;
 281
 282         if (mtd_size == 0) {
 283                 console_init();
 284                 panic("Don't boot kernel without rootfs attached.\n");
 285         }
 286
 287         /* Relocate MTD image to the top of memory after the uncached memory area */
 288         dma_memcpy((char *)memory_end, __bss_stop, mtd_size);
 289
 290         memory_mtd_start = memory_end;
 291         _ebss = memory_mtd_start;       /* define _ebss for compatible */
 292 #endif                          /* CONFIG_MTD_UCLINUX */
 293
 294 #if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
 295         /* Due to a Hardware Anomaly we need to limit the size of usable
 296          * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
 297          * 05000263 - Hardware loop corrupted when taking an ICPLB exception
 298          */
 299 #if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
 300         if (memory_end >= 56 * 1024 * 1024)
 301                 memory_end = 56 * 1024 * 1024;
 302 #else
 303         if (memory_end >= 60 * 1024 * 1024)
 304                 memory_end = 60 * 1024 * 1024;
 305 #endif                          /* CONFIG_DEBUG_HUNT_FOR_ZERO */
 306         printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20);
 307 #endif                          /* ANOMALY_05000263 */
 308
 309 #if !defined(CONFIG_MTD_UCLINUX)
 310         memory_end -= SIZE_4K; /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/
 311 #endif
 312         init_mm.start_code = (unsigned long)_stext;
 313         init_mm.end_code = (unsigned long)_etext;
 314         init_mm.end_data = (unsigned long)_edata;
 315         init_mm.brk = (unsigned long)0;
 316
 317         init_leds();
 318
 319         printk(KERN_INFO "Blackfin support (C) 2004-2007 Analog Devices, Inc.\n");
 320         if (bfin_compiled_revid() == 0xffff)
 321                 printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU);
 322         else if (bfin_compiled_revid() == -1)
 323                 printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU);
 324         else
 325                 printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid());
 326         if (bfin_revid() != bfin_compiled_revid()) {
 327                 if (bfin_compiled_revid() == -1)
 328                         printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n",
 329                                bfin_revid());
 330                 else if (bfin_compiled_revid() != 0xffff)
 331                         printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
 332                                bfin_compiled_revid(), bfin_revid());
 333         }
 334         if (bfin_revid() < SUPPORTED_REVID)
 335                 printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
 336                        CPU, bfin_revid());
 337         printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
 338
 339         printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
 340                cclk / 1000000,  sclk / 1000000);
 341
 342         if (ANOMALY_05000273 && (cclk >> 1) <= sclk)
 343                 printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n");
 344
 345         printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);
 346         printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
 347
 348         printk(KERN_INFO "Memory map:\n"
 349                KERN_INFO "  text      = 0x%p-0x%p\n"
 350                KERN_INFO "  rodata    = 0x%p-0x%p\n"
 351                KERN_INFO "  data      = 0x%p-0x%p\n"
 352                KERN_INFO "    stack   = 0x%p-0x%p\n"
 353                KERN_INFO "  init      = 0x%p-0x%p\n"
 354                KERN_INFO "  bss       = 0x%p-0x%p\n"
 355                KERN_INFO "  available = 0x%p-0x%p\n"
 356 #ifdef CONFIG_MTD_UCLINUX
 357                KERN_INFO "  rootfs    = 0x%p-0x%p\n"
 358 #endif
 359 #if DMA_UNCACHED_REGION > 0
 360                KERN_INFO "  DMA Zone  = 0x%p-0x%p\n"
 361 #endif
 362                , _stext, _etext,
 363                __start_rodata, __end_rodata,
 364                _sdata, _edata,
 365                (void *)&init_thread_union, (void *)((int)(&init_thread_union) + 0x2000),
 366                __init_begin, __init_end,
 367                __bss_start, __bss_stop,
 368                (void *)_ramstart, (void *)memory_end
 369 #ifdef CONFIG_MTD_UCLINUX
 370                , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size)
 371 #endif
 372 #if DMA_UNCACHED_REGION > 0
 373                , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend)
 374 #endif
 375                );
 376
 377         /*
 378          * give all the memory to the bootmap allocator,  tell it to put the
 379          * boot mem_map at the start of memory
 380          */
 381         bootmap_size = init_bootmem_node(NODE_DATA(0), memory_start >> PAGE_SHIFT,      /* map goes here */
 382                                          PAGE_OFFSET >> PAGE_SHIFT,
 383                                          memory_end >> PAGE_SHIFT);
 384         /*
 385          * free the usable memory,  we have to make sure we do not free
 386          * the bootmem bitmap so we then reserve it after freeing it :-)
 387          */
 388         free_bootmem(memory_start, memory_end - memory_start);
 389
 390         reserve_bootmem(memory_start, bootmap_size);
 391         /*
 392          * get kmalloc into gear
 393          */
 394         paging_init();
 395
 396         /* check the size of the l1 area */
 397         l1_length = _etext_l1 - _stext_l1;
 398         if (l1_length > L1_CODE_LENGTH)
 399                 panic("L1 code memory overflow\n");
 400
 401         l1_length = _ebss_l1 - _sdata_l1;
 402         if (l1_length > L1_DATA_A_LENGTH)
 403                 panic("L1 data memory overflow\n");
 404
 405         _bfin_swrst = bfin_read_SWRST();
 406
 407         /* Copy atomic sequences to their fixed location, and sanity check that
 408            these locations are the ones that we advertise to userspace.  */
 409         memcpy((void *)FIXED_CODE_START, &fixed_code_start,
 410                FIXED_CODE_END - FIXED_CODE_START);
 411         BUG_ON((char *)&sigreturn_stub - (char *)&fixed_code_start
 412                != SIGRETURN_STUB - FIXED_CODE_START);
 413         BUG_ON((char *)&atomic_xchg32 - (char *)&fixed_code_start
 414                != ATOMIC_XCHG32 - FIXED_CODE_START);
 415         BUG_ON((char *)&atomic_cas32 - (char *)&fixed_code_start
 416                != ATOMIC_CAS32 - FIXED_CODE_START);
 417         BUG_ON((char *)&atomic_add32 - (char *)&fixed_code_start
 418                != ATOMIC_ADD32 - FIXED_CODE_START);
 419         BUG_ON((char *)&atomic_sub32 - (char *)&fixed_code_start
 420                != ATOMIC_SUB32 - FIXED_CODE_START);
 421         BUG_ON((char *)&atomic_ior32 - (char *)&fixed_code_start
 422                != ATOMIC_IOR32 - FIXED_CODE_START);
 423         BUG_ON((char *)&atomic_and32 - (char *)&fixed_code_start
 424                != ATOMIC_AND32 - FIXED_CODE_START);
 425         BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start
 426                != ATOMIC_XOR32 - FIXED_CODE_START);
 427
 428         init_exception_vectors();
 429         bf53x_cache_init();
 430 }
 431
 432 static int __init topology_init(void)
 433 {
 434 #if defined (CONFIG_BF561)
 435         static struct cpu cpu[2];
 436         register_cpu(&cpu[0], 0);
 437         register_cpu(&cpu[1], 1);
 438         return 0;
 439 #else
 440         static struct cpu cpu[1];
 441         return register_cpu(cpu, 0);
 442 #endif
 443 }
 444
 445 subsys_initcall(topology_init);
 446
 447 static u_long get_vco(void)
 448 {
 449         u_long msel;
 450         u_long vco;
 451
 452         msel = (bfin_read_PLL_CTL() >> 9) & 0x3F;
 453         if (0 == msel)
 454                 msel = 64;
 455
 456         vco = CONFIG_CLKIN_HZ;
 457         vco >>= (1 & bfin_read_PLL_CTL());      /* DF bit */
 458         vco = msel * vco;
 459         return vco;
 460 }
 461
 462 /*Get the Core clock*/
 463 u_long get_cclk(void)
 464 {
 465         u_long csel, ssel;
 466         if (bfin_read_PLL_STAT() & 0x1)
 467                 return CONFIG_CLKIN_HZ;
 468
 469         ssel = bfin_read_PLL_DIV();
 470         csel = ((ssel >> 4) & 0x03);
 471         ssel &= 0xf;
 472         if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */
 473                 return get_vco() / ssel;
 474         return get_vco() >> csel;
 475 }
 476 EXPORT_SYMBOL(get_cclk);
 477
 478 /* Get the System clock */
 479 u_long get_sclk(void)
 480 {
 481         u_long ssel;
 482
 483         if (bfin_read_PLL_STAT() & 0x1)
 484                 return CONFIG_CLKIN_HZ;
 485
 486         ssel = (bfin_read_PLL_DIV() & 0xf);
 487         if (0 == ssel) {
 488                 printk(KERN_WARNING "Invalid System Clock\n");
 489                 ssel = 1;
 490         }
 491
 492         return get_vco() / ssel;
 493 }
 494 EXPORT_SYMBOL(get_sclk);
 495
 496 /*
 497  *      Get CPU information for use by the procfs.
 498  */
 499 static int show_cpuinfo(struct seq_file *m, void *v)
 500 {
 501         char *cpu, *mmu, *fpu, *name;
 502         uint32_t revid;
 503
 504         u_long cclk = 0, sclk = 0;
 505         u_int dcache_size = 0, dsup_banks = 0;
 506
 507         cpu = CPU;
 508         mmu = "none";
 509         fpu = "none";
 510         revid = bfin_revid();
 511         name = bfin_board_name;
 512
 513         cclk = get_cclk();
 514         sclk = get_sclk();
 515
 516         seq_printf(m, "CPU:\t\tADSP-%s Rev. 0.%d\n"
 517                    "MMU:\t\t%s\n"
 518                    "FPU:\t\t%s\n"
 519                    "Core Clock:\t%9lu Hz\n"
 520                    "System Clock:\t%9lu Hz\n"
 521                    "BogoMips:\t%lu.%02lu\n"
 522                    "Calibration:\t%lu loops\n",
 523                    cpu, revid, mmu, fpu,
 524                    cclk,
 525                    sclk,
 526                    (loops_per_jiffy * HZ) / 500000,
 527                    ((loops_per_jiffy * HZ) / 5000) % 100,
 528                    (loops_per_jiffy * HZ));
 529         seq_printf(m, "Board Name:\t%s\n", name);
 530         seq_printf(m, "Board Memory:\t%ld MB\n", physical_mem_end >> 20);
 531         seq_printf(m, "Kernel Memory:\t%ld MB\n", (unsigned long)_ramend >> 20);
 532         if (bfin_read_IMEM_CONTROL() & (ENICPLB | IMC))
 533                 seq_printf(m, "I-CACHE:\tON\n");
 534         else
 535                 seq_printf(m, "I-CACHE:\tOFF\n");
 536         if ((bfin_read_DMEM_CONTROL()) & (ENDCPLB | DMC_ENABLE))
 537                 seq_printf(m, "D-CACHE:\tON"
 538 #if defined CONFIG_BFIN_WB
 539                            " (write-back)"
 540 #elif defined CONFIG_BFIN_WT
 541                            " (write-through)"
 542 #endif
 543                            "\n");
 544         else
 545                 seq_printf(m, "D-CACHE:\tOFF\n");
 546
 547
 548         switch (bfin_read_DMEM_CONTROL() & (1 << DMC0_P | 1 << DMC1_P)) {
 549         case ACACHE_BSRAM:
 550                 seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tSRAM\n");
 551                 dcache_size = 16;
 552                 dsup_banks = 1;
 553                 break;
 554         case ACACHE_BCACHE:
 555                 seq_printf(m, "DBANK-A:\tCACHE\n" "DBANK-B:\tCACHE\n");
 556                 dcache_size = 32;
 557                 dsup_banks = 2;
 558                 break;
 559         case ASRAM_BSRAM:
 560                 seq_printf(m, "DBANK-A:\tSRAM\n" "DBANK-B:\tSRAM\n");
 561                 dcache_size = 0;
 562                 dsup_banks = 0;
 563                 break;
 564         default:
 565                 break;
 566         }
 567
 568
 569         seq_printf(m, "I-CACHE Size:\t%dKB\n", BFIN_ICACHESIZE / 1024);
 570         seq_printf(m, "D-CACHE Size:\t%dKB\n", dcache_size);
 571         seq_printf(m, "I-CACHE Setup:\t%d Sub-banks/%d Ways, %d Lines/Way\n",
 572                    BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES);
 573         seq_printf(m,
 574                    "D-CACHE Setup:\t%d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
 575                    dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
 576                    BFIN_DLINES);
 577 #ifdef CONFIG_BFIN_ICACHE_LOCK
 578         switch (read_iloc()) {
 579         case WAY0_L:
 580                 seq_printf(m, "Way0 Locked-Down\n");
 581                 break;
 582         case WAY1_L:
 583                 seq_printf(m, "Way1 Locked-Down\n");
 584                 break;
 585         case WAY01_L:
 586                 seq_printf(m, "Way0,Way1 Locked-Down\n");
 587                 break;
 588         case WAY2_L:
 589                 seq_printf(m, "Way2 Locked-Down\n");
 590                 break;
 591         case WAY02_L:
 592                 seq_printf(m, "Way0,Way2 Locked-Down\n");
 593                 break;
 594         case WAY12_L:
 595                 seq_printf(m, "Way1,Way2 Locked-Down\n");
 596                 break;
 597         case WAY012_L:
 598                 seq_printf(m, "Way0,Way1 & Way2 Locked-Down\n");
 599                 break;
 600         case WAY3_L:
 601                 seq_printf(m, "Way3 Locked-Down\n");
 602                 break;
 603         case WAY03_L:
 604                 seq_printf(m, "Way0,Way3 Locked-Down\n");
 605                 break;
 606         case WAY13_L:
 607                 seq_printf(m, "Way1,Way3 Locked-Down\n");
 608                 break;
 609         case WAY013_L:
 610                 seq_printf(m, "Way 0,Way1,Way3 Locked-Down\n");
 611                 break;
 612         case WAY32_L:
 613                 seq_printf(m, "Way3,Way2 Locked-Down\n");
 614                 break;
 615         case WAY320_L:
 616                 seq_printf(m, "Way3,Way2,Way0 Locked-Down\n");
 617                 break;
 618         case WAY321_L:
 619                 seq_printf(m, "Way3,Way2,Way1 Locked-Down\n");
 620                 break;
 621         case WAYALL_L:
 622                 seq_printf(m, "All Ways are locked\n");
 623                 break;
 624         default:
 625                 seq_printf(m, "No Ways are locked\n");
 626         }
 627 #endif
 628         return 0;
 629 }
 630
 631 static void *c_start(struct seq_file *m, loff_t *pos)
 632 {
 633         return *pos < NR_CPUS ? ((void *)0x12345678) : NULL;
 634 }
 635
 636 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
 637 {
 638         ++*pos;
 639         return c_start(m, pos);
 640 }
 641
 642 static void c_stop(struct seq_file *m, void *v)
 643 {
 644 }
 645
 646 struct seq_operations cpuinfo_op = {
 647         .start = c_start,
 648         .next = c_next,
 649         .stop = c_stop,
 650         .show = show_cpuinfo,
 651 };
 652
 653 void __init cmdline_init(const char *r0)
 654 {
 655         if (r0)
 656                 strncpy(command_line, r0, COMMAND_LINE_SIZE);
 657 }