3 select ARCH_BINFMT_ELF_RANDOMIZE_PIE
4 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
5 select ARCH_HAS_GCOV_PROFILE_ALL
6 select ARCH_HAS_SG_CHAIN
7 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
8 select ARCH_USE_CMPXCHG_LOCKREF
9 select ARCH_SUPPORTS_ATOMIC_RMW
10 select ARCH_WANT_OPTIONAL_GPIOLIB
11 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
12 select ARCH_WANT_FRAME_POINTERS
16 select AUDIT_ARCH_COMPAT_GENERIC
17 select ARM_GIC_V2M if PCI_MSI
19 select ARM_GIC_V3_ITS if PCI_MSI
20 select BUILDTIME_EXTABLE_SORT
21 select CLONE_BACKWARDS
23 select CPU_PM if (SUSPEND || CPU_IDLE)
24 select DCACHE_WORD_ACCESS
25 select GENERIC_ALLOCATOR
26 select GENERIC_CLOCKEVENTS
27 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
28 select GENERIC_CPU_AUTOPROBE
29 select GENERIC_EARLY_IOREMAP
30 select GENERIC_IRQ_PROBE
31 select GENERIC_IRQ_SHOW
32 select GENERIC_PCI_IOMAP
33 select GENERIC_SCHED_CLOCK
34 select GENERIC_SMP_IDLE_THREAD
35 select GENERIC_STRNCPY_FROM_USER
36 select GENERIC_STRNLEN_USER
37 select GENERIC_TIME_VSYSCALL
38 select HANDLE_DOMAIN_IRQ
39 select HARDIRQS_SW_RESEND
40 select HAVE_ALIGNED_STRUCT_PAGE if SLUB
41 select HAVE_ARCH_AUDITSYSCALL
42 select HAVE_ARCH_JUMP_LABEL
44 select HAVE_ARCH_SECCOMP_FILTER
45 select HAVE_ARCH_TRACEHOOK
47 select HAVE_C_RECORDMCOUNT
48 select HAVE_CC_STACKPROTECTOR
49 select HAVE_CMPXCHG_DOUBLE
50 select HAVE_DEBUG_BUGVERBOSE
51 select HAVE_DEBUG_KMEMLEAK
52 select HAVE_DMA_API_DEBUG
54 select HAVE_DMA_CONTIGUOUS
55 select HAVE_DYNAMIC_FTRACE
56 select HAVE_EFFICIENT_UNALIGNED_ACCESS
57 select HAVE_FTRACE_MCOUNT_RECORD
58 select HAVE_FUNCTION_TRACER
59 select HAVE_FUNCTION_GRAPH_TRACER
60 select HAVE_GENERIC_DMA_COHERENT
61 select HAVE_HW_BREAKPOINT if PERF_EVENTS
63 select HAVE_PATA_PLATFORM
64 select HAVE_PERF_EVENTS
66 select HAVE_PERF_USER_STACK_DUMP
67 select HAVE_RCU_TABLE_FREE
68 select HAVE_SYSCALL_TRACEPOINTS
70 select MODULES_USE_ELF_RELA
73 select OF_EARLY_FLATTREE
74 select OF_RESERVED_MEM
75 select PERF_USE_VMALLOC
80 select SYSCTL_EXCEPTION_TRACE
81 select HAVE_CONTEXT_TRACKING
83 ARM 64-bit (AArch64) Linux support.
88 config ARCH_PHYS_ADDR_T_64BIT
97 config STACKTRACE_SUPPORT
100 config LOCKDEP_SUPPORT
103 config TRACE_IRQFLAGS_SUPPORT
106 config RWSEM_XCHGADD_ALGORITHM
109 config GENERIC_HWEIGHT
115 config GENERIC_CALIBRATE_DELAY
121 config HAVE_GENERIC_RCU_GUP
124 config ARCH_DMA_ADDR_T_64BIT
127 config NEED_DMA_MAP_STATE
130 config NEED_SG_DMA_LENGTH
139 config KERNEL_MODE_NEON
142 config FIX_EARLYCON_MEM
145 source "init/Kconfig"
147 source "kernel/Kconfig.freezer"
149 menu "Platform selection"
154 This enables support for Samsung Exynos SoC family
157 bool "ARMv8 based Samsung Exynos7"
159 select COMMON_CLK_SAMSUNG
160 select HAVE_S3C2410_WATCHDOG if WATCHDOG
161 select HAVE_S3C_RTC if RTC_CLASS
163 select PINCTRL_EXYNOS
166 This enables support for Samsung Exynos7 SoC family
169 bool "AMD Seattle SoC Family"
171 This enables support for AMD Seattle SOC Family
174 bool "NVIDIA Tegra SoC Family"
175 select ARCH_HAS_RESET_CONTROLLER
176 select ARCH_REQUIRE_GPIOLIB
180 select GENERIC_CLOCKEVENTS
184 select RESET_CONTROLLER
186 This enables support for the NVIDIA Tegra SoC family.
188 config ARCH_TEGRA_132_SOC
189 bool "NVIDIA Tegra132 SoC"
190 depends on ARCH_TEGRA
191 select PINCTRL_TEGRA124
192 select USB_ARCH_HAS_EHCI if USB_SUPPORT
193 select USB_ULPI if USB_PHY
194 select USB_ULPI_VIEWPORT if USB_PHY
196 Enable support for NVIDIA Tegra132 SoC, based on the Denver
197 ARMv8 CPU. The Tegra132 SoC is similar to the Tegra124 SoC,
198 but contains an NVIDIA Denver CPU complex in place of
199 Tegra124's "4+1" Cortex-A15 CPU complex.
201 config ARCH_FSL_LS2085A
202 bool "Freescale LS2085A SOC"
204 This enables support for Freescale LS2085A SOC.
207 bool "Cavium Inc. Thunder SoC Family"
209 This enables support for Cavium's Thunder Family of SoCs.
212 bool "ARMv8 software model (Versatile Express)"
213 select ARCH_REQUIRE_GPIOLIB
214 select COMMON_CLK_VERSATILE
215 select POWER_RESET_VEXPRESS
216 select VEXPRESS_CONFIG
218 This enables support for the ARMv8 software model (Versatile
222 bool "AppliedMicro X-Gene SOC Family"
224 This enables support for AppliedMicro X-Gene SOC Family
233 This feature enables support for PCI bus system. If you say Y
234 here, the kernel will include drivers and infrastructure code
235 to support PCI bus devices.
240 config PCI_DOMAINS_GENERIC
246 source "drivers/pci/Kconfig"
247 source "drivers/pci/pcie/Kconfig"
248 source "drivers/pci/hotplug/Kconfig"
252 menu "Kernel Features"
254 menu "ARM errata workarounds via the alternatives framework"
256 config ARM64_ERRATUM_826319
257 bool "Cortex-A53: 826319: System might deadlock if a write cannot complete until read data is accepted"
260 This option adds an alternative code sequence to work around ARM
261 erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
262 AXI master interface and an L2 cache.
264 If a Cortex-A53 uses an AMBA AXI4 ACE interface to other processors
265 and is unable to accept a certain write via this interface, it will
266 not progress on read data presented on the read data channel and the
269 The workaround promotes data cache clean instructions to
270 data cache clean-and-invalidate.
271 Please note that this does not necessarily enable the workaround,
272 as it depends on the alternative framework, which will only patch
273 the kernel if an affected CPU is detected.
277 config ARM64_ERRATUM_827319
278 bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to the interconnect"
281 This option adds an alternative code sequence to work around ARM
282 erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
283 master interface and an L2 cache.
285 Under certain conditions this erratum can cause a clean line eviction
286 to occur at the same time as another transaction to the same address
287 on the AMBA 5 CHI interface, which can cause data corruption if the
288 interconnect reorders the two transactions.
290 The workaround promotes data cache clean instructions to
291 data cache clean-and-invalidate.
292 Please note that this does not necessarily enable the workaround,
293 as it depends on the alternative framework, which will only patch
294 the kernel if an affected CPU is detected.
298 config ARM64_ERRATUM_824069
299 bool "Cortex-A53: 824069: Cache line might not be marked as clean after a CleanShared snoop"
302 This option adds an alternative code sequence to work around ARM
303 erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
304 to a coherent interconnect.
306 If a Cortex-A53 processor is executing a store or prefetch for
307 write instruction at the same time as a processor in another
308 cluster is executing a cache maintenance operation to the same
309 address, then this erratum might cause a clean cache line to be
310 incorrectly marked as dirty.
312 The workaround promotes data cache clean instructions to
313 data cache clean-and-invalidate.
314 Please note that this option does not necessarily enable the
315 workaround, as it depends on the alternative framework, which will
316 only patch the kernel if an affected CPU is detected.
320 config ARM64_ERRATUM_819472
321 bool "Cortex-A53: 819472: Store exclusive instructions might cause data corruption"
324 This option adds an alternative code sequence to work around ARM
325 erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
326 present when it is connected to a coherent interconnect.
328 If the processor is executing a load and store exclusive sequence at
329 the same time as a processor in another cluster is executing a cache
330 maintenance operation to the same address, then this erratum might
331 cause data corruption.
333 The workaround promotes data cache clean instructions to
334 data cache clean-and-invalidate.
335 Please note that this does not necessarily enable the workaround,
336 as it depends on the alternative framework, which will only patch
337 the kernel if an affected CPU is detected.
341 config ARM64_ERRATUM_832075
342 bool "Cortex-A57: 832075: possible deadlock on mixing exclusive memory accesses with device loads"
345 This option adds an alternative code sequence to work around ARM
346 erratum 832075 on Cortex-A57 parts up to r1p2.
348 Affected Cortex-A57 parts might deadlock when exclusive load/store
349 instructions to Write-Back memory are mixed with Device loads.
351 The workaround is to promote device loads to use Load-Acquire
353 Please note that this does not necessarily enable the workaround,
354 as it depends on the alternative framework, which will only patch
355 the kernel if an affected CPU is detected.
364 default ARM64_4K_PAGES
366 Page size (translation granule) configuration.
368 config ARM64_4K_PAGES
371 This feature enables 4KB pages support.
373 config ARM64_64K_PAGES
376 This feature enables 64KB pages support (4KB by default)
377 allowing only two levels of page tables and faster TLB
378 look-up. AArch32 emulation is not available when this feature
384 prompt "Virtual address space size"
385 default ARM64_VA_BITS_39 if ARM64_4K_PAGES
386 default ARM64_VA_BITS_42 if ARM64_64K_PAGES
388 Allows choosing one of multiple possible virtual address
389 space sizes. The level of translation table is determined by
390 a combination of page size and virtual address space size.
392 config ARM64_VA_BITS_39
394 depends on ARM64_4K_PAGES
396 config ARM64_VA_BITS_42
398 depends on ARM64_64K_PAGES
400 config ARM64_VA_BITS_48
408 default 39 if ARM64_VA_BITS_39
409 default 42 if ARM64_VA_BITS_42
410 default 48 if ARM64_VA_BITS_48
412 config ARM64_PGTABLE_LEVELS
414 default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
415 default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48
416 default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
417 default 4 if ARM64_4K_PAGES && ARM64_VA_BITS_48
419 config CPU_BIG_ENDIAN
420 bool "Build big-endian kernel"
422 Say Y if you plan on running a kernel in big-endian mode.
425 bool "Symmetric Multi-Processing"
427 This enables support for systems with more than one CPU. If
428 you say N here, the kernel will run on single and
429 multiprocessor machines, but will use only one CPU of a
430 multiprocessor machine. If you say Y here, the kernel will run
431 on many, but not all, single processor machines. On a single
432 processor machine, the kernel will run faster if you say N
435 If you don't know what to do here, say N.
438 bool "Multi-core scheduler support"
441 Multi-core scheduler support improves the CPU scheduler's decision
442 making when dealing with multi-core CPU chips at a cost of slightly
443 increased overhead in some places. If unsure say N here.
446 bool "SMT scheduler support"
449 Improves the CPU scheduler's decision making when dealing with
450 MultiThreading at a cost of slightly increased overhead in some
451 places. If unsure say N here.
454 int "Maximum number of CPUs (2-64)"
457 # These have to remain sorted largest to smallest
461 bool "Support for hot-pluggable CPUs"
464 Say Y here to experiment with turning CPUs off and on. CPUs
465 can be controlled through /sys/devices/system/cpu.
467 source kernel/Kconfig.preempt
473 config ARCH_HAS_HOLES_MEMORYMODEL
474 def_bool y if SPARSEMEM
476 config ARCH_SPARSEMEM_ENABLE
478 select SPARSEMEM_VMEMMAP_ENABLE
480 config ARCH_SPARSEMEM_DEFAULT
481 def_bool ARCH_SPARSEMEM_ENABLE
483 config ARCH_SELECT_MEMORY_MODEL
484 def_bool ARCH_SPARSEMEM_ENABLE
486 config HAVE_ARCH_PFN_VALID
487 def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
489 config HW_PERF_EVENTS
490 bool "Enable hardware performance counter support for perf events"
491 depends on PERF_EVENTS
494 Enable hardware performance counter support for perf events. If
495 disabled, perf events will use software events only.
497 config SYS_SUPPORTS_HUGETLBFS
500 config ARCH_WANT_GENERAL_HUGETLB
503 config ARCH_WANT_HUGE_PMD_SHARE
504 def_bool y if !ARM64_64K_PAGES
506 config HAVE_ARCH_TRANSPARENT_HUGEPAGE
509 config ARCH_HAS_CACHE_LINE_SIZE
515 bool "Enable seccomp to safely compute untrusted bytecode"
517 This kernel feature is useful for number crunching applications
518 that may need to compute untrusted bytecode during their
519 execution. By using pipes or other transports made available to
520 the process as file descriptors supporting the read/write
521 syscalls, it's possible to isolate those applications in
522 their own address space using seccomp. Once seccomp is
523 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
524 and the task is only allowed to execute a few safe syscalls
525 defined by each seccomp mode.
532 bool "Xen guest support on ARM64"
533 depends on ARM64 && OF
536 Say Y if you want to run Linux in a Virtual Machine on Xen on ARM64.
538 config FORCE_MAX_ZONEORDER
540 default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE)
543 menuconfig ARMV8_DEPRECATED
544 bool "Emulate deprecated/obsolete ARMv8 instructions"
547 Legacy software support may require certain instructions
548 that have been deprecated or obsoleted in the architecture.
550 Enable this config to enable selective emulation of these
558 bool "Emulate SWP/SWPB instructions"
560 ARMv8 obsoletes the use of A32 SWP/SWPB instructions such that
561 they are always undefined. Say Y here to enable software
562 emulation of these instructions for userspace using LDXR/STXR.
564 In some older versions of glibc [<=2.8] SWP is used during futex
565 trylock() operations with the assumption that the code will not
566 be preempted. This invalid assumption may be more likely to fail
567 with SWP emulation enabled, leading to deadlock of the user
570 NOTE: when accessing uncached shared regions, LDXR/STXR rely
571 on an external transaction monitoring block called a global
572 monitor to maintain update atomicity. If your system does not
573 implement a global monitor, this option can cause programs that
574 perform SWP operations to uncached memory to deadlock.
578 config CP15_BARRIER_EMULATION
579 bool "Emulate CP15 Barrier instructions"
581 The CP15 barrier instructions - CP15ISB, CP15DSB, and
582 CP15DMB - are deprecated in ARMv8 (and ARMv7). It is
583 strongly recommended to use the ISB, DSB, and DMB
584 instructions instead.
586 Say Y here to enable software emulation of these
587 instructions for AArch32 userspace code. When this option is
588 enabled, CP15 barrier usage is traced which can help
589 identify software that needs updating.
600 string "Default kernel command string"
603 Provide a set of default command-line options at build time by
604 entering them here. As a minimum, you should specify the the
605 root device (e.g. root=/dev/nfs).
608 bool "Always use the default kernel command string"
610 Always use the default kernel command string, even if the boot
611 loader passes other arguments to the kernel.
612 This is useful if you cannot or don't want to change the
613 command-line options your boot loader passes to the kernel.
619 bool "UEFI runtime support"
620 depends on OF && !CPU_BIG_ENDIAN
623 select EFI_PARAMS_FROM_FDT
624 select EFI_RUNTIME_WRAPPERS
629 This option provides support for runtime services provided
630 by UEFI firmware (such as non-volatile variables, realtime
631 clock, and platform reset). A UEFI stub is also provided to
632 allow the kernel to be booted as an EFI application. This
633 is only useful on systems that have UEFI firmware.
636 bool "Enable support for SMBIOS (DMI) tables"
640 This enables SMBIOS/DMI feature for systems.
642 This option is only useful on systems that have UEFI firmware.
643 However, even with this option, the resultant kernel should
644 continue to boot on existing non-UEFI platforms.
648 menu "Userspace binary formats"
650 source "fs/Kconfig.binfmt"
653 bool "Kernel support for 32-bit EL0"
654 depends on !ARM64_64K_PAGES
655 select COMPAT_BINFMT_ELF
657 select OLD_SIGSUSPEND3
658 select COMPAT_OLD_SIGACTION
660 This option enables support for a 32-bit EL0 running under a 64-bit
661 kernel at EL1. AArch32-specific components such as system calls,
662 the user helper functions, VFP support and the ptrace interface are
663 handled appropriately by the kernel.
665 If you want to execute 32-bit userspace applications, say Y.
667 config SYSVIPC_COMPAT
669 depends on COMPAT && SYSVIPC
673 menu "Power management options"
675 source "kernel/power/Kconfig"
677 config ARCH_SUSPEND_POSSIBLE
680 config ARM64_CPU_SUSPEND
685 menu "CPU Power Management"
687 source "drivers/cpuidle/Kconfig"
689 source "drivers/cpufreq/Kconfig"
695 source "drivers/Kconfig"
697 source "drivers/firmware/Kconfig"
701 source "arch/arm64/kvm/Kconfig"
703 source "arch/arm64/Kconfig.debug"
705 source "security/Kconfig"
707 source "crypto/Kconfig"
709 source "arch/arm64/crypto/Kconfig"