Merge branch for-rmk-devel of git://aeryn.fluff.org.uk/bjdooks/linux into devel
[pandora-kernel.git] / arch / arm / plat-s3c24xx / devs.c
1 /* linux/arch/arm/plat-s3c24xx/devs.c
2  *
3  * Copyright (c) 2004 Simtec Electronics
4  *      Ben Dooks <ben@simtec.co.uk>
5  *
6  * Base S3C24XX platform device definitions
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  *
12 */
13
14 #include <linux/kernel.h>
15 #include <linux/types.h>
16 #include <linux/interrupt.h>
17 #include <linux/list.h>
18 #include <linux/timer.h>
19 #include <linux/init.h>
20 #include <linux/serial_core.h>
21 #include <linux/platform_device.h>
22 #include <linux/io.h>
23
24 #include <asm/mach/arch.h>
25 #include <asm/mach/map.h>
26 #include <asm/mach/irq.h>
27 #include <mach/fb.h>
28 #include <mach/hardware.h>
29 #include <asm/irq.h>
30
31 #include <plat/regs-serial.h>
32 #include <plat/udc.h>
33
34 #include <plat/devs.h>
35 #include <plat/cpu.h>
36 #include <plat/regs-spi.h>
37
38 /* Serial port registrations */
39
40 static struct resource s3c2410_uart0_resource[] = {
41         [0] = {
42                 .start = S3C2410_PA_UART0,
43                 .end   = S3C2410_PA_UART0 + 0x3fff,
44                 .flags = IORESOURCE_MEM,
45         },
46         [1] = {
47                 .start = IRQ_S3CUART_RX0,
48                 .end   = IRQ_S3CUART_ERR0,
49                 .flags = IORESOURCE_IRQ,
50         }
51 };
52
53 static struct resource s3c2410_uart1_resource[] = {
54         [0] = {
55                 .start = S3C2410_PA_UART1,
56                 .end   = S3C2410_PA_UART1 + 0x3fff,
57                 .flags = IORESOURCE_MEM,
58         },
59         [1] = {
60                 .start = IRQ_S3CUART_RX1,
61                 .end   = IRQ_S3CUART_ERR1,
62                 .flags = IORESOURCE_IRQ,
63         }
64 };
65
66 static struct resource s3c2410_uart2_resource[] = {
67         [0] = {
68                 .start = S3C2410_PA_UART2,
69                 .end   = S3C2410_PA_UART2 + 0x3fff,
70                 .flags = IORESOURCE_MEM,
71         },
72         [1] = {
73                 .start = IRQ_S3CUART_RX2,
74                 .end   = IRQ_S3CUART_ERR2,
75                 .flags = IORESOURCE_IRQ,
76         }
77 };
78
79 static struct resource s3c2410_uart3_resource[] = {
80         [0] = {
81                 .start = S3C2443_PA_UART3,
82                 .end   = S3C2443_PA_UART3 + 0x3fff,
83                 .flags = IORESOURCE_MEM,
84         },
85         [1] = {
86                 .start = IRQ_S3CUART_RX3,
87                 .end   = IRQ_S3CUART_ERR3,
88                 .flags = IORESOURCE_IRQ,
89         },
90 };
91
92 struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
93         [0] = {
94                 .resources      = s3c2410_uart0_resource,
95                 .nr_resources   = ARRAY_SIZE(s3c2410_uart0_resource),
96         },
97         [1] = {
98                 .resources      = s3c2410_uart1_resource,
99                 .nr_resources   = ARRAY_SIZE(s3c2410_uart1_resource),
100         },
101         [2] = {
102                 .resources      = s3c2410_uart2_resource,
103                 .nr_resources   = ARRAY_SIZE(s3c2410_uart2_resource),
104         },
105         [3] = {
106                 .resources      = s3c2410_uart3_resource,
107                 .nr_resources   = ARRAY_SIZE(s3c2410_uart3_resource),
108         },
109 };
110
111 /* yart devices */
112
113 static struct platform_device s3c24xx_uart_device0 = {
114         .id             = 0,
115 };
116
117 static struct platform_device s3c24xx_uart_device1 = {
118         .id             = 1,
119 };
120
121 static struct platform_device s3c24xx_uart_device2 = {
122         .id             = 2,
123 };
124
125 static struct platform_device s3c24xx_uart_device3 = {
126         .id             = 3,
127 };
128
129 struct platform_device *s3c24xx_uart_src[4] = {
130         &s3c24xx_uart_device0,
131         &s3c24xx_uart_device1,
132         &s3c24xx_uart_device2,
133         &s3c24xx_uart_device3,
134 };
135
136 struct platform_device *s3c24xx_uart_devs[4] = {
137 };
138
139 /* LCD Controller */
140
141 static struct resource s3c_lcd_resource[] = {
142         [0] = {
143                 .start = S3C24XX_PA_LCD,
144                 .end   = S3C24XX_PA_LCD + S3C24XX_SZ_LCD - 1,
145                 .flags = IORESOURCE_MEM,
146         },
147         [1] = {
148                 .start = IRQ_LCD,
149                 .end   = IRQ_LCD,
150                 .flags = IORESOURCE_IRQ,
151         }
152
153 };
154
155 static u64 s3c_device_lcd_dmamask = 0xffffffffUL;
156
157 struct platform_device s3c_device_lcd = {
158         .name             = "s3c2410-lcd",
159         .id               = -1,
160         .num_resources    = ARRAY_SIZE(s3c_lcd_resource),
161         .resource         = s3c_lcd_resource,
162         .dev              = {
163                 .dma_mask               = &s3c_device_lcd_dmamask,
164                 .coherent_dma_mask      = 0xffffffffUL
165         }
166 };
167
168 EXPORT_SYMBOL(s3c_device_lcd);
169
170 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
171 {
172         struct s3c2410fb_mach_info *npd;
173
174         npd = kmalloc(sizeof(*npd), GFP_KERNEL);
175         if (npd) {
176                 memcpy(npd, pd, sizeof(*npd));
177                 s3c_device_lcd.dev.platform_data = npd;
178         } else {
179                 printk(KERN_ERR "no memory for LCD platform data\n");
180         }
181 }
182
183 /* NAND Controller */
184
185 static struct resource s3c_nand_resource[] = {
186         [0] = {
187                 .start = S3C24XX_PA_NAND,
188                 .end   = S3C24XX_PA_NAND + S3C24XX_SZ_NAND - 1,
189                 .flags = IORESOURCE_MEM,
190         }
191 };
192
193 struct platform_device s3c_device_nand = {
194         .name             = "s3c2410-nand",
195         .id               = -1,
196         .num_resources    = ARRAY_SIZE(s3c_nand_resource),
197         .resource         = s3c_nand_resource,
198 };
199
200 EXPORT_SYMBOL(s3c_device_nand);
201
202 /* USB Device (Gadget)*/
203
204 static struct resource s3c_usbgadget_resource[] = {
205         [0] = {
206                 .start = S3C24XX_PA_USBDEV,
207                 .end   = S3C24XX_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
208                 .flags = IORESOURCE_MEM,
209         },
210         [1] = {
211                 .start = IRQ_USBD,
212                 .end   = IRQ_USBD,
213                 .flags = IORESOURCE_IRQ,
214         }
215
216 };
217
218 struct platform_device s3c_device_usbgadget = {
219         .name             = "s3c2410-usbgadget",
220         .id               = -1,
221         .num_resources    = ARRAY_SIZE(s3c_usbgadget_resource),
222         .resource         = s3c_usbgadget_resource,
223 };
224
225 EXPORT_SYMBOL(s3c_device_usbgadget);
226
227 void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
228 {
229         struct s3c2410_udc_mach_info *npd;
230
231         npd = kmalloc(sizeof(*npd), GFP_KERNEL);
232         if (npd) {
233                 memcpy(npd, pd, sizeof(*npd));
234                 s3c_device_usbgadget.dev.platform_data = npd;
235         } else {
236                 printk(KERN_ERR "no memory for udc platform data\n");
237         }
238 }
239
240
241 /* Watchdog */
242
243 static struct resource s3c_wdt_resource[] = {
244         [0] = {
245                 .start = S3C24XX_PA_WATCHDOG,
246                 .end   = S3C24XX_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1,
247                 .flags = IORESOURCE_MEM,
248         },
249         [1] = {
250                 .start = IRQ_WDT,
251                 .end   = IRQ_WDT,
252                 .flags = IORESOURCE_IRQ,
253         }
254
255 };
256
257 struct platform_device s3c_device_wdt = {
258         .name             = "s3c2410-wdt",
259         .id               = -1,
260         .num_resources    = ARRAY_SIZE(s3c_wdt_resource),
261         .resource         = s3c_wdt_resource,
262 };
263
264 EXPORT_SYMBOL(s3c_device_wdt);
265
266 /* IIS */
267
268 static struct resource s3c_iis_resource[] = {
269         [0] = {
270                 .start = S3C24XX_PA_IIS,
271                 .end   = S3C24XX_PA_IIS + S3C24XX_SZ_IIS -1,
272                 .flags = IORESOURCE_MEM,
273         }
274 };
275
276 static u64 s3c_device_iis_dmamask = 0xffffffffUL;
277
278 struct platform_device s3c_device_iis = {
279         .name             = "s3c2410-iis",
280         .id               = -1,
281         .num_resources    = ARRAY_SIZE(s3c_iis_resource),
282         .resource         = s3c_iis_resource,
283         .dev              = {
284                 .dma_mask = &s3c_device_iis_dmamask,
285                 .coherent_dma_mask = 0xffffffffUL
286         }
287 };
288
289 EXPORT_SYMBOL(s3c_device_iis);
290
291 /* RTC */
292
293 static struct resource s3c_rtc_resource[] = {
294         [0] = {
295                 .start = S3C24XX_PA_RTC,
296                 .end   = S3C24XX_PA_RTC + 0xff,
297                 .flags = IORESOURCE_MEM,
298         },
299         [1] = {
300                 .start = IRQ_RTC,
301                 .end   = IRQ_RTC,
302                 .flags = IORESOURCE_IRQ,
303         },
304         [2] = {
305                 .start = IRQ_TICK,
306                 .end   = IRQ_TICK,
307                 .flags = IORESOURCE_IRQ
308         }
309 };
310
311 struct platform_device s3c_device_rtc = {
312         .name             = "s3c2410-rtc",
313         .id               = -1,
314         .num_resources    = ARRAY_SIZE(s3c_rtc_resource),
315         .resource         = s3c_rtc_resource,
316 };
317
318 EXPORT_SYMBOL(s3c_device_rtc);
319
320 /* ADC */
321
322 static struct resource s3c_adc_resource[] = {
323         [0] = {
324                 .start = S3C24XX_PA_ADC,
325                 .end   = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
326                 .flags = IORESOURCE_MEM,
327         },
328         [1] = {
329                 .start = IRQ_TC,
330                 .end   = IRQ_TC,
331                 .flags = IORESOURCE_IRQ,
332         },
333         [2] = {
334                 .start = IRQ_ADC,
335                 .end   = IRQ_ADC,
336                 .flags = IORESOURCE_IRQ,
337         }
338
339 };
340
341 struct platform_device s3c_device_adc = {
342         .name             = "s3c24xx-adc",
343         .id               = -1,
344         .num_resources    = ARRAY_SIZE(s3c_adc_resource),
345         .resource         = s3c_adc_resource,
346 };
347
348 /* HWMON */
349
350 struct platform_device s3c_device_hwmon = {
351         .name           = "s3c24xx-hwmon",
352         .id             = -1,
353         .dev.parent     = &s3c_device_adc.dev,
354 };
355
356 /* SDI */
357
358 static struct resource s3c_sdi_resource[] = {
359         [0] = {
360                 .start = S3C24XX_PA_SDI,
361                 .end   = S3C24XX_PA_SDI + S3C24XX_SZ_SDI - 1,
362                 .flags = IORESOURCE_MEM,
363         },
364         [1] = {
365                 .start = IRQ_SDI,
366                 .end   = IRQ_SDI,
367                 .flags = IORESOURCE_IRQ,
368         }
369
370 };
371
372 struct platform_device s3c_device_sdi = {
373         .name             = "s3c2410-sdi",
374         .id               = -1,
375         .num_resources    = ARRAY_SIZE(s3c_sdi_resource),
376         .resource         = s3c_sdi_resource,
377 };
378
379 EXPORT_SYMBOL(s3c_device_sdi);
380
381 /* SPI (0) */
382
383 static struct resource s3c_spi0_resource[] = {
384         [0] = {
385                 .start = S3C24XX_PA_SPI,
386                 .end   = S3C24XX_PA_SPI + 0x1f,
387                 .flags = IORESOURCE_MEM,
388         },
389         [1] = {
390                 .start = IRQ_SPI0,
391                 .end   = IRQ_SPI0,
392                 .flags = IORESOURCE_IRQ,
393         }
394
395 };
396
397 static u64 s3c_device_spi0_dmamask = 0xffffffffUL;
398
399 struct platform_device s3c_device_spi0 = {
400         .name             = "s3c2410-spi",
401         .id               = 0,
402         .num_resources    = ARRAY_SIZE(s3c_spi0_resource),
403         .resource         = s3c_spi0_resource,
404         .dev              = {
405                 .dma_mask = &s3c_device_spi0_dmamask,
406                 .coherent_dma_mask = 0xffffffffUL
407         }
408 };
409
410 EXPORT_SYMBOL(s3c_device_spi0);
411
412 /* SPI (1) */
413
414 static struct resource s3c_spi1_resource[] = {
415         [0] = {
416                 .start = S3C24XX_PA_SPI + S3C2410_SPI1,
417                 .end   = S3C24XX_PA_SPI + S3C2410_SPI1 + 0x1f,
418                 .flags = IORESOURCE_MEM,
419         },
420         [1] = {
421                 .start = IRQ_SPI1,
422                 .end   = IRQ_SPI1,
423                 .flags = IORESOURCE_IRQ,
424         }
425
426 };
427
428 static u64 s3c_device_spi1_dmamask = 0xffffffffUL;
429
430 struct platform_device s3c_device_spi1 = {
431         .name             = "s3c2410-spi",
432         .id               = 1,
433         .num_resources    = ARRAY_SIZE(s3c_spi1_resource),
434         .resource         = s3c_spi1_resource,
435         .dev              = {
436                 .dma_mask = &s3c_device_spi1_dmamask,
437                 .coherent_dma_mask = 0xffffffffUL
438         }
439 };
440
441 EXPORT_SYMBOL(s3c_device_spi1);
442
443 #ifdef CONFIG_CPU_S3C2440
444
445 /* Camif Controller */
446
447 static struct resource s3c_camif_resource[] = {
448         [0] = {
449                 .start = S3C2440_PA_CAMIF,
450                 .end   = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF - 1,
451                 .flags = IORESOURCE_MEM,
452         },
453         [1] = {
454                 .start = IRQ_CAM,
455                 .end   = IRQ_CAM,
456                 .flags = IORESOURCE_IRQ,
457         }
458
459 };
460
461 static u64 s3c_device_camif_dmamask = 0xffffffffUL;
462
463 struct platform_device s3c_device_camif = {
464         .name             = "s3c2440-camif",
465         .id               = -1,
466         .num_resources    = ARRAY_SIZE(s3c_camif_resource),
467         .resource         = s3c_camif_resource,
468         .dev              = {
469                 .dma_mask = &s3c_device_camif_dmamask,
470                 .coherent_dma_mask = 0xffffffffUL
471         }
472 };
473
474 EXPORT_SYMBOL(s3c_device_camif);
475
476 #endif // CONFIG_CPU_S32440