arch/arm/plat-omap/mcbsp.c

   1 /*
   2  * linux/arch/arm/plat-omap/mcbsp.c
   3  *
   4  * Copyright (C) 2004 Nokia Corporation
   5  * Author: Samuel Ortiz <samuel.ortiz@nokia.com>
   6  *
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * Multichannel mode not supported.
  13  */
  14
  15 #include <linux/module.h>
  16 #include <linux/init.h>
  17 #include <linux/device.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/err.h>
  21 #include <linux/clk.h>
  22 #include <linux/delay.h>
  23 #include <linux/io.h>
  24 #include <linux/slab.h>
  25
  26 #include <plat/mcbsp.h>
  27 #include <linux/pm_runtime.h>
  28
  29 /* XXX These "sideways" includes are a sign that something is wrong */
  30 #include "../mach-omap2/cm2xxx_3xxx.h"
  31 #include "../mach-omap2/cm-regbits-34xx.h"
  32
  33 struct omap_mcbsp **mcbsp_ptr;
  34 int omap_mcbsp_count;
  35
  36 static void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
  37 {
  38         void __iomem *addr = mcbsp->io_base + reg * mcbsp->pdata->reg_step;
  39
  40         if (mcbsp->pdata->reg_size == 2) {
  41                 ((u16 *)mcbsp->reg_cache)[reg] = (u16)val;
  42                 __raw_writew((u16)val, addr);
  43         } else {
  44                 ((u32 *)mcbsp->reg_cache)[reg] = val;
  45                 __raw_writel(val, addr);
  46         }
  47 }
  48
  49 static int omap_mcbsp_read(struct omap_mcbsp *mcbsp, u16 reg, bool from_cache)
  50 {
  51         void __iomem *addr = mcbsp->io_base + reg * mcbsp->pdata->reg_step;
  52
  53         if (mcbsp->pdata->reg_size == 2) {
  54                 return !from_cache ? __raw_readw(addr) :
  55                                      ((u16 *)mcbsp->reg_cache)[reg];
  56         } else {
  57                 return !from_cache ? __raw_readl(addr) :
  58                                      ((u32 *)mcbsp->reg_cache)[reg];
  59         }
  60 }
  61
  62 #ifdef CONFIG_ARCH_OMAP3
  63 static void omap_mcbsp_st_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
  64 {
  65         __raw_writel(val, mcbsp->st_data->io_base_st + reg);
  66 }
  67
  68 static int omap_mcbsp_st_read(struct omap_mcbsp *mcbsp, u16 reg)
  69 {
  70         return __raw_readl(mcbsp->st_data->io_base_st + reg);
  71 }
  72 #endif
  73
  74 #define MCBSP_READ(mcbsp, reg) \
  75                 omap_mcbsp_read(mcbsp, OMAP_MCBSP_REG_##reg, 0)
  76 #define MCBSP_WRITE(mcbsp, reg, val) \
  77                 omap_mcbsp_write(mcbsp, OMAP_MCBSP_REG_##reg, val)
  78 #define MCBSP_READ_CACHE(mcbsp, reg) \
  79                 omap_mcbsp_read(mcbsp, OMAP_MCBSP_REG_##reg, 1)
  80
  81 #define MCBSP_ST_READ(mcbsp, reg) \
  82                         omap_mcbsp_st_read(mcbsp, OMAP_ST_REG_##reg)
  83 #define MCBSP_ST_WRITE(mcbsp, reg, val) \
  84                         omap_mcbsp_st_write(mcbsp, OMAP_ST_REG_##reg, val)
  85
  86 static void omap_mcbsp_dump_reg(u8 id)
  87 {
  88         struct omap_mcbsp *mcbsp = id_to_mcbsp_ptr(id);
  89
  90         dev_dbg(mcbsp->dev, "**** McBSP%d regs ****\n", mcbsp->id);
  91         dev_dbg(mcbsp->dev, "DRR2:  0x%04x\n",
  92                         MCBSP_READ(mcbsp, DRR2));
  93         dev_dbg(mcbsp->dev, "DRR1:  0x%04x\n",
  94                         MCBSP_READ(mcbsp, DRR1));
  95         dev_dbg(mcbsp->dev, "DXR2:  0x%04x\n",
  96                         MCBSP_READ(mcbsp, DXR2));
  97         dev_dbg(mcbsp->dev, "DXR1:  0x%04x\n",
  98                         MCBSP_READ(mcbsp, DXR1));
  99         dev_dbg(mcbsp->dev, "SPCR2: 0x%04x\n",
 100                         MCBSP_READ(mcbsp, SPCR2));
 101         dev_dbg(mcbsp->dev, "SPCR1: 0x%04x\n",
 102                         MCBSP_READ(mcbsp, SPCR1));
 103         dev_dbg(mcbsp->dev, "RCR2:  0x%04x\n",
 104                         MCBSP_READ(mcbsp, RCR2));
 105         dev_dbg(mcbsp->dev, "RCR1:  0x%04x\n",
 106                         MCBSP_READ(mcbsp, RCR1));
 107         dev_dbg(mcbsp->dev, "XCR2:  0x%04x\n",
 108                         MCBSP_READ(mcbsp, XCR2));
 109         dev_dbg(mcbsp->dev, "XCR1:  0x%04x\n",
 110                         MCBSP_READ(mcbsp, XCR1));
 111         dev_dbg(mcbsp->dev, "SRGR2: 0x%04x\n",
 112                         MCBSP_READ(mcbsp, SRGR2));
 113         dev_dbg(mcbsp->dev, "SRGR1: 0x%04x\n",
 114                         MCBSP_READ(mcbsp, SRGR1));
 115         dev_dbg(mcbsp->dev, "PCR0:  0x%04x\n",
 116                         MCBSP_READ(mcbsp, PCR0));
 117         dev_dbg(mcbsp->dev, "***********************\n");
 118 }
 119
 120 static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
 121 {
 122         struct omap_mcbsp *mcbsp_tx = dev_id;
 123         u16 irqst_spcr2;
 124
 125         irqst_spcr2 = MCBSP_READ(mcbsp_tx, SPCR2);
 126         dev_dbg(mcbsp_tx->dev, "TX IRQ callback : 0x%x\n", irqst_spcr2);
 127
 128         if (irqst_spcr2 & XSYNC_ERR) {
 129                 dev_err(mcbsp_tx->dev, "TX Frame Sync Error! : 0x%x\n",
 130                         irqst_spcr2);
 131                 /* Writing zero to XSYNC_ERR clears the IRQ */
 132                 MCBSP_WRITE(mcbsp_tx, SPCR2, MCBSP_READ_CACHE(mcbsp_tx, SPCR2));
 133         }
 134
 135         return IRQ_HANDLED;
 136 }
 137
 138 static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
 139 {
 140         struct omap_mcbsp *mcbsp_rx = dev_id;
 141         u16 irqst_spcr1;
 142
 143         irqst_spcr1 = MCBSP_READ(mcbsp_rx, SPCR1);
 144         dev_dbg(mcbsp_rx->dev, "RX IRQ callback : 0x%x\n", irqst_spcr1);
 145
 146         if (irqst_spcr1 & RSYNC_ERR) {
 147                 dev_err(mcbsp_rx->dev, "RX Frame Sync Error! : 0x%x\n",
 148                         irqst_spcr1);
 149                 /* Writing zero to RSYNC_ERR clears the IRQ */
 150                 MCBSP_WRITE(mcbsp_rx, SPCR1, MCBSP_READ_CACHE(mcbsp_rx, SPCR1));
 151         }
 152
 153         return IRQ_HANDLED;
 154 }
 155
 156 /*
 157  * omap_mcbsp_config simply write a config to the
 158  * appropriate McBSP.
 159  * You either call this function or set the McBSP registers
 160  * by yourself before calling omap_mcbsp_start().
 161  */
 162 void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config)
 163 {
 164         struct omap_mcbsp *mcbsp;
 165
 166         if (!omap_mcbsp_check_valid_id(id)) {
 167                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 168                 return;
 169         }
 170         mcbsp = id_to_mcbsp_ptr(id);
 171
 172         dev_dbg(mcbsp->dev, "Configuring McBSP%d  phys_base: 0x%08lx\n",
 173                         mcbsp->id, mcbsp->phys_base);
 174
 175         /* We write the given config */
 176         MCBSP_WRITE(mcbsp, SPCR2, config->spcr2);
 177         MCBSP_WRITE(mcbsp, SPCR1, config->spcr1);
 178         MCBSP_WRITE(mcbsp, RCR2, config->rcr2);
 179         MCBSP_WRITE(mcbsp, RCR1, config->rcr1);
 180         MCBSP_WRITE(mcbsp, XCR2, config->xcr2);
 181         MCBSP_WRITE(mcbsp, XCR1, config->xcr1);
 182         MCBSP_WRITE(mcbsp, SRGR2, config->srgr2);
 183         MCBSP_WRITE(mcbsp, SRGR1, config->srgr1);
 184         MCBSP_WRITE(mcbsp, MCR2, config->mcr2);
 185         MCBSP_WRITE(mcbsp, MCR1, config->mcr1);
 186         MCBSP_WRITE(mcbsp, PCR0, config->pcr0);
 187         if (mcbsp->pdata->has_ccr) {
 188                 MCBSP_WRITE(mcbsp, XCCR, config->xccr);
 189                 MCBSP_WRITE(mcbsp, RCCR, config->rccr);
 190         }
 191 }
 192 EXPORT_SYMBOL(omap_mcbsp_config);
 193
 194 /**
 195  * omap_mcbsp_dma_params - returns the dma channel number
 196  * @id - mcbsp id
 197  * @stream - indicates the direction of data flow (rx or tx)
 198  *
 199  * Returns the dma channel number for the rx channel or tx channel
 200  * based on the value of @stream for the requested mcbsp given by @id
 201  */
 202 int omap_mcbsp_dma_ch_params(unsigned int id, unsigned int stream)
 203 {
 204         struct omap_mcbsp *mcbsp;
 205
 206         if (!omap_mcbsp_check_valid_id(id)) {
 207                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 208                 return -ENODEV;
 209         }
 210         mcbsp = id_to_mcbsp_ptr(id);
 211
 212         if (stream)
 213                 return mcbsp->dma_rx_sync;
 214         else
 215                 return mcbsp->dma_tx_sync;
 216 }
 217 EXPORT_SYMBOL(omap_mcbsp_dma_ch_params);
 218
 219 /**
 220  * omap_mcbsp_dma_reg_params - returns the address of mcbsp data register
 221  * @id - mcbsp id
 222  * @stream - indicates the direction of data flow (rx or tx)
 223  *
 224  * Returns the address of mcbsp data transmit register or data receive register
 225  * to be used by DMA for transferring/receiving data based on the value of
 226  * @stream for the requested mcbsp given by @id
 227  */
 228 int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream)
 229 {
 230         struct omap_mcbsp *mcbsp;
 231         int data_reg;
 232
 233         if (!omap_mcbsp_check_valid_id(id)) {
 234                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 235                 return -ENODEV;
 236         }
 237         mcbsp = id_to_mcbsp_ptr(id);
 238
 239         if (mcbsp->pdata->reg_size == 2) {
 240                 if (stream)
 241                         data_reg = OMAP_MCBSP_REG_DRR1;
 242                 else
 243                         data_reg = OMAP_MCBSP_REG_DXR1;
 244         } else {
 245                 if (stream)
 246                         data_reg = OMAP_MCBSP_REG_DRR;
 247                 else
 248                         data_reg = OMAP_MCBSP_REG_DXR;
 249         }
 250
 251         return mcbsp->phys_dma_base + data_reg * mcbsp->pdata->reg_step;
 252 }
 253 EXPORT_SYMBOL(omap_mcbsp_dma_reg_params);
 254
 255 #ifdef CONFIG_ARCH_OMAP3
 256 static void omap_st_on(struct omap_mcbsp *mcbsp)
 257 {
 258         unsigned int w;
 259
 260         /*
 261          * Sidetone uses McBSP ICLK - which must not idle when sidetones
 262          * are enabled or sidetones start sounding ugly.
 263          */
 264         w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
 265         w &= ~(1 << (mcbsp->id - 2));
 266         omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE);
 267
 268         /* Enable McBSP Sidetone */
 269         w = MCBSP_READ(mcbsp, SSELCR);
 270         MCBSP_WRITE(mcbsp, SSELCR, w | SIDETONEEN);
 271
 272         /* Enable Sidetone from Sidetone Core */
 273         w = MCBSP_ST_READ(mcbsp, SSELCR);
 274         MCBSP_ST_WRITE(mcbsp, SSELCR, w | ST_SIDETONEEN);
 275 }
 276
 277 static void omap_st_off(struct omap_mcbsp *mcbsp)
 278 {
 279         unsigned int w;
 280
 281         w = MCBSP_ST_READ(mcbsp, SSELCR);
 282         MCBSP_ST_WRITE(mcbsp, SSELCR, w & ~(ST_SIDETONEEN));
 283
 284         w = MCBSP_READ(mcbsp, SSELCR);
 285         MCBSP_WRITE(mcbsp, SSELCR, w & ~(SIDETONEEN));
 286
 287         w = omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE);
 288         w |= 1 << (mcbsp->id - 2);
 289         omap2_cm_write_mod_reg(w, OMAP3430_PER_MOD, CM_AUTOIDLE);
 290 }
 291
 292 static void omap_st_fir_write(struct omap_mcbsp *mcbsp, s16 *fir)
 293 {
 294         u16 val, i;
 295
 296         val = MCBSP_ST_READ(mcbsp, SSELCR);
 297
 298         if (val & ST_COEFFWREN)
 299                 MCBSP_ST_WRITE(mcbsp, SSELCR, val & ~(ST_COEFFWREN));
 300
 301         MCBSP_ST_WRITE(mcbsp, SSELCR, val | ST_COEFFWREN);
 302
 303         for (i = 0; i < 128; i++)
 304                 MCBSP_ST_WRITE(mcbsp, SFIRCR, fir[i]);
 305
 306         i = 0;
 307
 308         val = MCBSP_ST_READ(mcbsp, SSELCR);
 309         while (!(val & ST_COEFFWRDONE) && (++i < 1000))
 310                 val = MCBSP_ST_READ(mcbsp, SSELCR);
 311
 312         MCBSP_ST_WRITE(mcbsp, SSELCR, val & ~(ST_COEFFWREN));
 313
 314         if (i == 1000)
 315                 dev_err(mcbsp->dev, "McBSP FIR load error!\n");
 316 }
 317
 318 static void omap_st_chgain(struct omap_mcbsp *mcbsp)
 319 {
 320         u16 w;
 321         struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
 322
 323         w = MCBSP_ST_READ(mcbsp, SSELCR);
 324
 325         MCBSP_ST_WRITE(mcbsp, SGAINCR, ST_CH0GAIN(st_data->ch0gain) | \
 326                       ST_CH1GAIN(st_data->ch1gain));
 327 }
 328
 329 int omap_st_set_chgain(unsigned int id, int channel, s16 chgain)
 330 {
 331         struct omap_mcbsp *mcbsp;
 332         struct omap_mcbsp_st_data *st_data;
 333         int ret = 0;
 334
 335         if (!omap_mcbsp_check_valid_id(id)) {
 336                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 337                 return -ENODEV;
 338         }
 339
 340         mcbsp = id_to_mcbsp_ptr(id);
 341         st_data = mcbsp->st_data;
 342
 343         if (!st_data)
 344                 return -ENOENT;
 345
 346         spin_lock_irq(&mcbsp->lock);
 347         if (channel == 0)
 348                 st_data->ch0gain = chgain;
 349         else if (channel == 1)
 350                 st_data->ch1gain = chgain;
 351         else
 352                 ret = -EINVAL;
 353
 354         if (st_data->enabled)
 355                 omap_st_chgain(mcbsp);
 356         spin_unlock_irq(&mcbsp->lock);
 357
 358         return ret;
 359 }
 360 EXPORT_SYMBOL(omap_st_set_chgain);
 361
 362 int omap_st_get_chgain(unsigned int id, int channel, s16 *chgain)
 363 {
 364         struct omap_mcbsp *mcbsp;
 365         struct omap_mcbsp_st_data *st_data;
 366         int ret = 0;
 367
 368         if (!omap_mcbsp_check_valid_id(id)) {
 369                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 370                 return -ENODEV;
 371         }
 372
 373         mcbsp = id_to_mcbsp_ptr(id);
 374         st_data = mcbsp->st_data;
 375
 376         if (!st_data)
 377                 return -ENOENT;
 378
 379         spin_lock_irq(&mcbsp->lock);
 380         if (channel == 0)
 381                 *chgain = st_data->ch0gain;
 382         else if (channel == 1)
 383                 *chgain = st_data->ch1gain;
 384         else
 385                 ret = -EINVAL;
 386         spin_unlock_irq(&mcbsp->lock);
 387
 388         return ret;
 389 }
 390 EXPORT_SYMBOL(omap_st_get_chgain);
 391
 392 static int omap_st_start(struct omap_mcbsp *mcbsp)
 393 {
 394         struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
 395
 396         if (st_data && st_data->enabled && !st_data->running) {
 397                 omap_st_fir_write(mcbsp, st_data->taps);
 398                 omap_st_chgain(mcbsp);
 399
 400                 if (!mcbsp->free) {
 401                         omap_st_on(mcbsp);
 402                         st_data->running = 1;
 403                 }
 404         }
 405
 406         return 0;
 407 }
 408
 409 int omap_st_enable(unsigned int id)
 410 {
 411         struct omap_mcbsp *mcbsp;
 412         struct omap_mcbsp_st_data *st_data;
 413
 414         if (!omap_mcbsp_check_valid_id(id)) {
 415                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 416                 return -ENODEV;
 417         }
 418
 419         mcbsp = id_to_mcbsp_ptr(id);
 420         st_data = mcbsp->st_data;
 421
 422         if (!st_data)
 423                 return -ENODEV;
 424
 425         spin_lock_irq(&mcbsp->lock);
 426         st_data->enabled = 1;
 427         omap_st_start(mcbsp);
 428         spin_unlock_irq(&mcbsp->lock);
 429
 430         return 0;
 431 }
 432 EXPORT_SYMBOL(omap_st_enable);
 433
 434 static int omap_st_stop(struct omap_mcbsp *mcbsp)
 435 {
 436         struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
 437
 438         if (st_data && st_data->running) {
 439                 if (!mcbsp->free) {
 440                         omap_st_off(mcbsp);
 441                         st_data->running = 0;
 442                 }
 443         }
 444
 445         return 0;
 446 }
 447
 448 int omap_st_disable(unsigned int id)
 449 {
 450         struct omap_mcbsp *mcbsp;
 451         struct omap_mcbsp_st_data *st_data;
 452         int ret = 0;
 453
 454         if (!omap_mcbsp_check_valid_id(id)) {
 455                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 456                 return -ENODEV;
 457         }
 458
 459         mcbsp = id_to_mcbsp_ptr(id);
 460         st_data = mcbsp->st_data;
 461
 462         if (!st_data)
 463                 return -ENODEV;
 464
 465         spin_lock_irq(&mcbsp->lock);
 466         omap_st_stop(mcbsp);
 467         st_data->enabled = 0;
 468         spin_unlock_irq(&mcbsp->lock);
 469
 470         return ret;
 471 }
 472 EXPORT_SYMBOL(omap_st_disable);
 473
 474 int omap_st_is_enabled(unsigned int id)
 475 {
 476         struct omap_mcbsp *mcbsp;
 477         struct omap_mcbsp_st_data *st_data;
 478
 479         if (!omap_mcbsp_check_valid_id(id)) {
 480                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 481                 return -ENODEV;
 482         }
 483
 484         mcbsp = id_to_mcbsp_ptr(id);
 485         st_data = mcbsp->st_data;
 486
 487         if (!st_data)
 488                 return -ENODEV;
 489
 490
 491         return st_data->enabled;
 492 }
 493 EXPORT_SYMBOL(omap_st_is_enabled);
 494
 495 #else
 496 static inline void omap_st_start(struct omap_mcbsp *mcbsp) {}
 497 static inline void omap_st_stop(struct omap_mcbsp *mcbsp) {}
 498 #endif
 499
 500 /*
 501  * omap_mcbsp_set_rx_threshold configures the transmit threshold in words.
 502  * The threshold parameter is 1 based, and it is converted (threshold - 1)
 503  * for the THRSH2 register.
 504  */
 505 void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold)
 506 {
 507         struct omap_mcbsp *mcbsp;
 508
 509         if (!omap_mcbsp_check_valid_id(id)) {
 510                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 511                 return;
 512         }
 513         mcbsp = id_to_mcbsp_ptr(id);
 514         if (mcbsp->pdata->buffer_size == 0)
 515                 return;
 516
 517         if (threshold && threshold <= mcbsp->max_tx_thres)
 518                 MCBSP_WRITE(mcbsp, THRSH2, threshold - 1);
 519 }
 520 EXPORT_SYMBOL(omap_mcbsp_set_tx_threshold);
 521
 522 /*
 523  * omap_mcbsp_set_rx_threshold configures the receive threshold in words.
 524  * The threshold parameter is 1 based, and it is converted (threshold - 1)
 525  * for the THRSH1 register.
 526  */
 527 void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold)
 528 {
 529         struct omap_mcbsp *mcbsp;
 530
 531         if (!omap_mcbsp_check_valid_id(id)) {
 532                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 533                 return;
 534         }
 535         mcbsp = id_to_mcbsp_ptr(id);
 536         if (mcbsp->pdata->buffer_size == 0)
 537                 return;
 538
 539         if (threshold && threshold <= mcbsp->max_rx_thres)
 540                 MCBSP_WRITE(mcbsp, THRSH1, threshold - 1);
 541 }
 542 EXPORT_SYMBOL(omap_mcbsp_set_rx_threshold);
 543
 544 /*
 545  * omap_mcbsp_get_max_tx_thres just return the current configured
 546  * maximum threshold for transmission
 547  */
 548 u16 omap_mcbsp_get_max_tx_threshold(unsigned int id)
 549 {
 550         struct omap_mcbsp *mcbsp;
 551
 552         if (!omap_mcbsp_check_valid_id(id)) {
 553                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 554                 return -ENODEV;
 555         }
 556         mcbsp = id_to_mcbsp_ptr(id);
 557
 558         return mcbsp->max_tx_thres;
 559 }
 560 EXPORT_SYMBOL(omap_mcbsp_get_max_tx_threshold);
 561
 562 /*
 563  * omap_mcbsp_get_max_rx_thres just return the current configured
 564  * maximum threshold for reception
 565  */
 566 u16 omap_mcbsp_get_max_rx_threshold(unsigned int id)
 567 {
 568         struct omap_mcbsp *mcbsp;
 569
 570         if (!omap_mcbsp_check_valid_id(id)) {
 571                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 572                 return -ENODEV;
 573         }
 574         mcbsp = id_to_mcbsp_ptr(id);
 575
 576         return mcbsp->max_rx_thres;
 577 }
 578 EXPORT_SYMBOL(omap_mcbsp_get_max_rx_threshold);
 579
 580 u16 omap_mcbsp_get_fifo_size(unsigned int id)
 581 {
 582         struct omap_mcbsp *mcbsp;
 583
 584         if (!omap_mcbsp_check_valid_id(id)) {
 585                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 586                 return -ENODEV;
 587         }
 588         mcbsp = id_to_mcbsp_ptr(id);
 589
 590         return mcbsp->pdata->buffer_size;
 591 }
 592 EXPORT_SYMBOL(omap_mcbsp_get_fifo_size);
 593
 594 /*
 595  * omap_mcbsp_get_tx_delay returns the number of used slots in the McBSP FIFO
 596  */
 597 u16 omap_mcbsp_get_tx_delay(unsigned int id)
 598 {
 599         struct omap_mcbsp *mcbsp;
 600         u16 buffstat;
 601
 602         if (!omap_mcbsp_check_valid_id(id)) {
 603                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 604                 return -ENODEV;
 605         }
 606         mcbsp = id_to_mcbsp_ptr(id);
 607         if (mcbsp->pdata->buffer_size == 0)
 608                 return 0;
 609
 610         /* Returns the number of free locations in the buffer */
 611         buffstat = MCBSP_READ(mcbsp, XBUFFSTAT);
 612
 613         /* Number of slots are different in McBSP ports */
 614         return mcbsp->pdata->buffer_size - buffstat;
 615 }
 616 EXPORT_SYMBOL(omap_mcbsp_get_tx_delay);
 617
 618 /*
 619  * omap_mcbsp_get_rx_delay returns the number of free slots in the McBSP FIFO
 620  * to reach the threshold value (when the DMA will be triggered to read it)
 621  */
 622 u16 omap_mcbsp_get_rx_delay(unsigned int id)
 623 {
 624         struct omap_mcbsp *mcbsp;
 625         u16 buffstat, threshold;
 626
 627         if (!omap_mcbsp_check_valid_id(id)) {
 628                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 629                 return -ENODEV;
 630         }
 631         mcbsp = id_to_mcbsp_ptr(id);
 632         if (mcbsp->pdata->buffer_size == 0)
 633                 return 0;
 634
 635         /* Returns the number of used locations in the buffer */
 636         buffstat = MCBSP_READ(mcbsp, RBUFFSTAT);
 637         /* RX threshold */
 638         threshold = MCBSP_READ(mcbsp, THRSH1);
 639
 640         /* Return the number of location till we reach the threshold limit */
 641         if (threshold <= buffstat)
 642                 return 0;
 643         else
 644                 return threshold - buffstat;
 645 }
 646 EXPORT_SYMBOL(omap_mcbsp_get_rx_delay);
 647
 648 /*
 649  * omap_mcbsp_get_dma_op_mode just return the current configured
 650  * operating mode for the mcbsp channel
 651  */
 652 int omap_mcbsp_get_dma_op_mode(unsigned int id)
 653 {
 654         struct omap_mcbsp *mcbsp;
 655         int dma_op_mode;
 656
 657         if (!omap_mcbsp_check_valid_id(id)) {
 658                 printk(KERN_ERR "%s: Invalid id (%u)\n", __func__, id + 1);
 659                 return -ENODEV;
 660         }
 661         mcbsp = id_to_mcbsp_ptr(id);
 662
 663         dma_op_mode = mcbsp->dma_op_mode;
 664
 665         return dma_op_mode;
 666 }
 667 EXPORT_SYMBOL(omap_mcbsp_get_dma_op_mode);
 668
 669 int omap_mcbsp_request(unsigned int id)
 670 {
 671         struct omap_mcbsp *mcbsp;
 672         void *reg_cache;
 673         int err;
 674
 675         if (!omap_mcbsp_check_valid_id(id)) {
 676                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 677                 return -ENODEV;
 678         }
 679         mcbsp = id_to_mcbsp_ptr(id);
 680
 681         reg_cache = kzalloc(mcbsp->reg_cache_size, GFP_KERNEL);
 682         if (!reg_cache) {
 683                 return -ENOMEM;
 684         }
 685
 686         spin_lock(&mcbsp->lock);
 687         if (!mcbsp->free) {
 688                 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
 689                         mcbsp->id);
 690                 err = -EBUSY;
 691                 goto err_kfree;
 692         }
 693
 694         mcbsp->free = false;
 695         mcbsp->reg_cache = reg_cache;
 696         spin_unlock(&mcbsp->lock);
 697
 698         if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request)
 699                 mcbsp->pdata->ops->request(id);
 700
 701         pm_runtime_get_sync(mcbsp->dev);
 702
 703         /* Enable wakeup behavior */
 704         if (mcbsp->pdata->has_wakeup)
 705                 MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN);
 706
 707         /*
 708          * Make sure that transmitter, receiver and sample-rate generator are
 709          * not running before activating IRQs.
 710          */
 711         MCBSP_WRITE(mcbsp, SPCR1, 0);
 712         MCBSP_WRITE(mcbsp, SPCR2, 0);
 713
 714         err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler,
 715                                 0, "McBSP", (void *)mcbsp);
 716         if (err != 0) {
 717                 dev_err(mcbsp->dev, "Unable to request TX IRQ %d "
 718                                 "for McBSP%d\n", mcbsp->tx_irq,
 719                                 mcbsp->id);
 720                 goto err_clk_disable;
 721         }
 722
 723         if (mcbsp->rx_irq) {
 724                 err = request_irq(mcbsp->rx_irq,
 725                                 omap_mcbsp_rx_irq_handler,
 726                                 0, "McBSP", (void *)mcbsp);
 727                 if (err != 0) {
 728                         dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
 729                                         "for McBSP%d\n", mcbsp->rx_irq,
 730                                         mcbsp->id);
 731                         goto err_free_irq;
 732                 }
 733         }
 734
 735         return 0;
 736 err_free_irq:
 737         free_irq(mcbsp->tx_irq, (void *)mcbsp);
 738 err_clk_disable:
 739         if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
 740                 mcbsp->pdata->ops->free(id);
 741
 742         /* Disable wakeup behavior */
 743         if (mcbsp->pdata->has_wakeup)
 744                 MCBSP_WRITE(mcbsp, WAKEUPEN, 0);
 745
 746         pm_runtime_put_sync(mcbsp->dev);
 747
 748         spin_lock(&mcbsp->lock);
 749         mcbsp->free = true;
 750         mcbsp->reg_cache = NULL;
 751 err_kfree:
 752         spin_unlock(&mcbsp->lock);
 753         kfree(reg_cache);
 754
 755         return err;
 756 }
 757 EXPORT_SYMBOL(omap_mcbsp_request);
 758
 759 void omap_mcbsp_free(unsigned int id)
 760 {
 761         struct omap_mcbsp *mcbsp;
 762         void *reg_cache;
 763
 764         if (!omap_mcbsp_check_valid_id(id)) {
 765                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 766                 return;
 767         }
 768         mcbsp = id_to_mcbsp_ptr(id);
 769
 770         if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
 771                 mcbsp->pdata->ops->free(id);
 772
 773         /* Disable wakeup behavior */
 774         if (mcbsp->pdata->has_wakeup)
 775                 MCBSP_WRITE(mcbsp, WAKEUPEN, 0);
 776
 777         pm_runtime_put_sync(mcbsp->dev);
 778
 779         if (mcbsp->rx_irq)
 780                 free_irq(mcbsp->rx_irq, (void *)mcbsp);
 781         free_irq(mcbsp->tx_irq, (void *)mcbsp);
 782
 783         reg_cache = mcbsp->reg_cache;
 784
 785         spin_lock(&mcbsp->lock);
 786         if (mcbsp->free)
 787                 dev_err(mcbsp->dev, "McBSP%d was not reserved\n", mcbsp->id);
 788         else
 789                 mcbsp->free = true;
 790         mcbsp->reg_cache = NULL;
 791         spin_unlock(&mcbsp->lock);
 792
 793         if (reg_cache)
 794                 kfree(reg_cache);
 795 }
 796 EXPORT_SYMBOL(omap_mcbsp_free);
 797
 798 /*
 799  * Here we start the McBSP, by enabling transmitter, receiver or both.
 800  * If no transmitter or receiver is active prior calling, then sample-rate
 801  * generator and frame sync are started.
 802  */
 803 void omap_mcbsp_start(unsigned int id, int tx, int rx)
 804 {
 805         struct omap_mcbsp *mcbsp;
 806         int enable_srg = 0;
 807         u16 w;
 808
 809         if (!omap_mcbsp_check_valid_id(id)) {
 810                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 811                 return;
 812         }
 813         mcbsp = id_to_mcbsp_ptr(id);
 814
 815         if (cpu_is_omap34xx())
 816                 omap_st_start(mcbsp);
 817
 818         /* Only enable SRG, if McBSP is master */
 819         w = MCBSP_READ_CACHE(mcbsp, PCR0);
 820         if (w & (FSXM | FSRM | CLKXM | CLKRM))
 821                 enable_srg = !((MCBSP_READ_CACHE(mcbsp, SPCR2) |
 822                                 MCBSP_READ_CACHE(mcbsp, SPCR1)) & 1);
 823
 824         if (enable_srg) {
 825                 /* Start the sample generator */
 826                 w = MCBSP_READ_CACHE(mcbsp, SPCR2);
 827                 MCBSP_WRITE(mcbsp, SPCR2, w | (1 << 6));
 828         }
 829
 830         /* Enable transmitter and receiver */
 831         tx &= 1;
 832         w = MCBSP_READ_CACHE(mcbsp, SPCR2);
 833         MCBSP_WRITE(mcbsp, SPCR2, w | tx);
 834
 835         rx &= 1;
 836         w = MCBSP_READ_CACHE(mcbsp, SPCR1);
 837         MCBSP_WRITE(mcbsp, SPCR1, w | rx);
 838
 839         /*
 840          * Worst case: CLKSRG*2 = 8000khz: (1/8000) * 2 * 2 usec
 841          * REVISIT: 100us may give enough time for two CLKSRG, however
 842          * due to some unknown PM related, clock gating etc. reason it
 843          * is now at 500us.
 844          */
 845         udelay(500);
 846
 847         if (enable_srg) {
 848                 /* Start frame sync */
 849                 w = MCBSP_READ_CACHE(mcbsp, SPCR2);
 850                 MCBSP_WRITE(mcbsp, SPCR2, w | (1 << 7));
 851         }
 852
 853         if (mcbsp->pdata->has_ccr) {
 854                 /* Release the transmitter and receiver */
 855                 w = MCBSP_READ_CACHE(mcbsp, XCCR);
 856                 w &= ~(tx ? XDISABLE : 0);
 857                 MCBSP_WRITE(mcbsp, XCCR, w);
 858                 w = MCBSP_READ_CACHE(mcbsp, RCCR);
 859                 w &= ~(rx ? RDISABLE : 0);
 860                 MCBSP_WRITE(mcbsp, RCCR, w);
 861         }
 862
 863         /* Dump McBSP Regs */
 864         omap_mcbsp_dump_reg(id);
 865 }
 866 EXPORT_SYMBOL(omap_mcbsp_start);
 867
 868 void omap_mcbsp_stop(unsigned int id, int tx, int rx)
 869 {
 870         struct omap_mcbsp *mcbsp;
 871         int idle;
 872         u16 w;
 873
 874         if (!omap_mcbsp_check_valid_id(id)) {
 875                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 876                 return;
 877         }
 878
 879         mcbsp = id_to_mcbsp_ptr(id);
 880
 881         /* Reset transmitter */
 882         tx &= 1;
 883         if (mcbsp->pdata->has_ccr) {
 884                 w = MCBSP_READ_CACHE(mcbsp, XCCR);
 885                 w |= (tx ? XDISABLE : 0);
 886                 MCBSP_WRITE(mcbsp, XCCR, w);
 887         }
 888         w = MCBSP_READ_CACHE(mcbsp, SPCR2);
 889         MCBSP_WRITE(mcbsp, SPCR2, w & ~tx);
 890
 891         /* Reset receiver */
 892         rx &= 1;
 893         if (mcbsp->pdata->has_ccr) {
 894                 w = MCBSP_READ_CACHE(mcbsp, RCCR);
 895                 w |= (rx ? RDISABLE : 0);
 896                 MCBSP_WRITE(mcbsp, RCCR, w);
 897         }
 898         w = MCBSP_READ_CACHE(mcbsp, SPCR1);
 899         MCBSP_WRITE(mcbsp, SPCR1, w & ~rx);
 900
 901         idle = !((MCBSP_READ_CACHE(mcbsp, SPCR2) |
 902                         MCBSP_READ_CACHE(mcbsp, SPCR1)) & 1);
 903
 904         if (idle) {
 905                 /* Reset the sample rate generator */
 906                 w = MCBSP_READ_CACHE(mcbsp, SPCR2);
 907                 MCBSP_WRITE(mcbsp, SPCR2, w & ~(1 << 6));
 908         }
 909
 910         if (cpu_is_omap34xx())
 911                 omap_st_stop(mcbsp);
 912 }
 913 EXPORT_SYMBOL(omap_mcbsp_stop);
 914
 915 /*
 916  * The following functions are only required on an OMAP1-only build.
 917  * mach-omap2/mcbsp.c contains the real functions
 918  */
 919 #ifndef CONFIG_ARCH_OMAP2PLUS
 920 int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id)
 921 {
 922         WARN(1, "%s: should never be called on an OMAP1-only kernel\n",
 923              __func__);
 924         return -EINVAL;
 925 }
 926
 927 void omap2_mcbsp1_mux_clkr_src(u8 mux)
 928 {
 929         WARN(1, "%s: should never be called on an OMAP1-only kernel\n",
 930              __func__);
 931         return;
 932 }
 933
 934 void omap2_mcbsp1_mux_fsr_src(u8 mux)
 935 {
 936         WARN(1, "%s: should never be called on an OMAP1-only kernel\n",
 937              __func__);
 938         return;
 939 }
 940 #endif
 941
 942 #define max_thres(m)                    (mcbsp->pdata->buffer_size)
 943 #define valid_threshold(m, val)         ((val) <= max_thres(m))
 944 #define THRESHOLD_PROP_BUILDER(prop)                                    \
 945 static ssize_t prop##_show(struct device *dev,                          \
 946                         struct device_attribute *attr, char *buf)       \
 947 {                                                                       \
 948         struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);                \
 949                                                                         \
 950         return sprintf(buf, "%u\n", mcbsp->prop);                       \
 951 }                                                                       \
 952                                                                         \
 953 static ssize_t prop##_store(struct device *dev,                         \
 954                                 struct device_attribute *attr,          \
 955                                 const char *buf, size_t size)           \
 956 {                                                                       \
 957         struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);                \
 958         unsigned long val;                                              \
 959         int status;                                                     \
 960                                                                         \
 961         status = strict_strtoul(buf, 0, &val);                          \
 962         if (status)                                                     \
 963                 return status;                                          \
 964                                                                         \
 965         if (!valid_threshold(mcbsp, val))                               \
 966                 return -EDOM;                                           \
 967                                                                         \
 968         mcbsp->prop = val;                                              \
 969         return size;                                                    \
 970 }                                                                       \
 971                                                                         \
 972 static DEVICE_ATTR(prop, 0644, prop##_show, prop##_store);
 973
 974 THRESHOLD_PROP_BUILDER(max_tx_thres);
 975 THRESHOLD_PROP_BUILDER(max_rx_thres);
 976
 977 static const char *dma_op_modes[] = {
 978         "element", "threshold", "frame",
 979 };
 980
 981 static ssize_t dma_op_mode_show(struct device *dev,
 982                         struct device_attribute *attr, char *buf)
 983 {
 984         struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);
 985         int dma_op_mode, i = 0;
 986         ssize_t len = 0;
 987         const char * const *s;
 988
 989         dma_op_mode = mcbsp->dma_op_mode;
 990
 991         for (s = &dma_op_modes[i]; i < ARRAY_SIZE(dma_op_modes); s++, i++) {
 992                 if (dma_op_mode == i)
 993                         len += sprintf(buf + len, "[%s] ", *s);
 994                 else
 995                         len += sprintf(buf + len, "%s ", *s);
 996         }
 997         len += sprintf(buf + len, "\n");
 998
 999         return len;
1000 }
1001
1002 static ssize_t dma_op_mode_store(struct device *dev,
1003                                 struct device_attribute *attr,
1004                                 const char *buf, size_t size)
1005 {
1006         struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);
1007         const char * const *s;
1008         int i = 0;
1009
1010         for (s = &dma_op_modes[i]; i < ARRAY_SIZE(dma_op_modes); s++, i++)
1011                 if (sysfs_streq(buf, *s))
1012                         break;
1013
1014         if (i == ARRAY_SIZE(dma_op_modes))
1015                 return -EINVAL;
1016
1017         spin_lock_irq(&mcbsp->lock);
1018         if (!mcbsp->free) {
1019                 size = -EBUSY;
1020                 goto unlock;
1021         }
1022         mcbsp->dma_op_mode = i;
1023
1024 unlock:
1025         spin_unlock_irq(&mcbsp->lock);
1026
1027         return size;
1028 }
1029
1030 static DEVICE_ATTR(dma_op_mode, 0644, dma_op_mode_show, dma_op_mode_store);
1031
1032 static const struct attribute *additional_attrs[] = {
1033         &dev_attr_max_tx_thres.attr,
1034         &dev_attr_max_rx_thres.attr,
1035         &dev_attr_dma_op_mode.attr,
1036         NULL,
1037 };
1038
1039 static const struct attribute_group additional_attr_group = {
1040         .attrs = (struct attribute **)additional_attrs,
1041 };
1042
1043 #ifdef CONFIG_ARCH_OMAP3
1044 static ssize_t st_taps_show(struct device *dev,
1045                             struct device_attribute *attr, char *buf)
1046 {
1047         struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);
1048         struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
1049         ssize_t status = 0;
1050         int i;
1051
1052         spin_lock_irq(&mcbsp->lock);
1053         for (i = 0; i < st_data->nr_taps; i++)
1054                 status += sprintf(&buf[status], (i ? ", %d" : "%d"),
1055                                   st_data->taps[i]);
1056         if (i)
1057                 status += sprintf(&buf[status], "\n");
1058         spin_unlock_irq(&mcbsp->lock);
1059
1060         return status;
1061 }
1062
1063 static ssize_t st_taps_store(struct device *dev,
1064                              struct device_attribute *attr,
1065                              const char *buf, size_t size)
1066 {
1067         struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);
1068         struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
1069         int val, tmp, status, i = 0;
1070
1071         spin_lock_irq(&mcbsp->lock);
1072         memset(st_data->taps, 0, sizeof(st_data->taps));
1073         st_data->nr_taps = 0;
1074
1075         do {
1076                 status = sscanf(buf, "%d%n", &val, &tmp);
1077                 if (status < 0 || status == 0) {
1078                         size = -EINVAL;
1079                         goto out;
1080                 }
1081                 if (val < -32768 || val > 32767) {
1082                         size = -EINVAL;
1083                         goto out;
1084                 }
1085                 st_data->taps[i++] = val;
1086                 buf += tmp;
1087                 if (*buf != ',')
1088                         break;
1089                 buf++;
1090         } while (1);
1091
1092         st_data->nr_taps = i;
1093
1094 out:
1095         spin_unlock_irq(&mcbsp->lock);
1096
1097         return size;
1098 }
1099
1100 static DEVICE_ATTR(st_taps, 0644, st_taps_show, st_taps_store);
1101
1102 static const struct attribute *sidetone_attrs[] = {
1103         &dev_attr_st_taps.attr,
1104         NULL,
1105 };
1106
1107 static const struct attribute_group sidetone_attr_group = {
1108         .attrs = (struct attribute **)sidetone_attrs,
1109 };
1110
1111 static int __devinit omap_st_add(struct omap_mcbsp *mcbsp)
1112 {
1113         struct platform_device *pdev;
1114         struct resource *res;
1115         struct omap_mcbsp_st_data *st_data;
1116         int err;
1117
1118         st_data = kzalloc(sizeof(*mcbsp->st_data), GFP_KERNEL);
1119         if (!st_data) {
1120                 err = -ENOMEM;
1121                 goto err1;
1122         }
1123
1124         pdev = container_of(mcbsp->dev, struct platform_device, dev);
1125
1126         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sidetone");
1127         st_data->io_base_st = ioremap(res->start, resource_size(res));
1128         if (!st_data->io_base_st) {
1129                 err = -ENOMEM;
1130                 goto err2;
1131         }
1132
1133         err = sysfs_create_group(&mcbsp->dev->kobj, &sidetone_attr_group);
1134         if (err)
1135                 goto err3;
1136
1137         mcbsp->st_data = st_data;
1138         return 0;
1139
1140 err3:
1141         iounmap(st_data->io_base_st);
1142 err2:
1143         kfree(st_data);
1144 err1:
1145         return err;
1146
1147 }
1148
1149 static void __devexit omap_st_remove(struct omap_mcbsp *mcbsp)
1150 {
1151         struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
1152
1153         if (st_data) {
1154                 sysfs_remove_group(&mcbsp->dev->kobj, &sidetone_attr_group);
1155                 iounmap(st_data->io_base_st);
1156                 kfree(st_data);
1157         }
1158 }
1159
1160 static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp)
1161 {
1162         if (cpu_is_omap34xx())
1163                 if (mcbsp->id == 2 || mcbsp->id == 3)
1164                         if (omap_st_add(mcbsp))
1165                                 dev_warn(mcbsp->dev,
1166                                  "Unable to create sidetone controls\n");
1167 }
1168
1169 static inline void __devexit omap34xx_device_exit(struct omap_mcbsp *mcbsp)
1170 {
1171         if (cpu_is_omap34xx())
1172                 if (mcbsp->id == 2 || mcbsp->id == 3)
1173                         omap_st_remove(mcbsp);
1174 }
1175 #else
1176 static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp) {}
1177 static inline void __devexit omap34xx_device_exit(struct omap_mcbsp *mcbsp) {}
1178 #endif /* CONFIG_ARCH_OMAP3 */
1179
1180 /*
1181  * McBSP1 and McBSP3 are directly mapped on 1610 and 1510.
1182  * 730 has only 2 McBSP, and both of them are MPU peripherals.
1183  */
1184 static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
1185 {
1186         struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
1187         struct omap_mcbsp *mcbsp;
1188         int id = pdev->id - 1;
1189         struct resource *res;
1190         int ret = 0;
1191
1192         if (!pdata) {
1193                 dev_err(&pdev->dev, "McBSP device initialized without"
1194                                 "platform data\n");
1195                 ret = -EINVAL;
1196                 goto exit;
1197         }
1198
1199         dev_dbg(&pdev->dev, "Initializing OMAP McBSP (%d).\n", pdev->id);
1200
1201         if (id >= omap_mcbsp_count) {
1202                 dev_err(&pdev->dev, "Invalid McBSP device id (%d)\n", id);
1203                 ret = -EINVAL;
1204                 goto exit;
1205         }
1206
1207         mcbsp = kzalloc(sizeof(struct omap_mcbsp), GFP_KERNEL);
1208         if (!mcbsp) {
1209                 ret = -ENOMEM;
1210                 goto exit;
1211         }
1212
1213         spin_lock_init(&mcbsp->lock);
1214         mcbsp->id = id + 1;
1215         mcbsp->free = true;
1216
1217         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu");
1218         if (!res) {
1219                 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1220                 if (!res) {
1221                         dev_err(&pdev->dev, "%s:mcbsp%d has invalid memory"
1222                                         "resource\n", __func__, pdev->id);
1223                         ret = -ENOMEM;
1224                         goto exit;
1225                 }
1226         }
1227         mcbsp->phys_base = res->start;
1228         mcbsp->reg_cache_size = resource_size(res);
1229         mcbsp->io_base = ioremap(res->start, resource_size(res));
1230         if (!mcbsp->io_base) {
1231                 ret = -ENOMEM;
1232                 goto err_ioremap;
1233         }
1234
1235         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma");
1236         if (!res)
1237                 mcbsp->phys_dma_base = mcbsp->phys_base;
1238         else
1239                 mcbsp->phys_dma_base = res->start;
1240
1241         mcbsp->tx_irq = platform_get_irq_byname(pdev, "tx");
1242         mcbsp->rx_irq = platform_get_irq_byname(pdev, "rx");
1243
1244         /* From OMAP4 there will be a single irq line */
1245         if (mcbsp->tx_irq == -ENXIO)
1246                 mcbsp->tx_irq = platform_get_irq(pdev, 0);
1247
1248         res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx");
1249         if (!res) {
1250                 dev_err(&pdev->dev, "%s:mcbsp%d has invalid rx DMA channel\n",
1251                                         __func__, pdev->id);
1252                 ret = -ENODEV;
1253                 goto err_res;
1254         }
1255         mcbsp->dma_rx_sync = res->start;
1256
1257         res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx");
1258         if (!res) {
1259                 dev_err(&pdev->dev, "%s:mcbsp%d has invalid tx DMA channel\n",
1260                                         __func__, pdev->id);
1261                 ret = -ENODEV;
1262                 goto err_res;
1263         }
1264         mcbsp->dma_tx_sync = res->start;
1265
1266         mcbsp->fclk = clk_get(&pdev->dev, "fck");
1267         if (IS_ERR(mcbsp->fclk)) {
1268                 ret = PTR_ERR(mcbsp->fclk);
1269                 dev_err(&pdev->dev, "unable to get fck: %d\n", ret);
1270                 goto err_res;
1271         }
1272
1273         mcbsp->pdata = pdata;
1274         mcbsp->dev = &pdev->dev;
1275         mcbsp_ptr[id] = mcbsp;
1276         platform_set_drvdata(pdev, mcbsp);
1277         pm_runtime_enable(mcbsp->dev);
1278
1279         mcbsp->dma_op_mode = MCBSP_DMA_MODE_ELEMENT;
1280         if (mcbsp->pdata->buffer_size) {
1281                 /*
1282                  * Initially configure the maximum thresholds to a safe value.
1283                  * The McBSP FIFO usage with these values should not go under
1284                  * 16 locations.
1285                  * If the whole FIFO without safety buffer is used, than there
1286                  * is a possibility that the DMA will be not able to push the
1287                  * new data on time, causing channel shifts in runtime.
1288                  */
1289                 mcbsp->max_tx_thres = max_thres(mcbsp) - 0x10;
1290                 mcbsp->max_rx_thres = max_thres(mcbsp) - 0x10;
1291
1292                 ret = sysfs_create_group(&mcbsp->dev->kobj,
1293                                          &additional_attr_group);
1294                 if (ret) {
1295                         dev_err(mcbsp->dev,
1296                                 "Unable to create additional controls\n");
1297                         goto err_thres;
1298                 }
1299         } else {
1300                 mcbsp->max_tx_thres = -EINVAL;
1301                 mcbsp->max_rx_thres = -EINVAL;
1302         }
1303
1304         /* Initialize mcbsp properties for OMAP34XX if needed / applicable */
1305         omap34xx_device_init(mcbsp);
1306
1307         return 0;
1308
1309 err_thres:
1310         clk_put(mcbsp->fclk);
1311 err_res:
1312         iounmap(mcbsp->io_base);
1313 err_ioremap:
1314         kfree(mcbsp);
1315 exit:
1316         return ret;
1317 }
1318
1319 static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
1320 {
1321         struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev);
1322
1323         platform_set_drvdata(pdev, NULL);
1324         if (mcbsp) {
1325
1326                 if (mcbsp->pdata && mcbsp->pdata->ops &&
1327                                 mcbsp->pdata->ops->free)
1328                         mcbsp->pdata->ops->free(mcbsp->id);
1329
1330                 if (mcbsp->pdata->buffer_size)
1331                         sysfs_remove_group(&mcbsp->dev->kobj,
1332                                            &additional_attr_group);
1333
1334                 omap34xx_device_exit(mcbsp);
1335
1336                 clk_put(mcbsp->fclk);
1337
1338                 iounmap(mcbsp->io_base);
1339                 kfree(mcbsp);
1340         }
1341
1342         return 0;
1343 }
1344
1345 static struct platform_driver omap_mcbsp_driver = {
1346         .probe          = omap_mcbsp_probe,
1347         .remove         = __devexit_p(omap_mcbsp_remove),
1348         .driver         = {
1349                 .name   = "omap-mcbsp",
1350         },
1351 };
1352
1353 int __init omap_mcbsp_init(void)
1354 {
1355         /* Register the McBSP driver */
1356         return platform_driver_register(&omap_mcbsp_driver);
1357 }