arch/arm/plat-omap/mcbsp.c

   1 /*
   2  * linux/arch/arm/plat-omap/mcbsp.c
   3  *
   4  * Copyright (C) 2004 Nokia Corporation
   5  * Author: Samuel Ortiz <samuel.ortiz@nokia.com>
   6  *
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * Multichannel mode not supported.
  13  */
  14
  15 #include <linux/module.h>
  16 #include <linux/init.h>
  17 #include <linux/device.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/wait.h>
  20 #include <linux/completion.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/err.h>
  23 #include <linux/clk.h>
  24 #include <linux/delay.h>
  25 #include <linux/io.h>
  26
  27 #include <mach/dma.h>
  28 #include <mach/mcbsp.h>
  29
  30 struct omap_mcbsp **mcbsp_ptr;
  31 int omap_mcbsp_count;
  32
  33 void omap_mcbsp_write(void __iomem *io_base, u16 reg, u32 val)
  34 {
  35         if (cpu_class_is_omap1() || cpu_is_omap2420())
  36                 __raw_writew((u16)val, io_base + reg);
  37         else
  38                 __raw_writel(val, io_base + reg);
  39 }
  40
  41 int omap_mcbsp_read(void __iomem *io_base, u16 reg)
  42 {
  43         if (cpu_class_is_omap1() || cpu_is_omap2420())
  44                 return __raw_readw(io_base + reg);
  45         else
  46                 return __raw_readl(io_base + reg);
  47 }
  48
  49 #define OMAP_MCBSP_READ(base, reg) \
  50                         omap_mcbsp_read(base, OMAP_MCBSP_REG_##reg)
  51 #define OMAP_MCBSP_WRITE(base, reg, val) \
  52                         omap_mcbsp_write(base, OMAP_MCBSP_REG_##reg, val)
  53
  54 #define omap_mcbsp_check_valid_id(id)   (id < omap_mcbsp_count)
  55 #define id_to_mcbsp_ptr(id)             mcbsp_ptr[id];
  56
  57 static void omap_mcbsp_dump_reg(u8 id)
  58 {
  59         struct omap_mcbsp *mcbsp = id_to_mcbsp_ptr(id);
  60
  61         dev_dbg(mcbsp->dev, "**** McBSP%d regs ****\n", mcbsp->id);
  62         dev_dbg(mcbsp->dev, "DRR2:  0x%04x\n",
  63                         OMAP_MCBSP_READ(mcbsp->io_base, DRR2));
  64         dev_dbg(mcbsp->dev, "DRR1:  0x%04x\n",
  65                         OMAP_MCBSP_READ(mcbsp->io_base, DRR1));
  66         dev_dbg(mcbsp->dev, "DXR2:  0x%04x\n",
  67                         OMAP_MCBSP_READ(mcbsp->io_base, DXR2));
  68         dev_dbg(mcbsp->dev, "DXR1:  0x%04x\n",
  69                         OMAP_MCBSP_READ(mcbsp->io_base, DXR1));
  70         dev_dbg(mcbsp->dev, "SPCR2: 0x%04x\n",
  71                         OMAP_MCBSP_READ(mcbsp->io_base, SPCR2));
  72         dev_dbg(mcbsp->dev, "SPCR1: 0x%04x\n",
  73                         OMAP_MCBSP_READ(mcbsp->io_base, SPCR1));
  74         dev_dbg(mcbsp->dev, "RCR2:  0x%04x\n",
  75                         OMAP_MCBSP_READ(mcbsp->io_base, RCR2));
  76         dev_dbg(mcbsp->dev, "RCR1:  0x%04x\n",
  77                         OMAP_MCBSP_READ(mcbsp->io_base, RCR1));
  78         dev_dbg(mcbsp->dev, "XCR2:  0x%04x\n",
  79                         OMAP_MCBSP_READ(mcbsp->io_base, XCR2));
  80         dev_dbg(mcbsp->dev, "XCR1:  0x%04x\n",
  81                         OMAP_MCBSP_READ(mcbsp->io_base, XCR1));
  82         dev_dbg(mcbsp->dev, "SRGR2: 0x%04x\n",
  83                         OMAP_MCBSP_READ(mcbsp->io_base, SRGR2));
  84         dev_dbg(mcbsp->dev, "SRGR1: 0x%04x\n",
  85                         OMAP_MCBSP_READ(mcbsp->io_base, SRGR1));
  86         dev_dbg(mcbsp->dev, "PCR0:  0x%04x\n",
  87                         OMAP_MCBSP_READ(mcbsp->io_base, PCR0));
  88         dev_dbg(mcbsp->dev, "***********************\n");
  89 }
  90
  91 static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
  92 {
  93         struct omap_mcbsp *mcbsp_tx = dev_id;
  94         u16 irqst_spcr2;
  95
  96         irqst_spcr2 = OMAP_MCBSP_READ(mcbsp_tx->io_base, SPCR2);
  97         dev_dbg(mcbsp_tx->dev, "TX IRQ callback : 0x%x\n", irqst_spcr2);
  98
  99         if (irqst_spcr2 & XSYNC_ERR) {
 100                 dev_err(mcbsp_tx->dev, "TX Frame Sync Error! : 0x%x\n",
 101                         irqst_spcr2);
 102                 /* Writing zero to XSYNC_ERR clears the IRQ */
 103                 OMAP_MCBSP_WRITE(mcbsp_tx->io_base, SPCR2,
 104                         irqst_spcr2 & ~(XSYNC_ERR));
 105         } else {
 106                 complete(&mcbsp_tx->tx_irq_completion);
 107         }
 108
 109         return IRQ_HANDLED;
 110 }
 111
 112 static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
 113 {
 114         struct omap_mcbsp *mcbsp_rx = dev_id;
 115         u16 irqst_spcr1;
 116
 117         irqst_spcr1 = OMAP_MCBSP_READ(mcbsp_rx->io_base, SPCR1);
 118         dev_dbg(mcbsp_rx->dev, "RX IRQ callback : 0x%x\n", irqst_spcr1);
 119
 120         if (irqst_spcr1 & RSYNC_ERR) {
 121                 dev_err(mcbsp_rx->dev, "RX Frame Sync Error! : 0x%x\n",
 122                         irqst_spcr1);
 123                 /* Writing zero to RSYNC_ERR clears the IRQ */
 124                 OMAP_MCBSP_WRITE(mcbsp_rx->io_base, SPCR1,
 125                         irqst_spcr1 & ~(RSYNC_ERR));
 126         } else {
 127                 complete(&mcbsp_rx->tx_irq_completion);
 128         }
 129
 130         return IRQ_HANDLED;
 131 }
 132
 133 static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data)
 134 {
 135         struct omap_mcbsp *mcbsp_dma_tx = data;
 136
 137         dev_dbg(mcbsp_dma_tx->dev, "TX DMA callback : 0x%x\n",
 138                 OMAP_MCBSP_READ(mcbsp_dma_tx->io_base, SPCR2));
 139
 140         /* We can free the channels */
 141         omap_free_dma(mcbsp_dma_tx->dma_tx_lch);
 142         mcbsp_dma_tx->dma_tx_lch = -1;
 143
 144         complete(&mcbsp_dma_tx->tx_dma_completion);
 145 }
 146
 147 static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data)
 148 {
 149         struct omap_mcbsp *mcbsp_dma_rx = data;
 150
 151         dev_dbg(mcbsp_dma_rx->dev, "RX DMA callback : 0x%x\n",
 152                 OMAP_MCBSP_READ(mcbsp_dma_rx->io_base, SPCR2));
 153
 154         /* We can free the channels */
 155         omap_free_dma(mcbsp_dma_rx->dma_rx_lch);
 156         mcbsp_dma_rx->dma_rx_lch = -1;
 157
 158         complete(&mcbsp_dma_rx->rx_dma_completion);
 159 }
 160
 161 /*
 162  * omap_mcbsp_config simply write a config to the
 163  * appropriate McBSP.
 164  * You either call this function or set the McBSP registers
 165  * by yourself before calling omap_mcbsp_start().
 166  */
 167 void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config)
 168 {
 169         struct omap_mcbsp *mcbsp;
 170         void __iomem *io_base;
 171
 172         if (!omap_mcbsp_check_valid_id(id)) {
 173                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 174                 return;
 175         }
 176         mcbsp = id_to_mcbsp_ptr(id);
 177
 178         io_base = mcbsp->io_base;
 179         dev_dbg(mcbsp->dev, "Configuring McBSP%d  phys_base: 0x%08lx\n",
 180                         mcbsp->id, mcbsp->phys_base);
 181
 182         /* We write the given config */
 183         OMAP_MCBSP_WRITE(io_base, SPCR2, config->spcr2);
 184         OMAP_MCBSP_WRITE(io_base, SPCR1, config->spcr1);
 185         OMAP_MCBSP_WRITE(io_base, RCR2, config->rcr2);
 186         OMAP_MCBSP_WRITE(io_base, RCR1, config->rcr1);
 187         OMAP_MCBSP_WRITE(io_base, XCR2, config->xcr2);
 188         OMAP_MCBSP_WRITE(io_base, XCR1, config->xcr1);
 189         OMAP_MCBSP_WRITE(io_base, SRGR2, config->srgr2);
 190         OMAP_MCBSP_WRITE(io_base, SRGR1, config->srgr1);
 191         OMAP_MCBSP_WRITE(io_base, MCR2, config->mcr2);
 192         OMAP_MCBSP_WRITE(io_base, MCR1, config->mcr1);
 193         OMAP_MCBSP_WRITE(io_base, PCR0, config->pcr0);
 194         if (cpu_is_omap2430() || cpu_is_omap34xx()) {
 195                 OMAP_MCBSP_WRITE(io_base, XCCR, config->xccr);
 196                 OMAP_MCBSP_WRITE(io_base, RCCR, config->rccr);
 197         }
 198 }
 199 EXPORT_SYMBOL(omap_mcbsp_config);
 200
 201 #ifdef CONFIG_ARCH_OMAP34XX
 202 /*
 203  * omap_mcbsp_set_tx_threshold configures how to deal
 204  * with transmit threshold. the threshold value and handler can be
 205  * configure in here.
 206  */
 207 void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold)
 208 {
 209         struct omap_mcbsp *mcbsp;
 210         void __iomem *io_base;
 211
 212         if (!cpu_is_omap34xx())
 213                 return;
 214
 215         if (!omap_mcbsp_check_valid_id(id)) {
 216                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 217                 return;
 218         }
 219         mcbsp = id_to_mcbsp_ptr(id);
 220         io_base = mcbsp->io_base;
 221
 222         OMAP_MCBSP_WRITE(io_base, THRSH2, threshold);
 223 }
 224 EXPORT_SYMBOL(omap_mcbsp_set_tx_threshold);
 225
 226 /*
 227  * omap_mcbsp_set_rx_threshold configures how to deal
 228  * with receive threshold. the threshold value and handler can be
 229  * configure in here.
 230  */
 231 void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold)
 232 {
 233         struct omap_mcbsp *mcbsp;
 234         void __iomem *io_base;
 235
 236         if (!cpu_is_omap34xx())
 237                 return;
 238
 239         if (!omap_mcbsp_check_valid_id(id)) {
 240                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 241                 return;
 242         }
 243         mcbsp = id_to_mcbsp_ptr(id);
 244         io_base = mcbsp->io_base;
 245
 246         OMAP_MCBSP_WRITE(io_base, THRSH1, threshold);
 247 }
 248 EXPORT_SYMBOL(omap_mcbsp_set_rx_threshold);
 249 #endif
 250
 251 /*
 252  * We can choose between IRQ based or polled IO.
 253  * This needs to be called before omap_mcbsp_request().
 254  */
 255 int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type)
 256 {
 257         struct omap_mcbsp *mcbsp;
 258
 259         if (!omap_mcbsp_check_valid_id(id)) {
 260                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 261                 return -ENODEV;
 262         }
 263         mcbsp = id_to_mcbsp_ptr(id);
 264
 265         spin_lock(&mcbsp->lock);
 266
 267         if (!mcbsp->free) {
 268                 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
 269                         mcbsp->id);
 270                 spin_unlock(&mcbsp->lock);
 271                 return -EINVAL;
 272         }
 273
 274         mcbsp->io_type = io_type;
 275
 276         spin_unlock(&mcbsp->lock);
 277
 278         return 0;
 279 }
 280 EXPORT_SYMBOL(omap_mcbsp_set_io_type);
 281
 282 int omap_mcbsp_request(unsigned int id)
 283 {
 284         struct omap_mcbsp *mcbsp;
 285         int err;
 286
 287         if (!omap_mcbsp_check_valid_id(id)) {
 288                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 289                 return -ENODEV;
 290         }
 291         mcbsp = id_to_mcbsp_ptr(id);
 292
 293         spin_lock(&mcbsp->lock);
 294         if (!mcbsp->free) {
 295                 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
 296                         mcbsp->id);
 297                 spin_unlock(&mcbsp->lock);
 298                 return -EBUSY;
 299         }
 300
 301         mcbsp->free = 0;
 302         spin_unlock(&mcbsp->lock);
 303
 304         if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request)
 305                 mcbsp->pdata->ops->request(id);
 306
 307         clk_enable(mcbsp->iclk);
 308         clk_enable(mcbsp->fclk);
 309
 310         /*
 311          * Make sure that transmitter, receiver and sample-rate generator are
 312          * not running before activating IRQs.
 313          */
 314         OMAP_MCBSP_WRITE(mcbsp->io_base, SPCR1, 0);
 315         OMAP_MCBSP_WRITE(mcbsp->io_base, SPCR2, 0);
 316
 317         if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
 318                 /* We need to get IRQs here */
 319                 init_completion(&mcbsp->tx_irq_completion);
 320                 err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler,
 321                                         0, "McBSP", (void *)mcbsp);
 322                 if (err != 0) {
 323                         dev_err(mcbsp->dev, "Unable to request TX IRQ %d "
 324                                         "for McBSP%d\n", mcbsp->tx_irq,
 325                                         mcbsp->id);
 326                         return err;
 327                 }
 328
 329                 init_completion(&mcbsp->rx_irq_completion);
 330                 err = request_irq(mcbsp->rx_irq, omap_mcbsp_rx_irq_handler,
 331                                         0, "McBSP", (void *)mcbsp);
 332                 if (err != 0) {
 333                         dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
 334                                         "for McBSP%d\n", mcbsp->rx_irq,
 335                                         mcbsp->id);
 336                         free_irq(mcbsp->tx_irq, (void *)mcbsp);
 337                         return err;
 338                 }
 339         }
 340
 341         return 0;
 342 }
 343 EXPORT_SYMBOL(omap_mcbsp_request);
 344
 345 void omap_mcbsp_free(unsigned int id)
 346 {
 347         struct omap_mcbsp *mcbsp;
 348
 349         if (!omap_mcbsp_check_valid_id(id)) {
 350                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 351                 return;
 352         }
 353         mcbsp = id_to_mcbsp_ptr(id);
 354
 355         if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
 356                 mcbsp->pdata->ops->free(id);
 357
 358         clk_disable(mcbsp->fclk);
 359         clk_disable(mcbsp->iclk);
 360
 361         if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
 362                 /* Free IRQs */
 363                 free_irq(mcbsp->rx_irq, (void *)mcbsp);
 364                 free_irq(mcbsp->tx_irq, (void *)mcbsp);
 365         }
 366
 367         spin_lock(&mcbsp->lock);
 368         if (mcbsp->free) {
 369                 dev_err(mcbsp->dev, "McBSP%d was not reserved\n",
 370                         mcbsp->id);
 371                 spin_unlock(&mcbsp->lock);
 372                 return;
 373         }
 374
 375         mcbsp->free = 1;
 376         spin_unlock(&mcbsp->lock);
 377 }
 378 EXPORT_SYMBOL(omap_mcbsp_free);
 379
 380 /*
 381  * Here we start the McBSP, by enabling transmitter, receiver or both.
 382  * If no transmitter or receiver is active prior calling, then sample-rate
 383  * generator and frame sync are started.
 384  */
 385 void omap_mcbsp_start(unsigned int id, int tx, int rx)
 386 {
 387         struct omap_mcbsp *mcbsp;
 388         void __iomem *io_base;
 389         int idle;
 390         u16 w;
 391
 392         if (!omap_mcbsp_check_valid_id(id)) {
 393                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 394                 return;
 395         }
 396         mcbsp = id_to_mcbsp_ptr(id);
 397         io_base = mcbsp->io_base;
 398
 399         mcbsp->rx_word_length = (OMAP_MCBSP_READ(io_base, RCR1) >> 5) & 0x7;
 400         mcbsp->tx_word_length = (OMAP_MCBSP_READ(io_base, XCR1) >> 5) & 0x7;
 401
 402         idle = !((OMAP_MCBSP_READ(io_base, SPCR2) |
 403                   OMAP_MCBSP_READ(io_base, SPCR1)) & 1);
 404
 405         if (idle) {
 406                 /* Start the sample generator */
 407                 w = OMAP_MCBSP_READ(io_base, SPCR2);
 408                 OMAP_MCBSP_WRITE(io_base, SPCR2, w | (1 << 6));
 409         }
 410
 411         /* Enable transmitter and receiver */
 412         w = OMAP_MCBSP_READ(io_base, SPCR2);
 413         OMAP_MCBSP_WRITE(io_base, SPCR2, w | (tx & 1));
 414
 415         w = OMAP_MCBSP_READ(io_base, SPCR1);
 416         OMAP_MCBSP_WRITE(io_base, SPCR1, w | (rx & 1));
 417
 418         /*
 419          * Worst case: CLKSRG*2 = 8000khz: (1/8000) * 2 * 2 usec
 420          * REVISIT: 100us may give enough time for two CLKSRG, however
 421          * due to some unknown PM related, clock gating etc. reason it
 422          * is now at 500us.
 423          */
 424         udelay(500);
 425
 426         if (idle) {
 427                 /* Start frame sync */
 428                 w = OMAP_MCBSP_READ(io_base, SPCR2);
 429                 OMAP_MCBSP_WRITE(io_base, SPCR2, w | (1 << 7));
 430         }
 431
 432         /* Dump McBSP Regs */
 433         omap_mcbsp_dump_reg(id);
 434 }
 435 EXPORT_SYMBOL(omap_mcbsp_start);
 436
 437 void omap_mcbsp_stop(unsigned int id, int tx, int rx)
 438 {
 439         struct omap_mcbsp *mcbsp;
 440         void __iomem *io_base;
 441         int idle;
 442         u16 w;
 443
 444         if (!omap_mcbsp_check_valid_id(id)) {
 445                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 446                 return;
 447         }
 448
 449         mcbsp = id_to_mcbsp_ptr(id);
 450         io_base = mcbsp->io_base;
 451
 452         /* Reset transmitter */
 453         w = OMAP_MCBSP_READ(io_base, SPCR2);
 454         OMAP_MCBSP_WRITE(io_base, SPCR2, w & ~(tx & 1));
 455
 456         /* Reset receiver */
 457         w = OMAP_MCBSP_READ(io_base, SPCR1);
 458         OMAP_MCBSP_WRITE(io_base, SPCR1, w & ~(rx & 1));
 459
 460         idle = !((OMAP_MCBSP_READ(io_base, SPCR2) |
 461                   OMAP_MCBSP_READ(io_base, SPCR1)) & 1);
 462
 463         if (idle) {
 464                 /* Reset the sample rate generator */
 465                 w = OMAP_MCBSP_READ(io_base, SPCR2);
 466                 OMAP_MCBSP_WRITE(io_base, SPCR2, w & ~(1 << 6));
 467         }
 468 }
 469 EXPORT_SYMBOL(omap_mcbsp_stop);
 470
 471 void omap_mcbsp_xmit_enable(unsigned int id, u8 enable)
 472 {
 473         struct omap_mcbsp *mcbsp;
 474         void __iomem *io_base;
 475         u16 w;
 476
 477         if (!(cpu_is_omap2430() || cpu_is_omap34xx()))
 478                 return;
 479
 480         if (!omap_mcbsp_check_valid_id(id)) {
 481                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 482                 return;
 483         }
 484
 485         mcbsp = id_to_mcbsp_ptr(id);
 486         io_base = mcbsp->io_base;
 487
 488         w = OMAP_MCBSP_READ(io_base, XCCR);
 489
 490         if (enable)
 491                 OMAP_MCBSP_WRITE(io_base, XCCR, w & ~(XDISABLE));
 492         else
 493                 OMAP_MCBSP_WRITE(io_base, XCCR, w | XDISABLE);
 494 }
 495 EXPORT_SYMBOL(omap_mcbsp_xmit_enable);
 496
 497 void omap_mcbsp_recv_enable(unsigned int id, u8 enable)
 498 {
 499         struct omap_mcbsp *mcbsp;
 500         void __iomem *io_base;
 501         u16 w;
 502
 503         if (!(cpu_is_omap2430() || cpu_is_omap34xx()))
 504                 return;
 505
 506         if (!omap_mcbsp_check_valid_id(id)) {
 507                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 508                 return;
 509         }
 510
 511         mcbsp = id_to_mcbsp_ptr(id);
 512         io_base = mcbsp->io_base;
 513
 514         w = OMAP_MCBSP_READ(io_base, RCCR);
 515
 516         if (enable)
 517                 OMAP_MCBSP_WRITE(io_base, RCCR, w & ~(RDISABLE));
 518         else
 519                 OMAP_MCBSP_WRITE(io_base, RCCR, w | RDISABLE);
 520 }
 521 EXPORT_SYMBOL(omap_mcbsp_recv_enable);
 522
 523 /* polled mcbsp i/o operations */
 524 int omap_mcbsp_pollwrite(unsigned int id, u16 buf)
 525 {
 526         struct omap_mcbsp *mcbsp;
 527         void __iomem *base;
 528
 529         if (!omap_mcbsp_check_valid_id(id)) {
 530                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 531                 return -ENODEV;
 532         }
 533
 534         mcbsp = id_to_mcbsp_ptr(id);
 535         base = mcbsp->io_base;
 536
 537         writew(buf, base + OMAP_MCBSP_REG_DXR1);
 538         /* if frame sync error - clear the error */
 539         if (readw(base + OMAP_MCBSP_REG_SPCR2) & XSYNC_ERR) {
 540                 /* clear error */
 541                 writew(readw(base + OMAP_MCBSP_REG_SPCR2) & (~XSYNC_ERR),
 542                        base + OMAP_MCBSP_REG_SPCR2);
 543                 /* resend */
 544                 return -1;
 545         } else {
 546                 /* wait for transmit confirmation */
 547                 int attemps = 0;
 548                 while (!(readw(base + OMAP_MCBSP_REG_SPCR2) & XRDY)) {
 549                         if (attemps++ > 1000) {
 550                                 writew(readw(base + OMAP_MCBSP_REG_SPCR2) &
 551                                        (~XRST),
 552                                        base + OMAP_MCBSP_REG_SPCR2);
 553                                 udelay(10);
 554                                 writew(readw(base + OMAP_MCBSP_REG_SPCR2) |
 555                                        (XRST),
 556                                        base + OMAP_MCBSP_REG_SPCR2);
 557                                 udelay(10);
 558                                 dev_err(mcbsp->dev, "Could not write to"
 559                                         " McBSP%d Register\n", mcbsp->id);
 560                                 return -2;
 561                         }
 562                 }
 563         }
 564
 565         return 0;
 566 }
 567 EXPORT_SYMBOL(omap_mcbsp_pollwrite);
 568
 569 int omap_mcbsp_pollread(unsigned int id, u16 *buf)
 570 {
 571         struct omap_mcbsp *mcbsp;
 572         void __iomem *base;
 573
 574         if (!omap_mcbsp_check_valid_id(id)) {
 575                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 576                 return -ENODEV;
 577         }
 578         mcbsp = id_to_mcbsp_ptr(id);
 579
 580         base = mcbsp->io_base;
 581         /* if frame sync error - clear the error */
 582         if (readw(base + OMAP_MCBSP_REG_SPCR1) & RSYNC_ERR) {
 583                 /* clear error */
 584                 writew(readw(base + OMAP_MCBSP_REG_SPCR1) & (~RSYNC_ERR),
 585                        base + OMAP_MCBSP_REG_SPCR1);
 586                 /* resend */
 587                 return -1;
 588         } else {
 589                 /* wait for recieve confirmation */
 590                 int attemps = 0;
 591                 while (!(readw(base + OMAP_MCBSP_REG_SPCR1) & RRDY)) {
 592                         if (attemps++ > 1000) {
 593                                 writew(readw(base + OMAP_MCBSP_REG_SPCR1) &
 594                                        (~RRST),
 595                                        base + OMAP_MCBSP_REG_SPCR1);
 596                                 udelay(10);
 597                                 writew(readw(base + OMAP_MCBSP_REG_SPCR1) |
 598                                        (RRST),
 599                                        base + OMAP_MCBSP_REG_SPCR1);
 600                                 udelay(10);
 601                                 dev_err(mcbsp->dev, "Could not read from"
 602                                         " McBSP%d Register\n", mcbsp->id);
 603                                 return -2;
 604                         }
 605                 }
 606         }
 607         *buf = readw(base + OMAP_MCBSP_REG_DRR1);
 608
 609         return 0;
 610 }
 611 EXPORT_SYMBOL(omap_mcbsp_pollread);
 612
 613 /*
 614  * IRQ based word transmission.
 615  */
 616 void omap_mcbsp_xmit_word(unsigned int id, u32 word)
 617 {
 618         struct omap_mcbsp *mcbsp;
 619         void __iomem *io_base;
 620         omap_mcbsp_word_length word_length;
 621
 622         if (!omap_mcbsp_check_valid_id(id)) {
 623                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 624                 return;
 625         }
 626
 627         mcbsp = id_to_mcbsp_ptr(id);
 628         io_base = mcbsp->io_base;
 629         word_length = mcbsp->tx_word_length;
 630
 631         wait_for_completion(&mcbsp->tx_irq_completion);
 632
 633         if (word_length > OMAP_MCBSP_WORD_16)
 634                 OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16);
 635         OMAP_MCBSP_WRITE(io_base, DXR1, word & 0xffff);
 636 }
 637 EXPORT_SYMBOL(omap_mcbsp_xmit_word);
 638
 639 u32 omap_mcbsp_recv_word(unsigned int id)
 640 {
 641         struct omap_mcbsp *mcbsp;
 642         void __iomem *io_base;
 643         u16 word_lsb, word_msb = 0;
 644         omap_mcbsp_word_length word_length;
 645
 646         if (!omap_mcbsp_check_valid_id(id)) {
 647                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 648                 return -ENODEV;
 649         }
 650         mcbsp = id_to_mcbsp_ptr(id);
 651
 652         word_length = mcbsp->rx_word_length;
 653         io_base = mcbsp->io_base;
 654
 655         wait_for_completion(&mcbsp->rx_irq_completion);
 656
 657         if (word_length > OMAP_MCBSP_WORD_16)
 658                 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
 659         word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
 660
 661         return (word_lsb | (word_msb << 16));
 662 }
 663 EXPORT_SYMBOL(omap_mcbsp_recv_word);
 664
 665 int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word)
 666 {
 667         struct omap_mcbsp *mcbsp;
 668         void __iomem *io_base;
 669         omap_mcbsp_word_length tx_word_length;
 670         omap_mcbsp_word_length rx_word_length;
 671         u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
 672
 673         if (!omap_mcbsp_check_valid_id(id)) {
 674                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 675                 return -ENODEV;
 676         }
 677         mcbsp = id_to_mcbsp_ptr(id);
 678         io_base = mcbsp->io_base;
 679         tx_word_length = mcbsp->tx_word_length;
 680         rx_word_length = mcbsp->rx_word_length;
 681
 682         if (tx_word_length != rx_word_length)
 683                 return -EINVAL;
 684
 685         /* First we wait for the transmitter to be ready */
 686         spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
 687         while (!(spcr2 & XRDY)) {
 688                 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
 689                 if (attempts++ > 1000) {
 690                         /* We must reset the transmitter */
 691                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 & (~XRST));
 692                         udelay(10);
 693                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
 694                         udelay(10);
 695                         dev_err(mcbsp->dev, "McBSP%d transmitter not "
 696                                 "ready\n", mcbsp->id);
 697                         return -EAGAIN;
 698                 }
 699         }
 700
 701         /* Now we can push the data */
 702         if (tx_word_length > OMAP_MCBSP_WORD_16)
 703                 OMAP_MCBSP_WRITE(io_base, DXR2, word >> 16);
 704         OMAP_MCBSP_WRITE(io_base, DXR1, word & 0xffff);
 705
 706         /* We wait for the receiver to be ready */
 707         spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
 708         while (!(spcr1 & RRDY)) {
 709                 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
 710                 if (attempts++ > 1000) {
 711                         /* We must reset the receiver */
 712                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 & (~RRST));
 713                         udelay(10);
 714                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
 715                         udelay(10);
 716                         dev_err(mcbsp->dev, "McBSP%d receiver not "
 717                                 "ready\n", mcbsp->id);
 718                         return -EAGAIN;
 719                 }
 720         }
 721
 722         /* Receiver is ready, let's read the dummy data */
 723         if (rx_word_length > OMAP_MCBSP_WORD_16)
 724                 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
 725         word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
 726
 727         return 0;
 728 }
 729 EXPORT_SYMBOL(omap_mcbsp_spi_master_xmit_word_poll);
 730
 731 int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word)
 732 {
 733         struct omap_mcbsp *mcbsp;
 734         u32 clock_word = 0;
 735         void __iomem *io_base;
 736         omap_mcbsp_word_length tx_word_length;
 737         omap_mcbsp_word_length rx_word_length;
 738         u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0;
 739
 740         if (!omap_mcbsp_check_valid_id(id)) {
 741                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 742                 return -ENODEV;
 743         }
 744
 745         mcbsp = id_to_mcbsp_ptr(id);
 746         io_base = mcbsp->io_base;
 747
 748         tx_word_length = mcbsp->tx_word_length;
 749         rx_word_length = mcbsp->rx_word_length;
 750
 751         if (tx_word_length != rx_word_length)
 752                 return -EINVAL;
 753
 754         /* First we wait for the transmitter to be ready */
 755         spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
 756         while (!(spcr2 & XRDY)) {
 757                 spcr2 = OMAP_MCBSP_READ(io_base, SPCR2);
 758                 if (attempts++ > 1000) {
 759                         /* We must reset the transmitter */
 760                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 & (~XRST));
 761                         udelay(10);
 762                         OMAP_MCBSP_WRITE(io_base, SPCR2, spcr2 | XRST);
 763                         udelay(10);
 764                         dev_err(mcbsp->dev, "McBSP%d transmitter not "
 765                                 "ready\n", mcbsp->id);
 766                         return -EAGAIN;
 767                 }
 768         }
 769
 770         /* We first need to enable the bus clock */
 771         if (tx_word_length > OMAP_MCBSP_WORD_16)
 772                 OMAP_MCBSP_WRITE(io_base, DXR2, clock_word >> 16);
 773         OMAP_MCBSP_WRITE(io_base, DXR1, clock_word & 0xffff);
 774
 775         /* We wait for the receiver to be ready */
 776         spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
 777         while (!(spcr1 & RRDY)) {
 778                 spcr1 = OMAP_MCBSP_READ(io_base, SPCR1);
 779                 if (attempts++ > 1000) {
 780                         /* We must reset the receiver */
 781                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 & (~RRST));
 782                         udelay(10);
 783                         OMAP_MCBSP_WRITE(io_base, SPCR1, spcr1 | RRST);
 784                         udelay(10);
 785                         dev_err(mcbsp->dev, "McBSP%d receiver not "
 786                                 "ready\n", mcbsp->id);
 787                         return -EAGAIN;
 788                 }
 789         }
 790
 791         /* Receiver is ready, there is something for us */
 792         if (rx_word_length > OMAP_MCBSP_WORD_16)
 793                 word_msb = OMAP_MCBSP_READ(io_base, DRR2);
 794         word_lsb = OMAP_MCBSP_READ(io_base, DRR1);
 795
 796         word[0] = (word_lsb | (word_msb << 16));
 797
 798         return 0;
 799 }
 800 EXPORT_SYMBOL(omap_mcbsp_spi_master_recv_word_poll);
 801
 802 /*
 803  * Simple DMA based buffer rx/tx routines.
 804  * Nothing fancy, just a single buffer tx/rx through DMA.
 805  * The DMA resources are released once the transfer is done.
 806  * For anything fancier, you should use your own customized DMA
 807  * routines and callbacks.
 808  */
 809 int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer,
 810                                 unsigned int length)
 811 {
 812         struct omap_mcbsp *mcbsp;
 813         int dma_tx_ch;
 814         int src_port = 0;
 815         int dest_port = 0;
 816         int sync_dev = 0;
 817
 818         if (!omap_mcbsp_check_valid_id(id)) {
 819                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 820                 return -ENODEV;
 821         }
 822         mcbsp = id_to_mcbsp_ptr(id);
 823
 824         if (omap_request_dma(mcbsp->dma_tx_sync, "McBSP TX",
 825                                 omap_mcbsp_tx_dma_callback,
 826                                 mcbsp,
 827                                 &dma_tx_ch)) {
 828                 dev_err(mcbsp->dev, " Unable to request DMA channel for "
 829                                 "McBSP%d TX. Trying IRQ based TX\n",
 830                                 mcbsp->id);
 831                 return -EAGAIN;
 832         }
 833         mcbsp->dma_tx_lch = dma_tx_ch;
 834
 835         dev_err(mcbsp->dev, "McBSP%d TX DMA on channel %d\n", mcbsp->id,
 836                 dma_tx_ch);
 837
 838         init_completion(&mcbsp->tx_dma_completion);
 839
 840         if (cpu_class_is_omap1()) {
 841                 src_port = OMAP_DMA_PORT_TIPB;
 842                 dest_port = OMAP_DMA_PORT_EMIFF;
 843         }
 844         if (cpu_class_is_omap2())
 845                 sync_dev = mcbsp->dma_tx_sync;
 846
 847         omap_set_dma_transfer_params(mcbsp->dma_tx_lch,
 848                                      OMAP_DMA_DATA_TYPE_S16,
 849                                      length >> 1, 1,
 850                                      OMAP_DMA_SYNC_ELEMENT,
 851          sync_dev, 0);
 852
 853         omap_set_dma_dest_params(mcbsp->dma_tx_lch,
 854                                  src_port,
 855                                  OMAP_DMA_AMODE_CONSTANT,
 856                                  mcbsp->phys_base + OMAP_MCBSP_REG_DXR1,
 857                                  0, 0);
 858
 859         omap_set_dma_src_params(mcbsp->dma_tx_lch,
 860                                 dest_port,
 861                                 OMAP_DMA_AMODE_POST_INC,
 862                                 buffer,
 863                                 0, 0);
 864
 865         omap_start_dma(mcbsp->dma_tx_lch);
 866         wait_for_completion(&mcbsp->tx_dma_completion);
 867
 868         return 0;
 869 }
 870 EXPORT_SYMBOL(omap_mcbsp_xmit_buffer);
 871
 872 int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer,
 873                                 unsigned int length)
 874 {
 875         struct omap_mcbsp *mcbsp;
 876         int dma_rx_ch;
 877         int src_port = 0;
 878         int dest_port = 0;
 879         int sync_dev = 0;
 880
 881         if (!omap_mcbsp_check_valid_id(id)) {
 882                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 883                 return -ENODEV;
 884         }
 885         mcbsp = id_to_mcbsp_ptr(id);
 886
 887         if (omap_request_dma(mcbsp->dma_rx_sync, "McBSP RX",
 888                                 omap_mcbsp_rx_dma_callback,
 889                                 mcbsp,
 890                                 &dma_rx_ch)) {
 891                 dev_err(mcbsp->dev, "Unable to request DMA channel for "
 892                                 "McBSP%d RX. Trying IRQ based RX\n",
 893                                 mcbsp->id);
 894                 return -EAGAIN;
 895         }
 896         mcbsp->dma_rx_lch = dma_rx_ch;
 897
 898         dev_err(mcbsp->dev, "McBSP%d RX DMA on channel %d\n", mcbsp->id,
 899                 dma_rx_ch);
 900
 901         init_completion(&mcbsp->rx_dma_completion);
 902
 903         if (cpu_class_is_omap1()) {
 904                 src_port = OMAP_DMA_PORT_TIPB;
 905                 dest_port = OMAP_DMA_PORT_EMIFF;
 906         }
 907         if (cpu_class_is_omap2())
 908                 sync_dev = mcbsp->dma_rx_sync;
 909
 910         omap_set_dma_transfer_params(mcbsp->dma_rx_lch,
 911                                         OMAP_DMA_DATA_TYPE_S16,
 912                                         length >> 1, 1,
 913                                         OMAP_DMA_SYNC_ELEMENT,
 914                                         sync_dev, 0);
 915
 916         omap_set_dma_src_params(mcbsp->dma_rx_lch,
 917                                 src_port,
 918                                 OMAP_DMA_AMODE_CONSTANT,
 919                                 mcbsp->phys_base + OMAP_MCBSP_REG_DRR1,
 920                                 0, 0);
 921
 922         omap_set_dma_dest_params(mcbsp->dma_rx_lch,
 923                                         dest_port,
 924                                         OMAP_DMA_AMODE_POST_INC,
 925                                         buffer,
 926                                         0, 0);
 927
 928         omap_start_dma(mcbsp->dma_rx_lch);
 929         wait_for_completion(&mcbsp->rx_dma_completion);
 930
 931         return 0;
 932 }
 933 EXPORT_SYMBOL(omap_mcbsp_recv_buffer);
 934
 935 /*
 936  * SPI wrapper.
 937  * Since SPI setup is much simpler than the generic McBSP one,
 938  * this wrapper just need an omap_mcbsp_spi_cfg structure as an input.
 939  * Once this is done, you can call omap_mcbsp_start().
 940  */
 941 void omap_mcbsp_set_spi_mode(unsigned int id,
 942                                 const struct omap_mcbsp_spi_cfg *spi_cfg)
 943 {
 944         struct omap_mcbsp *mcbsp;
 945         struct omap_mcbsp_reg_cfg mcbsp_cfg;
 946
 947         if (!omap_mcbsp_check_valid_id(id)) {
 948                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 949                 return;
 950         }
 951         mcbsp = id_to_mcbsp_ptr(id);
 952
 953         memset(&mcbsp_cfg, 0, sizeof(struct omap_mcbsp_reg_cfg));
 954
 955         /* SPI has only one frame */
 956         mcbsp_cfg.rcr1 |= (RWDLEN1(spi_cfg->word_length) | RFRLEN1(0));
 957         mcbsp_cfg.xcr1 |= (XWDLEN1(spi_cfg->word_length) | XFRLEN1(0));
 958
 959         /* Clock stop mode */
 960         if (spi_cfg->clk_stp_mode == OMAP_MCBSP_CLK_STP_MODE_NO_DELAY)
 961                 mcbsp_cfg.spcr1 |= (1 << 12);
 962         else
 963                 mcbsp_cfg.spcr1 |= (3 << 11);
 964
 965         /* Set clock parities */
 966         if (spi_cfg->rx_clock_polarity == OMAP_MCBSP_CLK_RISING)
 967                 mcbsp_cfg.pcr0 |= CLKRP;
 968         else
 969                 mcbsp_cfg.pcr0 &= ~CLKRP;
 970
 971         if (spi_cfg->tx_clock_polarity == OMAP_MCBSP_CLK_RISING)
 972                 mcbsp_cfg.pcr0 &= ~CLKXP;
 973         else
 974                 mcbsp_cfg.pcr0 |= CLKXP;
 975
 976         /* Set SCLKME to 0 and CLKSM to 1 */
 977         mcbsp_cfg.pcr0 &= ~SCLKME;
 978         mcbsp_cfg.srgr2 |= CLKSM;
 979
 980         /* Set FSXP */
 981         if (spi_cfg->fsx_polarity == OMAP_MCBSP_FS_ACTIVE_HIGH)
 982                 mcbsp_cfg.pcr0 &= ~FSXP;
 983         else
 984                 mcbsp_cfg.pcr0 |= FSXP;
 985
 986         if (spi_cfg->spi_mode == OMAP_MCBSP_SPI_MASTER) {
 987                 mcbsp_cfg.pcr0 |= CLKXM;
 988                 mcbsp_cfg.srgr1 |= CLKGDV(spi_cfg->clk_div - 1);
 989                 mcbsp_cfg.pcr0 |= FSXM;
 990                 mcbsp_cfg.srgr2 &= ~FSGM;
 991                 mcbsp_cfg.xcr2 |= XDATDLY(1);
 992                 mcbsp_cfg.rcr2 |= RDATDLY(1);
 993         } else {
 994                 mcbsp_cfg.pcr0 &= ~CLKXM;
 995                 mcbsp_cfg.srgr1 |= CLKGDV(1);
 996                 mcbsp_cfg.pcr0 &= ~FSXM;
 997                 mcbsp_cfg.xcr2 &= ~XDATDLY(3);
 998                 mcbsp_cfg.rcr2 &= ~RDATDLY(3);
 999         }
1000
1001         mcbsp_cfg.xcr2 &= ~XPHASE;
1002         mcbsp_cfg.rcr2 &= ~RPHASE;
1003
1004         omap_mcbsp_config(id, &mcbsp_cfg);
1005 }
1006 EXPORT_SYMBOL(omap_mcbsp_set_spi_mode);
1007
1008 /*
1009  * McBSP1 and McBSP3 are directly mapped on 1610 and 1510.
1010  * 730 has only 2 McBSP, and both of them are MPU peripherals.
1011  */
1012 static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
1013 {
1014         struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
1015         struct omap_mcbsp *mcbsp;
1016         int id = pdev->id - 1;
1017         int ret = 0;
1018
1019         if (!pdata) {
1020                 dev_err(&pdev->dev, "McBSP device initialized without"
1021                                 "platform data\n");
1022                 ret = -EINVAL;
1023                 goto exit;
1024         }
1025
1026         dev_dbg(&pdev->dev, "Initializing OMAP McBSP (%d).\n", pdev->id);
1027
1028         if (id >= omap_mcbsp_count) {
1029                 dev_err(&pdev->dev, "Invalid McBSP device id (%d)\n", id);
1030                 ret = -EINVAL;
1031                 goto exit;
1032         }
1033
1034         mcbsp = kzalloc(sizeof(struct omap_mcbsp), GFP_KERNEL);
1035         if (!mcbsp) {
1036                 ret = -ENOMEM;
1037                 goto exit;
1038         }
1039
1040         spin_lock_init(&mcbsp->lock);
1041         mcbsp->id = id + 1;
1042         mcbsp->free = 1;
1043         mcbsp->dma_tx_lch = -1;
1044         mcbsp->dma_rx_lch = -1;
1045
1046         mcbsp->phys_base = pdata->phys_base;
1047         mcbsp->io_base = ioremap(pdata->phys_base, SZ_4K);
1048         if (!mcbsp->io_base) {
1049                 ret = -ENOMEM;
1050                 goto err_ioremap;
1051         }
1052
1053         /* Default I/O is IRQ based */
1054         mcbsp->io_type = OMAP_MCBSP_IRQ_IO;
1055         mcbsp->tx_irq = pdata->tx_irq;
1056         mcbsp->rx_irq = pdata->rx_irq;
1057         mcbsp->dma_rx_sync = pdata->dma_rx_sync;
1058         mcbsp->dma_tx_sync = pdata->dma_tx_sync;
1059
1060         mcbsp->iclk = clk_get(&pdev->dev, "ick");
1061         if (IS_ERR(mcbsp->iclk)) {
1062                 ret = PTR_ERR(mcbsp->iclk);
1063                 dev_err(&pdev->dev, "unable to get ick: %d\n", ret);
1064                 goto err_iclk;
1065         }
1066
1067         mcbsp->fclk = clk_get(&pdev->dev, "fck");
1068         if (IS_ERR(mcbsp->fclk)) {
1069                 ret = PTR_ERR(mcbsp->fclk);
1070                 dev_err(&pdev->dev, "unable to get fck: %d\n", ret);
1071                 goto err_fclk;
1072         }
1073
1074         mcbsp->pdata = pdata;
1075         mcbsp->dev = &pdev->dev;
1076         mcbsp_ptr[id] = mcbsp;
1077         platform_set_drvdata(pdev, mcbsp);
1078         return 0;
1079
1080 err_fclk:
1081         clk_put(mcbsp->iclk);
1082 err_iclk:
1083         iounmap(mcbsp->io_base);
1084 err_ioremap:
1085         kfree(mcbsp);
1086 exit:
1087         return ret;
1088 }
1089
1090 static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
1091 {
1092         struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev);
1093
1094         platform_set_drvdata(pdev, NULL);
1095         if (mcbsp) {
1096
1097                 if (mcbsp->pdata && mcbsp->pdata->ops &&
1098                                 mcbsp->pdata->ops->free)
1099                         mcbsp->pdata->ops->free(mcbsp->id);
1100
1101                 clk_disable(mcbsp->fclk);
1102                 clk_disable(mcbsp->iclk);
1103                 clk_put(mcbsp->fclk);
1104                 clk_put(mcbsp->iclk);
1105
1106                 iounmap(mcbsp->io_base);
1107
1108                 mcbsp->fclk = NULL;
1109                 mcbsp->iclk = NULL;
1110                 mcbsp->free = 0;
1111                 mcbsp->dev = NULL;
1112         }
1113
1114         return 0;
1115 }
1116
1117 static struct platform_driver omap_mcbsp_driver = {
1118         .probe          = omap_mcbsp_probe,
1119         .remove         = __devexit_p(omap_mcbsp_remove),
1120         .driver         = {
1121                 .name   = "omap-mcbsp",
1122         },
1123 };
1124
1125 int __init omap_mcbsp_init(void)
1126 {
1127         /* Register the McBSP driver */
1128         return platform_driver_register(&omap_mcbsp_driver);
1129 }