arch/arm/plat-omap/mcbsp.c

   1 /*
   2  * linux/arch/arm/plat-omap/mcbsp.c
   3  *
   4  * Copyright (C) 2004 Nokia Corporation
   5  * Author: Samuel Ortiz <samuel.ortiz@nokia.com>
   6  *
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * Multichannel mode not supported.
  13  */
  14
  15 #include <linux/module.h>
  16 #include <linux/init.h>
  17 #include <linux/device.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/err.h>
  21 #include <linux/clk.h>
  22 #include <linux/delay.h>
  23 #include <linux/io.h>
  24 #include <linux/slab.h>
  25
  26 #include <plat/mcbsp.h>
  27 #include <linux/pm_runtime.h>
  28
  29 struct omap_mcbsp **mcbsp_ptr;
  30 int omap_mcbsp_count;
  31
  32 static void omap_mcbsp_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
  33 {
  34         void __iomem *addr = mcbsp->io_base + reg * mcbsp->pdata->reg_step;
  35
  36         if (mcbsp->pdata->reg_size == 2) {
  37                 ((u16 *)mcbsp->reg_cache)[reg] = (u16)val;
  38                 __raw_writew((u16)val, addr);
  39         } else {
  40                 ((u32 *)mcbsp->reg_cache)[reg] = val;
  41                 __raw_writel(val, addr);
  42         }
  43 }
  44
  45 static int omap_mcbsp_read(struct omap_mcbsp *mcbsp, u16 reg, bool from_cache)
  46 {
  47         void __iomem *addr = mcbsp->io_base + reg * mcbsp->pdata->reg_step;
  48
  49         if (mcbsp->pdata->reg_size == 2) {
  50                 return !from_cache ? __raw_readw(addr) :
  51                                      ((u16 *)mcbsp->reg_cache)[reg];
  52         } else {
  53                 return !from_cache ? __raw_readl(addr) :
  54                                      ((u32 *)mcbsp->reg_cache)[reg];
  55         }
  56 }
  57
  58 #ifdef CONFIG_ARCH_OMAP3
  59 static void omap_mcbsp_st_write(struct omap_mcbsp *mcbsp, u16 reg, u32 val)
  60 {
  61         __raw_writel(val, mcbsp->st_data->io_base_st + reg);
  62 }
  63
  64 static int omap_mcbsp_st_read(struct omap_mcbsp *mcbsp, u16 reg)
  65 {
  66         return __raw_readl(mcbsp->st_data->io_base_st + reg);
  67 }
  68 #endif
  69
  70 #define MCBSP_READ(mcbsp, reg) \
  71                 omap_mcbsp_read(mcbsp, OMAP_MCBSP_REG_##reg, 0)
  72 #define MCBSP_WRITE(mcbsp, reg, val) \
  73                 omap_mcbsp_write(mcbsp, OMAP_MCBSP_REG_##reg, val)
  74 #define MCBSP_READ_CACHE(mcbsp, reg) \
  75                 omap_mcbsp_read(mcbsp, OMAP_MCBSP_REG_##reg, 1)
  76
  77 #define MCBSP_ST_READ(mcbsp, reg) \
  78                         omap_mcbsp_st_read(mcbsp, OMAP_ST_REG_##reg)
  79 #define MCBSP_ST_WRITE(mcbsp, reg, val) \
  80                         omap_mcbsp_st_write(mcbsp, OMAP_ST_REG_##reg, val)
  81
  82 static void omap_mcbsp_dump_reg(u8 id)
  83 {
  84         struct omap_mcbsp *mcbsp = id_to_mcbsp_ptr(id);
  85
  86         dev_dbg(mcbsp->dev, "**** McBSP%d regs ****\n", mcbsp->id);
  87         dev_dbg(mcbsp->dev, "DRR2:  0x%04x\n",
  88                         MCBSP_READ(mcbsp, DRR2));
  89         dev_dbg(mcbsp->dev, "DRR1:  0x%04x\n",
  90                         MCBSP_READ(mcbsp, DRR1));
  91         dev_dbg(mcbsp->dev, "DXR2:  0x%04x\n",
  92                         MCBSP_READ(mcbsp, DXR2));
  93         dev_dbg(mcbsp->dev, "DXR1:  0x%04x\n",
  94                         MCBSP_READ(mcbsp, DXR1));
  95         dev_dbg(mcbsp->dev, "SPCR2: 0x%04x\n",
  96                         MCBSP_READ(mcbsp, SPCR2));
  97         dev_dbg(mcbsp->dev, "SPCR1: 0x%04x\n",
  98                         MCBSP_READ(mcbsp, SPCR1));
  99         dev_dbg(mcbsp->dev, "RCR2:  0x%04x\n",
 100                         MCBSP_READ(mcbsp, RCR2));
 101         dev_dbg(mcbsp->dev, "RCR1:  0x%04x\n",
 102                         MCBSP_READ(mcbsp, RCR1));
 103         dev_dbg(mcbsp->dev, "XCR2:  0x%04x\n",
 104                         MCBSP_READ(mcbsp, XCR2));
 105         dev_dbg(mcbsp->dev, "XCR1:  0x%04x\n",
 106                         MCBSP_READ(mcbsp, XCR1));
 107         dev_dbg(mcbsp->dev, "SRGR2: 0x%04x\n",
 108                         MCBSP_READ(mcbsp, SRGR2));
 109         dev_dbg(mcbsp->dev, "SRGR1: 0x%04x\n",
 110                         MCBSP_READ(mcbsp, SRGR1));
 111         dev_dbg(mcbsp->dev, "PCR0:  0x%04x\n",
 112                         MCBSP_READ(mcbsp, PCR0));
 113         dev_dbg(mcbsp->dev, "***********************\n");
 114 }
 115
 116 static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
 117 {
 118         struct omap_mcbsp *mcbsp_tx = dev_id;
 119         u16 irqst_spcr2;
 120
 121         irqst_spcr2 = MCBSP_READ(mcbsp_tx, SPCR2);
 122         dev_dbg(mcbsp_tx->dev, "TX IRQ callback : 0x%x\n", irqst_spcr2);
 123
 124         if (irqst_spcr2 & XSYNC_ERR) {
 125                 dev_err(mcbsp_tx->dev, "TX Frame Sync Error! : 0x%x\n",
 126                         irqst_spcr2);
 127                 /* Writing zero to XSYNC_ERR clears the IRQ */
 128                 MCBSP_WRITE(mcbsp_tx, SPCR2, MCBSP_READ_CACHE(mcbsp_tx, SPCR2));
 129         }
 130
 131         return IRQ_HANDLED;
 132 }
 133
 134 static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
 135 {
 136         struct omap_mcbsp *mcbsp_rx = dev_id;
 137         u16 irqst_spcr1;
 138
 139         irqst_spcr1 = MCBSP_READ(mcbsp_rx, SPCR1);
 140         dev_dbg(mcbsp_rx->dev, "RX IRQ callback : 0x%x\n", irqst_spcr1);
 141
 142         if (irqst_spcr1 & RSYNC_ERR) {
 143                 dev_err(mcbsp_rx->dev, "RX Frame Sync Error! : 0x%x\n",
 144                         irqst_spcr1);
 145                 /* Writing zero to RSYNC_ERR clears the IRQ */
 146                 MCBSP_WRITE(mcbsp_rx, SPCR1, MCBSP_READ_CACHE(mcbsp_rx, SPCR1));
 147         }
 148
 149         return IRQ_HANDLED;
 150 }
 151
 152 /*
 153  * omap_mcbsp_config simply write a config to the
 154  * appropriate McBSP.
 155  * You either call this function or set the McBSP registers
 156  * by yourself before calling omap_mcbsp_start().
 157  */
 158 void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config)
 159 {
 160         struct omap_mcbsp *mcbsp;
 161
 162         if (!omap_mcbsp_check_valid_id(id)) {
 163                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 164                 return;
 165         }
 166         mcbsp = id_to_mcbsp_ptr(id);
 167
 168         dev_dbg(mcbsp->dev, "Configuring McBSP%d  phys_base: 0x%08lx\n",
 169                         mcbsp->id, mcbsp->phys_base);
 170
 171         /* We write the given config */
 172         MCBSP_WRITE(mcbsp, SPCR2, config->spcr2);
 173         MCBSP_WRITE(mcbsp, SPCR1, config->spcr1);
 174         MCBSP_WRITE(mcbsp, RCR2, config->rcr2);
 175         MCBSP_WRITE(mcbsp, RCR1, config->rcr1);
 176         MCBSP_WRITE(mcbsp, XCR2, config->xcr2);
 177         MCBSP_WRITE(mcbsp, XCR1, config->xcr1);
 178         MCBSP_WRITE(mcbsp, SRGR2, config->srgr2);
 179         MCBSP_WRITE(mcbsp, SRGR1, config->srgr1);
 180         MCBSP_WRITE(mcbsp, MCR2, config->mcr2);
 181         MCBSP_WRITE(mcbsp, MCR1, config->mcr1);
 182         MCBSP_WRITE(mcbsp, PCR0, config->pcr0);
 183         if (mcbsp->pdata->has_ccr) {
 184                 MCBSP_WRITE(mcbsp, XCCR, config->xccr);
 185                 MCBSP_WRITE(mcbsp, RCCR, config->rccr);
 186         }
 187 }
 188 EXPORT_SYMBOL(omap_mcbsp_config);
 189
 190 /**
 191  * omap_mcbsp_dma_params - returns the dma channel number
 192  * @id - mcbsp id
 193  * @stream - indicates the direction of data flow (rx or tx)
 194  *
 195  * Returns the dma channel number for the rx channel or tx channel
 196  * based on the value of @stream for the requested mcbsp given by @id
 197  */
 198 int omap_mcbsp_dma_ch_params(unsigned int id, unsigned int stream)
 199 {
 200         struct omap_mcbsp *mcbsp;
 201
 202         if (!omap_mcbsp_check_valid_id(id)) {
 203                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 204                 return -ENODEV;
 205         }
 206         mcbsp = id_to_mcbsp_ptr(id);
 207
 208         if (stream)
 209                 return mcbsp->dma_rx_sync;
 210         else
 211                 return mcbsp->dma_tx_sync;
 212 }
 213 EXPORT_SYMBOL(omap_mcbsp_dma_ch_params);
 214
 215 /**
 216  * omap_mcbsp_dma_reg_params - returns the address of mcbsp data register
 217  * @id - mcbsp id
 218  * @stream - indicates the direction of data flow (rx or tx)
 219  *
 220  * Returns the address of mcbsp data transmit register or data receive register
 221  * to be used by DMA for transferring/receiving data based on the value of
 222  * @stream for the requested mcbsp given by @id
 223  */
 224 int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream)
 225 {
 226         struct omap_mcbsp *mcbsp;
 227         int data_reg;
 228
 229         if (!omap_mcbsp_check_valid_id(id)) {
 230                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 231                 return -ENODEV;
 232         }
 233         mcbsp = id_to_mcbsp_ptr(id);
 234
 235         if (mcbsp->pdata->reg_size == 2) {
 236                 if (stream)
 237                         data_reg = OMAP_MCBSP_REG_DRR1;
 238                 else
 239                         data_reg = OMAP_MCBSP_REG_DXR1;
 240         } else {
 241                 if (stream)
 242                         data_reg = OMAP_MCBSP_REG_DRR;
 243                 else
 244                         data_reg = OMAP_MCBSP_REG_DXR;
 245         }
 246
 247         return mcbsp->phys_dma_base + data_reg * mcbsp->pdata->reg_step;
 248 }
 249 EXPORT_SYMBOL(omap_mcbsp_dma_reg_params);
 250
 251 #ifdef CONFIG_ARCH_OMAP3
 252 static void omap_st_on(struct omap_mcbsp *mcbsp)
 253 {
 254         unsigned int w;
 255
 256         if (mcbsp->pdata->enable_st_clock)
 257                 mcbsp->pdata->enable_st_clock(mcbsp->id, 1);
 258
 259         /* Enable McBSP Sidetone */
 260         w = MCBSP_READ(mcbsp, SSELCR);
 261         MCBSP_WRITE(mcbsp, SSELCR, w | SIDETONEEN);
 262
 263         /* Enable Sidetone from Sidetone Core */
 264         w = MCBSP_ST_READ(mcbsp, SSELCR);
 265         MCBSP_ST_WRITE(mcbsp, SSELCR, w | ST_SIDETONEEN);
 266 }
 267
 268 static void omap_st_off(struct omap_mcbsp *mcbsp)
 269 {
 270         unsigned int w;
 271
 272         w = MCBSP_ST_READ(mcbsp, SSELCR);
 273         MCBSP_ST_WRITE(mcbsp, SSELCR, w & ~(ST_SIDETONEEN));
 274
 275         w = MCBSP_READ(mcbsp, SSELCR);
 276         MCBSP_WRITE(mcbsp, SSELCR, w & ~(SIDETONEEN));
 277
 278         if (mcbsp->pdata->enable_st_clock)
 279                 mcbsp->pdata->enable_st_clock(mcbsp->id, 0);
 280 }
 281
 282 static void omap_st_fir_write(struct omap_mcbsp *mcbsp, s16 *fir)
 283 {
 284         u16 val, i;
 285
 286         val = MCBSP_ST_READ(mcbsp, SSELCR);
 287
 288         if (val & ST_COEFFWREN)
 289                 MCBSP_ST_WRITE(mcbsp, SSELCR, val & ~(ST_COEFFWREN));
 290
 291         MCBSP_ST_WRITE(mcbsp, SSELCR, val | ST_COEFFWREN);
 292
 293         for (i = 0; i < 128; i++)
 294                 MCBSP_ST_WRITE(mcbsp, SFIRCR, fir[i]);
 295
 296         i = 0;
 297
 298         val = MCBSP_ST_READ(mcbsp, SSELCR);
 299         while (!(val & ST_COEFFWRDONE) && (++i < 1000))
 300                 val = MCBSP_ST_READ(mcbsp, SSELCR);
 301
 302         MCBSP_ST_WRITE(mcbsp, SSELCR, val & ~(ST_COEFFWREN));
 303
 304         if (i == 1000)
 305                 dev_err(mcbsp->dev, "McBSP FIR load error!\n");
 306 }
 307
 308 static void omap_st_chgain(struct omap_mcbsp *mcbsp)
 309 {
 310         u16 w;
 311         struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
 312
 313         w = MCBSP_ST_READ(mcbsp, SSELCR);
 314
 315         MCBSP_ST_WRITE(mcbsp, SGAINCR, ST_CH0GAIN(st_data->ch0gain) | \
 316                       ST_CH1GAIN(st_data->ch1gain));
 317 }
 318
 319 int omap_st_set_chgain(unsigned int id, int channel, s16 chgain)
 320 {
 321         struct omap_mcbsp *mcbsp;
 322         struct omap_mcbsp_st_data *st_data;
 323         int ret = 0;
 324
 325         if (!omap_mcbsp_check_valid_id(id)) {
 326                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 327                 return -ENODEV;
 328         }
 329
 330         mcbsp = id_to_mcbsp_ptr(id);
 331         st_data = mcbsp->st_data;
 332
 333         if (!st_data)
 334                 return -ENOENT;
 335
 336         spin_lock_irq(&mcbsp->lock);
 337         if (channel == 0)
 338                 st_data->ch0gain = chgain;
 339         else if (channel == 1)
 340                 st_data->ch1gain = chgain;
 341         else
 342                 ret = -EINVAL;
 343
 344         if (st_data->enabled)
 345                 omap_st_chgain(mcbsp);
 346         spin_unlock_irq(&mcbsp->lock);
 347
 348         return ret;
 349 }
 350 EXPORT_SYMBOL(omap_st_set_chgain);
 351
 352 int omap_st_get_chgain(unsigned int id, int channel, s16 *chgain)
 353 {
 354         struct omap_mcbsp *mcbsp;
 355         struct omap_mcbsp_st_data *st_data;
 356         int ret = 0;
 357
 358         if (!omap_mcbsp_check_valid_id(id)) {
 359                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 360                 return -ENODEV;
 361         }
 362
 363         mcbsp = id_to_mcbsp_ptr(id);
 364         st_data = mcbsp->st_data;
 365
 366         if (!st_data)
 367                 return -ENOENT;
 368
 369         spin_lock_irq(&mcbsp->lock);
 370         if (channel == 0)
 371                 *chgain = st_data->ch0gain;
 372         else if (channel == 1)
 373                 *chgain = st_data->ch1gain;
 374         else
 375                 ret = -EINVAL;
 376         spin_unlock_irq(&mcbsp->lock);
 377
 378         return ret;
 379 }
 380 EXPORT_SYMBOL(omap_st_get_chgain);
 381
 382 static int omap_st_start(struct omap_mcbsp *mcbsp)
 383 {
 384         struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
 385
 386         if (st_data && st_data->enabled && !st_data->running) {
 387                 omap_st_fir_write(mcbsp, st_data->taps);
 388                 omap_st_chgain(mcbsp);
 389
 390                 if (!mcbsp->free) {
 391                         omap_st_on(mcbsp);
 392                         st_data->running = 1;
 393                 }
 394         }
 395
 396         return 0;
 397 }
 398
 399 int omap_st_enable(unsigned int id)
 400 {
 401         struct omap_mcbsp *mcbsp;
 402         struct omap_mcbsp_st_data *st_data;
 403
 404         if (!omap_mcbsp_check_valid_id(id)) {
 405                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 406                 return -ENODEV;
 407         }
 408
 409         mcbsp = id_to_mcbsp_ptr(id);
 410         st_data = mcbsp->st_data;
 411
 412         if (!st_data)
 413                 return -ENODEV;
 414
 415         spin_lock_irq(&mcbsp->lock);
 416         st_data->enabled = 1;
 417         omap_st_start(mcbsp);
 418         spin_unlock_irq(&mcbsp->lock);
 419
 420         return 0;
 421 }
 422 EXPORT_SYMBOL(omap_st_enable);
 423
 424 static int omap_st_stop(struct omap_mcbsp *mcbsp)
 425 {
 426         struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
 427
 428         if (st_data && st_data->running) {
 429                 if (!mcbsp->free) {
 430                         omap_st_off(mcbsp);
 431                         st_data->running = 0;
 432                 }
 433         }
 434
 435         return 0;
 436 }
 437
 438 int omap_st_disable(unsigned int id)
 439 {
 440         struct omap_mcbsp *mcbsp;
 441         struct omap_mcbsp_st_data *st_data;
 442         int ret = 0;
 443
 444         if (!omap_mcbsp_check_valid_id(id)) {
 445                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 446                 return -ENODEV;
 447         }
 448
 449         mcbsp = id_to_mcbsp_ptr(id);
 450         st_data = mcbsp->st_data;
 451
 452         if (!st_data)
 453                 return -ENODEV;
 454
 455         spin_lock_irq(&mcbsp->lock);
 456         omap_st_stop(mcbsp);
 457         st_data->enabled = 0;
 458         spin_unlock_irq(&mcbsp->lock);
 459
 460         return ret;
 461 }
 462 EXPORT_SYMBOL(omap_st_disable);
 463
 464 int omap_st_is_enabled(unsigned int id)
 465 {
 466         struct omap_mcbsp *mcbsp;
 467         struct omap_mcbsp_st_data *st_data;
 468
 469         if (!omap_mcbsp_check_valid_id(id)) {
 470                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 471                 return -ENODEV;
 472         }
 473
 474         mcbsp = id_to_mcbsp_ptr(id);
 475         st_data = mcbsp->st_data;
 476
 477         if (!st_data)
 478                 return -ENODEV;
 479
 480
 481         return st_data->enabled;
 482 }
 483 EXPORT_SYMBOL(omap_st_is_enabled);
 484
 485 #else
 486 static inline void omap_st_start(struct omap_mcbsp *mcbsp) {}
 487 static inline void omap_st_stop(struct omap_mcbsp *mcbsp) {}
 488 #endif
 489
 490 /*
 491  * omap_mcbsp_set_rx_threshold configures the transmit threshold in words.
 492  * The threshold parameter is 1 based, and it is converted (threshold - 1)
 493  * for the THRSH2 register.
 494  */
 495 void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold)
 496 {
 497         struct omap_mcbsp *mcbsp;
 498
 499         if (!omap_mcbsp_check_valid_id(id)) {
 500                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 501                 return;
 502         }
 503         mcbsp = id_to_mcbsp_ptr(id);
 504         if (mcbsp->pdata->buffer_size == 0)
 505                 return;
 506
 507         if (threshold && threshold <= mcbsp->max_tx_thres)
 508                 MCBSP_WRITE(mcbsp, THRSH2, threshold - 1);
 509 }
 510 EXPORT_SYMBOL(omap_mcbsp_set_tx_threshold);
 511
 512 /*
 513  * omap_mcbsp_set_rx_threshold configures the receive threshold in words.
 514  * The threshold parameter is 1 based, and it is converted (threshold - 1)
 515  * for the THRSH1 register.
 516  */
 517 void omap_mcbsp_set_rx_threshold(unsigned int id, u16 threshold)
 518 {
 519         struct omap_mcbsp *mcbsp;
 520
 521         if (!omap_mcbsp_check_valid_id(id)) {
 522                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 523                 return;
 524         }
 525         mcbsp = id_to_mcbsp_ptr(id);
 526         if (mcbsp->pdata->buffer_size == 0)
 527                 return;
 528
 529         if (threshold && threshold <= mcbsp->max_rx_thres)
 530                 MCBSP_WRITE(mcbsp, THRSH1, threshold - 1);
 531 }
 532 EXPORT_SYMBOL(omap_mcbsp_set_rx_threshold);
 533
 534 /*
 535  * omap_mcbsp_get_max_tx_thres just return the current configured
 536  * maximum threshold for transmission
 537  */
 538 u16 omap_mcbsp_get_max_tx_threshold(unsigned int id)
 539 {
 540         struct omap_mcbsp *mcbsp;
 541
 542         if (!omap_mcbsp_check_valid_id(id)) {
 543                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 544                 return -ENODEV;
 545         }
 546         mcbsp = id_to_mcbsp_ptr(id);
 547
 548         return mcbsp->max_tx_thres;
 549 }
 550 EXPORT_SYMBOL(omap_mcbsp_get_max_tx_threshold);
 551
 552 /*
 553  * omap_mcbsp_get_max_rx_thres just return the current configured
 554  * maximum threshold for reception
 555  */
 556 u16 omap_mcbsp_get_max_rx_threshold(unsigned int id)
 557 {
 558         struct omap_mcbsp *mcbsp;
 559
 560         if (!omap_mcbsp_check_valid_id(id)) {
 561                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 562                 return -ENODEV;
 563         }
 564         mcbsp = id_to_mcbsp_ptr(id);
 565
 566         return mcbsp->max_rx_thres;
 567 }
 568 EXPORT_SYMBOL(omap_mcbsp_get_max_rx_threshold);
 569
 570 u16 omap_mcbsp_get_fifo_size(unsigned int id)
 571 {
 572         struct omap_mcbsp *mcbsp;
 573
 574         if (!omap_mcbsp_check_valid_id(id)) {
 575                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 576                 return -ENODEV;
 577         }
 578         mcbsp = id_to_mcbsp_ptr(id);
 579
 580         return mcbsp->pdata->buffer_size;
 581 }
 582 EXPORT_SYMBOL(omap_mcbsp_get_fifo_size);
 583
 584 /*
 585  * omap_mcbsp_get_tx_delay returns the number of used slots in the McBSP FIFO
 586  */
 587 u16 omap_mcbsp_get_tx_delay(unsigned int id)
 588 {
 589         struct omap_mcbsp *mcbsp;
 590         u16 buffstat;
 591
 592         if (!omap_mcbsp_check_valid_id(id)) {
 593                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 594                 return -ENODEV;
 595         }
 596         mcbsp = id_to_mcbsp_ptr(id);
 597         if (mcbsp->pdata->buffer_size == 0)
 598                 return 0;
 599
 600         /* Returns the number of free locations in the buffer */
 601         buffstat = MCBSP_READ(mcbsp, XBUFFSTAT);
 602
 603         /* Number of slots are different in McBSP ports */
 604         return mcbsp->pdata->buffer_size - buffstat;
 605 }
 606 EXPORT_SYMBOL(omap_mcbsp_get_tx_delay);
 607
 608 /*
 609  * omap_mcbsp_get_rx_delay returns the number of free slots in the McBSP FIFO
 610  * to reach the threshold value (when the DMA will be triggered to read it)
 611  */
 612 u16 omap_mcbsp_get_rx_delay(unsigned int id)
 613 {
 614         struct omap_mcbsp *mcbsp;
 615         u16 buffstat, threshold;
 616
 617         if (!omap_mcbsp_check_valid_id(id)) {
 618                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 619                 return -ENODEV;
 620         }
 621         mcbsp = id_to_mcbsp_ptr(id);
 622         if (mcbsp->pdata->buffer_size == 0)
 623                 return 0;
 624
 625         /* Returns the number of used locations in the buffer */
 626         buffstat = MCBSP_READ(mcbsp, RBUFFSTAT);
 627         /* RX threshold */
 628         threshold = MCBSP_READ(mcbsp, THRSH1);
 629
 630         /* Return the number of location till we reach the threshold limit */
 631         if (threshold <= buffstat)
 632                 return 0;
 633         else
 634                 return threshold - buffstat;
 635 }
 636 EXPORT_SYMBOL(omap_mcbsp_get_rx_delay);
 637
 638 /*
 639  * omap_mcbsp_get_dma_op_mode just return the current configured
 640  * operating mode for the mcbsp channel
 641  */
 642 int omap_mcbsp_get_dma_op_mode(unsigned int id)
 643 {
 644         struct omap_mcbsp *mcbsp;
 645         int dma_op_mode;
 646
 647         if (!omap_mcbsp_check_valid_id(id)) {
 648                 printk(KERN_ERR "%s: Invalid id (%u)\n", __func__, id + 1);
 649                 return -ENODEV;
 650         }
 651         mcbsp = id_to_mcbsp_ptr(id);
 652
 653         dma_op_mode = mcbsp->dma_op_mode;
 654
 655         return dma_op_mode;
 656 }
 657 EXPORT_SYMBOL(omap_mcbsp_get_dma_op_mode);
 658
 659 int omap_mcbsp_request(unsigned int id)
 660 {
 661         struct omap_mcbsp *mcbsp;
 662         void *reg_cache;
 663         int err;
 664
 665         if (!omap_mcbsp_check_valid_id(id)) {
 666                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 667                 return -ENODEV;
 668         }
 669         mcbsp = id_to_mcbsp_ptr(id);
 670
 671         reg_cache = kzalloc(mcbsp->reg_cache_size, GFP_KERNEL);
 672         if (!reg_cache) {
 673                 return -ENOMEM;
 674         }
 675
 676         spin_lock(&mcbsp->lock);
 677         if (!mcbsp->free) {
 678                 dev_err(mcbsp->dev, "McBSP%d is currently in use\n",
 679                         mcbsp->id);
 680                 err = -EBUSY;
 681                 goto err_kfree;
 682         }
 683
 684         mcbsp->free = false;
 685         mcbsp->reg_cache = reg_cache;
 686         spin_unlock(&mcbsp->lock);
 687
 688         if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request)
 689                 mcbsp->pdata->ops->request(id);
 690
 691         pm_runtime_get_sync(mcbsp->dev);
 692
 693         /* Enable wakeup behavior */
 694         if (mcbsp->pdata->has_wakeup)
 695                 MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN);
 696
 697         /*
 698          * Make sure that transmitter, receiver and sample-rate generator are
 699          * not running before activating IRQs.
 700          */
 701         MCBSP_WRITE(mcbsp, SPCR1, 0);
 702         MCBSP_WRITE(mcbsp, SPCR2, 0);
 703
 704         err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler,
 705                                 0, "McBSP", (void *)mcbsp);
 706         if (err != 0) {
 707                 dev_err(mcbsp->dev, "Unable to request TX IRQ %d "
 708                                 "for McBSP%d\n", mcbsp->tx_irq,
 709                                 mcbsp->id);
 710                 goto err_clk_disable;
 711         }
 712
 713         if (mcbsp->rx_irq) {
 714                 err = request_irq(mcbsp->rx_irq,
 715                                 omap_mcbsp_rx_irq_handler,
 716                                 0, "McBSP", (void *)mcbsp);
 717                 if (err != 0) {
 718                         dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
 719                                         "for McBSP%d\n", mcbsp->rx_irq,
 720                                         mcbsp->id);
 721                         goto err_free_irq;
 722                 }
 723         }
 724
 725         return 0;
 726 err_free_irq:
 727         free_irq(mcbsp->tx_irq, (void *)mcbsp);
 728 err_clk_disable:
 729         if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
 730                 mcbsp->pdata->ops->free(id);
 731
 732         /* Disable wakeup behavior */
 733         if (mcbsp->pdata->has_wakeup)
 734                 MCBSP_WRITE(mcbsp, WAKEUPEN, 0);
 735
 736         pm_runtime_put_sync(mcbsp->dev);
 737
 738         spin_lock(&mcbsp->lock);
 739         mcbsp->free = true;
 740         mcbsp->reg_cache = NULL;
 741 err_kfree:
 742         spin_unlock(&mcbsp->lock);
 743         kfree(reg_cache);
 744
 745         return err;
 746 }
 747 EXPORT_SYMBOL(omap_mcbsp_request);
 748
 749 void omap_mcbsp_free(unsigned int id)
 750 {
 751         struct omap_mcbsp *mcbsp;
 752         void *reg_cache;
 753
 754         if (!omap_mcbsp_check_valid_id(id)) {
 755                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 756                 return;
 757         }
 758         mcbsp = id_to_mcbsp_ptr(id);
 759
 760         if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
 761                 mcbsp->pdata->ops->free(id);
 762
 763         /* Disable wakeup behavior */
 764         if (mcbsp->pdata->has_wakeup)
 765                 MCBSP_WRITE(mcbsp, WAKEUPEN, 0);
 766
 767         pm_runtime_put_sync(mcbsp->dev);
 768
 769         if (mcbsp->rx_irq)
 770                 free_irq(mcbsp->rx_irq, (void *)mcbsp);
 771         free_irq(mcbsp->tx_irq, (void *)mcbsp);
 772
 773         reg_cache = mcbsp->reg_cache;
 774
 775         spin_lock(&mcbsp->lock);
 776         if (mcbsp->free)
 777                 dev_err(mcbsp->dev, "McBSP%d was not reserved\n", mcbsp->id);
 778         else
 779                 mcbsp->free = true;
 780         mcbsp->reg_cache = NULL;
 781         spin_unlock(&mcbsp->lock);
 782
 783         if (reg_cache)
 784                 kfree(reg_cache);
 785 }
 786 EXPORT_SYMBOL(omap_mcbsp_free);
 787
 788 /*
 789  * Here we start the McBSP, by enabling transmitter, receiver or both.
 790  * If no transmitter or receiver is active prior calling, then sample-rate
 791  * generator and frame sync are started.
 792  */
 793 void omap_mcbsp_start(unsigned int id, int tx, int rx)
 794 {
 795         struct omap_mcbsp *mcbsp;
 796         int enable_srg = 0;
 797         u16 w;
 798
 799         if (!omap_mcbsp_check_valid_id(id)) {
 800                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 801                 return;
 802         }
 803         mcbsp = id_to_mcbsp_ptr(id);
 804
 805         if (cpu_is_omap34xx())
 806                 omap_st_start(mcbsp);
 807
 808         /* Only enable SRG, if McBSP is master */
 809         w = MCBSP_READ_CACHE(mcbsp, PCR0);
 810         if (w & (FSXM | FSRM | CLKXM | CLKRM))
 811                 enable_srg = !((MCBSP_READ_CACHE(mcbsp, SPCR2) |
 812                                 MCBSP_READ_CACHE(mcbsp, SPCR1)) & 1);
 813
 814         if (enable_srg) {
 815                 /* Start the sample generator */
 816                 w = MCBSP_READ_CACHE(mcbsp, SPCR2);
 817                 MCBSP_WRITE(mcbsp, SPCR2, w | (1 << 6));
 818         }
 819
 820         /* Enable transmitter and receiver */
 821         tx &= 1;
 822         w = MCBSP_READ_CACHE(mcbsp, SPCR2);
 823         MCBSP_WRITE(mcbsp, SPCR2, w | tx);
 824
 825         rx &= 1;
 826         w = MCBSP_READ_CACHE(mcbsp, SPCR1);
 827         MCBSP_WRITE(mcbsp, SPCR1, w | rx);
 828
 829         /*
 830          * Worst case: CLKSRG*2 = 8000khz: (1/8000) * 2 * 2 usec
 831          * REVISIT: 100us may give enough time for two CLKSRG, however
 832          * due to some unknown PM related, clock gating etc. reason it
 833          * is now at 500us.
 834          */
 835         udelay(500);
 836
 837         if (enable_srg) {
 838                 /* Start frame sync */
 839                 w = MCBSP_READ_CACHE(mcbsp, SPCR2);
 840                 MCBSP_WRITE(mcbsp, SPCR2, w | (1 << 7));
 841         }
 842
 843         if (mcbsp->pdata->has_ccr) {
 844                 /* Release the transmitter and receiver */
 845                 w = MCBSP_READ_CACHE(mcbsp, XCCR);
 846                 w &= ~(tx ? XDISABLE : 0);
 847                 MCBSP_WRITE(mcbsp, XCCR, w);
 848                 w = MCBSP_READ_CACHE(mcbsp, RCCR);
 849                 w &= ~(rx ? RDISABLE : 0);
 850                 MCBSP_WRITE(mcbsp, RCCR, w);
 851         }
 852
 853         /* Dump McBSP Regs */
 854         omap_mcbsp_dump_reg(id);
 855 }
 856 EXPORT_SYMBOL(omap_mcbsp_start);
 857
 858 void omap_mcbsp_stop(unsigned int id, int tx, int rx)
 859 {
 860         struct omap_mcbsp *mcbsp;
 861         int idle;
 862         u16 w;
 863
 864         if (!omap_mcbsp_check_valid_id(id)) {
 865                 printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
 866                 return;
 867         }
 868
 869         mcbsp = id_to_mcbsp_ptr(id);
 870
 871         /* Reset transmitter */
 872         tx &= 1;
 873         if (mcbsp->pdata->has_ccr) {
 874                 w = MCBSP_READ_CACHE(mcbsp, XCCR);
 875                 w |= (tx ? XDISABLE : 0);
 876                 MCBSP_WRITE(mcbsp, XCCR, w);
 877         }
 878         w = MCBSP_READ_CACHE(mcbsp, SPCR2);
 879         MCBSP_WRITE(mcbsp, SPCR2, w & ~tx);
 880
 881         /* Reset receiver */
 882         rx &= 1;
 883         if (mcbsp->pdata->has_ccr) {
 884                 w = MCBSP_READ_CACHE(mcbsp, RCCR);
 885                 w |= (rx ? RDISABLE : 0);
 886                 MCBSP_WRITE(mcbsp, RCCR, w);
 887         }
 888         w = MCBSP_READ_CACHE(mcbsp, SPCR1);
 889         MCBSP_WRITE(mcbsp, SPCR1, w & ~rx);
 890
 891         idle = !((MCBSP_READ_CACHE(mcbsp, SPCR2) |
 892                         MCBSP_READ_CACHE(mcbsp, SPCR1)) & 1);
 893
 894         if (idle) {
 895                 /* Reset the sample rate generator */
 896                 w = MCBSP_READ_CACHE(mcbsp, SPCR2);
 897                 MCBSP_WRITE(mcbsp, SPCR2, w & ~(1 << 6));
 898         }
 899
 900         if (cpu_is_omap34xx())
 901                 omap_st_stop(mcbsp);
 902 }
 903 EXPORT_SYMBOL(omap_mcbsp_stop);
 904
 905 /*
 906  * The following functions are only required on an OMAP1-only build.
 907  * mach-omap2/mcbsp.c contains the real functions
 908  */
 909 #ifndef CONFIG_ARCH_OMAP2PLUS
 910 int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id)
 911 {
 912         WARN(1, "%s: should never be called on an OMAP1-only kernel\n",
 913              __func__);
 914         return -EINVAL;
 915 }
 916
 917 void omap2_mcbsp1_mux_clkr_src(u8 mux)
 918 {
 919         WARN(1, "%s: should never be called on an OMAP1-only kernel\n",
 920              __func__);
 921         return;
 922 }
 923
 924 void omap2_mcbsp1_mux_fsr_src(u8 mux)
 925 {
 926         WARN(1, "%s: should never be called on an OMAP1-only kernel\n",
 927              __func__);
 928         return;
 929 }
 930 #endif
 931
 932 #define max_thres(m)                    (mcbsp->pdata->buffer_size)
 933 #define valid_threshold(m, val)         ((val) <= max_thres(m))
 934 #define THRESHOLD_PROP_BUILDER(prop)                                    \
 935 static ssize_t prop##_show(struct device *dev,                          \
 936                         struct device_attribute *attr, char *buf)       \
 937 {                                                                       \
 938         struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);                \
 939                                                                         \
 940         return sprintf(buf, "%u\n", mcbsp->prop);                       \
 941 }                                                                       \
 942                                                                         \
 943 static ssize_t prop##_store(struct device *dev,                         \
 944                                 struct device_attribute *attr,          \
 945                                 const char *buf, size_t size)           \
 946 {                                                                       \
 947         struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);                \
 948         unsigned long val;                                              \
 949         int status;                                                     \
 950                                                                         \
 951         status = strict_strtoul(buf, 0, &val);                          \
 952         if (status)                                                     \
 953                 return status;                                          \
 954                                                                         \
 955         if (!valid_threshold(mcbsp, val))                               \
 956                 return -EDOM;                                           \
 957                                                                         \
 958         mcbsp->prop = val;                                              \
 959         return size;                                                    \
 960 }                                                                       \
 961                                                                         \
 962 static DEVICE_ATTR(prop, 0644, prop##_show, prop##_store);
 963
 964 THRESHOLD_PROP_BUILDER(max_tx_thres);
 965 THRESHOLD_PROP_BUILDER(max_rx_thres);
 966
 967 static const char *dma_op_modes[] = {
 968         "element", "threshold", "frame",
 969 };
 970
 971 static ssize_t dma_op_mode_show(struct device *dev,
 972                         struct device_attribute *attr, char *buf)
 973 {
 974         struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);
 975         int dma_op_mode, i = 0;
 976         ssize_t len = 0;
 977         const char * const *s;
 978
 979         dma_op_mode = mcbsp->dma_op_mode;
 980
 981         for (s = &dma_op_modes[i]; i < ARRAY_SIZE(dma_op_modes); s++, i++) {
 982                 if (dma_op_mode == i)
 983                         len += sprintf(buf + len, "[%s] ", *s);
 984                 else
 985                         len += sprintf(buf + len, "%s ", *s);
 986         }
 987         len += sprintf(buf + len, "\n");
 988
 989         return len;
 990 }
 991
 992 static ssize_t dma_op_mode_store(struct device *dev,
 993                                 struct device_attribute *attr,
 994                                 const char *buf, size_t size)
 995 {
 996         struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);
 997         const char * const *s;
 998         int i = 0;
 999
1000         for (s = &dma_op_modes[i]; i < ARRAY_SIZE(dma_op_modes); s++, i++)
1001                 if (sysfs_streq(buf, *s))
1002                         break;
1003
1004         if (i == ARRAY_SIZE(dma_op_modes))
1005                 return -EINVAL;
1006
1007         spin_lock_irq(&mcbsp->lock);
1008         if (!mcbsp->free) {
1009                 size = -EBUSY;
1010                 goto unlock;
1011         }
1012         mcbsp->dma_op_mode = i;
1013
1014 unlock:
1015         spin_unlock_irq(&mcbsp->lock);
1016
1017         return size;
1018 }
1019
1020 static DEVICE_ATTR(dma_op_mode, 0644, dma_op_mode_show, dma_op_mode_store);
1021
1022 static const struct attribute *additional_attrs[] = {
1023         &dev_attr_max_tx_thres.attr,
1024         &dev_attr_max_rx_thres.attr,
1025         &dev_attr_dma_op_mode.attr,
1026         NULL,
1027 };
1028
1029 static const struct attribute_group additional_attr_group = {
1030         .attrs = (struct attribute **)additional_attrs,
1031 };
1032
1033 #ifdef CONFIG_ARCH_OMAP3
1034 static ssize_t st_taps_show(struct device *dev,
1035                             struct device_attribute *attr, char *buf)
1036 {
1037         struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);
1038         struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
1039         ssize_t status = 0;
1040         int i;
1041
1042         spin_lock_irq(&mcbsp->lock);
1043         for (i = 0; i < st_data->nr_taps; i++)
1044                 status += sprintf(&buf[status], (i ? ", %d" : "%d"),
1045                                   st_data->taps[i]);
1046         if (i)
1047                 status += sprintf(&buf[status], "\n");
1048         spin_unlock_irq(&mcbsp->lock);
1049
1050         return status;
1051 }
1052
1053 static ssize_t st_taps_store(struct device *dev,
1054                              struct device_attribute *attr,
1055                              const char *buf, size_t size)
1056 {
1057         struct omap_mcbsp *mcbsp = dev_get_drvdata(dev);
1058         struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
1059         int val, tmp, status, i = 0;
1060
1061         spin_lock_irq(&mcbsp->lock);
1062         memset(st_data->taps, 0, sizeof(st_data->taps));
1063         st_data->nr_taps = 0;
1064
1065         do {
1066                 status = sscanf(buf, "%d%n", &val, &tmp);
1067                 if (status < 0 || status == 0) {
1068                         size = -EINVAL;
1069                         goto out;
1070                 }
1071                 if (val < -32768 || val > 32767) {
1072                         size = -EINVAL;
1073                         goto out;
1074                 }
1075                 st_data->taps[i++] = val;
1076                 buf += tmp;
1077                 if (*buf != ',')
1078                         break;
1079                 buf++;
1080         } while (1);
1081
1082         st_data->nr_taps = i;
1083
1084 out:
1085         spin_unlock_irq(&mcbsp->lock);
1086
1087         return size;
1088 }
1089
1090 static DEVICE_ATTR(st_taps, 0644, st_taps_show, st_taps_store);
1091
1092 static const struct attribute *sidetone_attrs[] = {
1093         &dev_attr_st_taps.attr,
1094         NULL,
1095 };
1096
1097 static const struct attribute_group sidetone_attr_group = {
1098         .attrs = (struct attribute **)sidetone_attrs,
1099 };
1100
1101 static int __devinit omap_st_add(struct omap_mcbsp *mcbsp)
1102 {
1103         struct platform_device *pdev;
1104         struct resource *res;
1105         struct omap_mcbsp_st_data *st_data;
1106         int err;
1107
1108         st_data = kzalloc(sizeof(*mcbsp->st_data), GFP_KERNEL);
1109         if (!st_data) {
1110                 err = -ENOMEM;
1111                 goto err1;
1112         }
1113
1114         pdev = container_of(mcbsp->dev, struct platform_device, dev);
1115
1116         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sidetone");
1117         st_data->io_base_st = ioremap(res->start, resource_size(res));
1118         if (!st_data->io_base_st) {
1119                 err = -ENOMEM;
1120                 goto err2;
1121         }
1122
1123         err = sysfs_create_group(&mcbsp->dev->kobj, &sidetone_attr_group);
1124         if (err)
1125                 goto err3;
1126
1127         mcbsp->st_data = st_data;
1128         return 0;
1129
1130 err3:
1131         iounmap(st_data->io_base_st);
1132 err2:
1133         kfree(st_data);
1134 err1:
1135         return err;
1136
1137 }
1138
1139 static void __devexit omap_st_remove(struct omap_mcbsp *mcbsp)
1140 {
1141         struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
1142
1143         if (st_data) {
1144                 sysfs_remove_group(&mcbsp->dev->kobj, &sidetone_attr_group);
1145                 iounmap(st_data->io_base_st);
1146                 kfree(st_data);
1147         }
1148 }
1149
1150 static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp)
1151 {
1152         if (cpu_is_omap34xx())
1153                 if (mcbsp->id == 2 || mcbsp->id == 3)
1154                         if (omap_st_add(mcbsp))
1155                                 dev_warn(mcbsp->dev,
1156                                  "Unable to create sidetone controls\n");
1157 }
1158
1159 static inline void __devexit omap34xx_device_exit(struct omap_mcbsp *mcbsp)
1160 {
1161         if (cpu_is_omap34xx())
1162                 if (mcbsp->id == 2 || mcbsp->id == 3)
1163                         omap_st_remove(mcbsp);
1164 }
1165 #else
1166 static inline void __devinit omap34xx_device_init(struct omap_mcbsp *mcbsp) {}
1167 static inline void __devexit omap34xx_device_exit(struct omap_mcbsp *mcbsp) {}
1168 #endif /* CONFIG_ARCH_OMAP3 */
1169
1170 /*
1171  * McBSP1 and McBSP3 are directly mapped on 1610 and 1510.
1172  * 730 has only 2 McBSP, and both of them are MPU peripherals.
1173  */
1174 static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
1175 {
1176         struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
1177         struct omap_mcbsp *mcbsp;
1178         int id = pdev->id - 1;
1179         struct resource *res;
1180         int ret = 0;
1181
1182         if (!pdata) {
1183                 dev_err(&pdev->dev, "McBSP device initialized without"
1184                                 "platform data\n");
1185                 ret = -EINVAL;
1186                 goto exit;
1187         }
1188
1189         dev_dbg(&pdev->dev, "Initializing OMAP McBSP (%d).\n", pdev->id);
1190
1191         if (id >= omap_mcbsp_count) {
1192                 dev_err(&pdev->dev, "Invalid McBSP device id (%d)\n", id);
1193                 ret = -EINVAL;
1194                 goto exit;
1195         }
1196
1197         mcbsp = kzalloc(sizeof(struct omap_mcbsp), GFP_KERNEL);
1198         if (!mcbsp) {
1199                 ret = -ENOMEM;
1200                 goto exit;
1201         }
1202
1203         spin_lock_init(&mcbsp->lock);
1204         mcbsp->id = id + 1;
1205         mcbsp->free = true;
1206
1207         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu");
1208         if (!res) {
1209                 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1210                 if (!res) {
1211                         dev_err(&pdev->dev, "%s:mcbsp%d has invalid memory"
1212                                         "resource\n", __func__, pdev->id);
1213                         ret = -ENOMEM;
1214                         goto exit;
1215                 }
1216         }
1217         mcbsp->phys_base = res->start;
1218         mcbsp->reg_cache_size = resource_size(res);
1219         mcbsp->io_base = ioremap(res->start, resource_size(res));
1220         if (!mcbsp->io_base) {
1221                 ret = -ENOMEM;
1222                 goto err_ioremap;
1223         }
1224
1225         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma");
1226         if (!res)
1227                 mcbsp->phys_dma_base = mcbsp->phys_base;
1228         else
1229                 mcbsp->phys_dma_base = res->start;
1230
1231         mcbsp->tx_irq = platform_get_irq_byname(pdev, "tx");
1232         mcbsp->rx_irq = platform_get_irq_byname(pdev, "rx");
1233
1234         /* From OMAP4 there will be a single irq line */
1235         if (mcbsp->tx_irq == -ENXIO)
1236                 mcbsp->tx_irq = platform_get_irq(pdev, 0);
1237
1238         res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx");
1239         if (!res) {
1240                 dev_err(&pdev->dev, "%s:mcbsp%d has invalid rx DMA channel\n",
1241                                         __func__, pdev->id);
1242                 ret = -ENODEV;
1243                 goto err_res;
1244         }
1245         mcbsp->dma_rx_sync = res->start;
1246
1247         res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx");
1248         if (!res) {
1249                 dev_err(&pdev->dev, "%s:mcbsp%d has invalid tx DMA channel\n",
1250                                         __func__, pdev->id);
1251                 ret = -ENODEV;
1252                 goto err_res;
1253         }
1254         mcbsp->dma_tx_sync = res->start;
1255
1256         mcbsp->fclk = clk_get(&pdev->dev, "fck");
1257         if (IS_ERR(mcbsp->fclk)) {
1258                 ret = PTR_ERR(mcbsp->fclk);
1259                 dev_err(&pdev->dev, "unable to get fck: %d\n", ret);
1260                 goto err_res;
1261         }
1262
1263         mcbsp->pdata = pdata;
1264         mcbsp->dev = &pdev->dev;
1265         mcbsp_ptr[id] = mcbsp;
1266         platform_set_drvdata(pdev, mcbsp);
1267         pm_runtime_enable(mcbsp->dev);
1268
1269         mcbsp->dma_op_mode = MCBSP_DMA_MODE_ELEMENT;
1270         if (mcbsp->pdata->buffer_size) {
1271                 /*
1272                  * Initially configure the maximum thresholds to a safe value.
1273                  * The McBSP FIFO usage with these values should not go under
1274                  * 16 locations.
1275                  * If the whole FIFO without safety buffer is used, than there
1276                  * is a possibility that the DMA will be not able to push the
1277                  * new data on time, causing channel shifts in runtime.
1278                  */
1279                 mcbsp->max_tx_thres = max_thres(mcbsp) - 0x10;
1280                 mcbsp->max_rx_thres = max_thres(mcbsp) - 0x10;
1281
1282                 ret = sysfs_create_group(&mcbsp->dev->kobj,
1283                                          &additional_attr_group);
1284                 if (ret) {
1285                         dev_err(mcbsp->dev,
1286                                 "Unable to create additional controls\n");
1287                         goto err_thres;
1288                 }
1289         } else {
1290                 mcbsp->max_tx_thres = -EINVAL;
1291                 mcbsp->max_rx_thres = -EINVAL;
1292         }
1293
1294         /* Initialize mcbsp properties for OMAP34XX if needed / applicable */
1295         omap34xx_device_init(mcbsp);
1296
1297         return 0;
1298
1299 err_thres:
1300         clk_put(mcbsp->fclk);
1301 err_res:
1302         iounmap(mcbsp->io_base);
1303 err_ioremap:
1304         kfree(mcbsp);
1305 exit:
1306         return ret;
1307 }
1308
1309 static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
1310 {
1311         struct omap_mcbsp *mcbsp = platform_get_drvdata(pdev);
1312
1313         platform_set_drvdata(pdev, NULL);
1314         if (mcbsp) {
1315
1316                 if (mcbsp->pdata && mcbsp->pdata->ops &&
1317                                 mcbsp->pdata->ops->free)
1318                         mcbsp->pdata->ops->free(mcbsp->id);
1319
1320                 if (mcbsp->pdata->buffer_size)
1321                         sysfs_remove_group(&mcbsp->dev->kobj,
1322                                            &additional_attr_group);
1323
1324                 omap34xx_device_exit(mcbsp);
1325
1326                 clk_put(mcbsp->fclk);
1327
1328                 iounmap(mcbsp->io_base);
1329                 kfree(mcbsp);
1330         }
1331
1332         return 0;
1333 }
1334
1335 static struct platform_driver omap_mcbsp_driver = {
1336         .probe          = omap_mcbsp_probe,
1337         .remove         = __devexit_p(omap_mcbsp_remove),
1338         .driver         = {
1339                 .name   = "omap-mcbsp",
1340         },
1341 };
1342
1343 int __init omap_mcbsp_init(void)
1344 {
1345         /* Register the McBSP driver */
1346         return platform_driver_register(&omap_mcbsp_driver);
1347 }