2 * arch/arm/plat-omap/include/mach/sram.h
4 * Interface for functions that need to be run in internal SRAM
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #ifndef __ARCH_ARM_OMAP_SRAM_H
12 #define __ARCH_ARM_OMAP_SRAM_H
14 extern int __init omap_sram_init(void);
15 extern void * omap_sram_push(void * start, unsigned long size);
16 extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl);
18 extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
19 u32 base_cs, u32 force_unlock);
20 extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
22 extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
24 extern u32 omap3_configure_core_dpll(u32 sdrc_rfr_ctrl,
26 u32 sdrc_actim_ctrlb, u32 m2,
27 u32 unlock_dll, u32 f, u32 sdrc_mr,
30 /* Do not use these */
31 extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
32 extern unsigned long omap1_sram_reprogram_clock_sz;
34 extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
35 extern unsigned long omap24xx_sram_reprogram_clock_sz;
37 extern void omap242x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
38 u32 base_cs, u32 force_unlock);
39 extern unsigned long omap242x_sram_ddr_init_sz;
41 extern u32 omap242x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val,
43 extern unsigned long omap242x_sram_set_prcm_sz;
45 extern void omap242x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
47 extern unsigned long omap242x_sram_reprogram_sdrc_sz;
50 extern void omap243x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
51 u32 base_cs, u32 force_unlock);
52 extern unsigned long omap243x_sram_ddr_init_sz;
54 extern u32 omap243x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val,
56 extern unsigned long omap243x_sram_set_prcm_sz;
58 extern void omap243x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
60 extern unsigned long omap243x_sram_reprogram_sdrc_sz;
63 extern u32 omap3_sram_configure_core_dpll(u32 sdrc_rfr_ctrl,
65 u32 sdrc_actim_ctrlb, u32 m2,
66 u32 unlock_dll, u32 f, u32 sdrc_mr,
68 extern unsigned long omap3_sram_configure_core_dpll_sz;