arch/arm/plat-omap/include/mach/display.h

   1 /*
   2  * linux/include/asm-arm/arch-omap/display.h
   3  *
   4  * Copyright (C) 2008 Nokia Corporation
   5  * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 as published by
   9  * the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  *
  16  * You should have received a copy of the GNU General Public License along with
  17  * this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #ifndef __ASM_ARCH_OMAP_DISPLAY_H
  21 #define __ASM_ARCH_OMAP_DISPLAY_H
  22
  23 #include <linux/list.h>
  24 #include <linux/kobject.h>
  25 #include <asm/atomic.h>
  26
  27 #define DISPC_IRQ_FRAMEDONE             (1 << 0)
  28 #define DISPC_IRQ_VSYNC                 (1 << 1)
  29 #define DISPC_IRQ_EVSYNC_EVEN           (1 << 2)
  30 #define DISPC_IRQ_EVSYNC_ODD            (1 << 3)
  31 #define DISPC_IRQ_ACBIAS_COUNT_STAT     (1 << 4)
  32 #define DISPC_IRQ_PROG_LINE_NUM         (1 << 5)
  33 #define DISPC_IRQ_GFX_FIFO_UNDERFLOW    (1 << 6)
  34 #define DISPC_IRQ_GFX_END_WIN           (1 << 7)
  35 #define DISPC_IRQ_PAL_GAMMA_MASK        (1 << 8)
  36 #define DISPC_IRQ_OCP_ERR               (1 << 9)
  37 #define DISPC_IRQ_VID1_FIFO_UNDERFLOW   (1 << 10)
  38 #define DISPC_IRQ_VID1_END_WIN          (1 << 11)
  39 #define DISPC_IRQ_VID2_FIFO_UNDERFLOW   (1 << 12)
  40 #define DISPC_IRQ_VID2_END_WIN          (1 << 13)
  41 #define DISPC_IRQ_SYNC_LOST             (1 << 14)
  42 #define DISPC_IRQ_SYNC_LOST_DIGIT       (1 << 15)
  43 #define DISPC_IRQ_WAKEUP                (1 << 16)
  44
  45 enum omap_display_type {
  46         OMAP_DISPLAY_TYPE_NONE          = 0,
  47         OMAP_DISPLAY_TYPE_DPI           = 1 << 0,
  48         OMAP_DISPLAY_TYPE_DBI           = 1 << 1,
  49         OMAP_DISPLAY_TYPE_SDI           = 1 << 2,
  50         OMAP_DISPLAY_TYPE_DSI           = 1 << 3,
  51         OMAP_DISPLAY_TYPE_VENC          = 1 << 4,
  52 };
  53
  54 enum omap_plane {
  55         OMAP_DSS_GFX    = 0,
  56         OMAP_DSS_VIDEO1 = 1,
  57         OMAP_DSS_VIDEO2 = 2
  58 };
  59
  60 enum omap_channel {
  61         OMAP_DSS_CHANNEL_LCD    = 0,
  62         OMAP_DSS_CHANNEL_DIGIT  = 1,
  63 };
  64
  65 enum omap_color_mode {
  66         OMAP_DSS_COLOR_CLUT1    = 1 << 0,  /* BITMAP 1 */
  67         OMAP_DSS_COLOR_CLUT2    = 1 << 1,  /* BITMAP 2 */
  68         OMAP_DSS_COLOR_CLUT4    = 1 << 2,  /* BITMAP 4 */
  69         OMAP_DSS_COLOR_CLUT8    = 1 << 3,  /* BITMAP 8 */
  70         OMAP_DSS_COLOR_RGB12U   = 1 << 4,  /* RGB12, 16-bit container */
  71         OMAP_DSS_COLOR_ARGB16   = 1 << 5,  /* ARGB16 */
  72         OMAP_DSS_COLOR_RGB16    = 1 << 6,  /* RGB16 */
  73         OMAP_DSS_COLOR_RGB24U   = 1 << 7,  /* RGB24, 32-bit container */
  74         OMAP_DSS_COLOR_RGB24P   = 1 << 8,  /* RGB24, 24-bit container */
  75         OMAP_DSS_COLOR_YUV2     = 1 << 9,  /* YUV2 4:2:2 co-sited */
  76         OMAP_DSS_COLOR_UYVY     = 1 << 10, /* UYVY 4:2:2 co-sited */
  77         OMAP_DSS_COLOR_ARGB32   = 1 << 11, /* ARGB32 */
  78         OMAP_DSS_COLOR_RGBA32   = 1 << 12, /* RGBA32 */
  79         OMAP_DSS_COLOR_RGBX32   = 1 << 13, /* RGBx32 */
  80
  81         OMAP_DSS_COLOR_GFX_OMAP3 =
  82                 OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
  83                 OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
  84                 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
  85                 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
  86                 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
  87                 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
  88
  89         OMAP_DSS_COLOR_VID_OMAP3 =
  90                 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
  91                 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
  92                 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
  93                 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32 |
  94                 OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_UYVY,
  95 };
  96
  97 enum omap_lcd_display_type {
  98         OMAP_DSS_LCD_DISPLAY_STN,
  99         OMAP_DSS_LCD_DISPLAY_TFT,
 100 };
 101
 102 enum omap_dss_load_mode {
 103         OMAP_DSS_LOAD_CLUT_AND_FRAME    = 0,
 104         OMAP_DSS_LOAD_CLUT_ONLY         = 1,
 105         OMAP_DSS_LOAD_FRAME_ONLY        = 2,
 106         OMAP_DSS_LOAD_CLUT_ONCE_FRAME   = 3,
 107 };
 108
 109 enum omap_dss_color_key_type {
 110         OMAP_DSS_COLOR_KEY_GFX_DST = 0,
 111         OMAP_DSS_COLOR_KEY_VID_SRC = 1,
 112 };
 113
 114 enum omap_rfbi_te_mode {
 115         OMAP_DSS_RFBI_TE_MODE_1 = 1,
 116         OMAP_DSS_RFBI_TE_MODE_2 = 2,
 117 };
 118
 119 enum omap_panel_config {
 120         OMAP_DSS_LCD_IVS                = 1<<0,
 121         OMAP_DSS_LCD_IHS                = 1<<1,
 122         OMAP_DSS_LCD_IPC                = 1<<2,
 123         OMAP_DSS_LCD_IEO                = 1<<3,
 124         OMAP_DSS_LCD_RF                 = 1<<4,
 125         OMAP_DSS_LCD_ONOFF              = 1<<5,
 126
 127         OMAP_DSS_LCD_TFT                = 1<<20,
 128 };
 129
 130 enum omap_dss_venc_type {
 131         OMAP_DSS_VENC_TYPE_COMPOSITE,
 132         OMAP_DSS_VENC_TYPE_SVIDEO,
 133 };
 134
 135 struct omap_display;
 136 struct omap_panel;
 137 struct omap_ctrl;
 138
 139 /* RFBI */
 140
 141 struct rfbi_timings {
 142         int cs_on_time;
 143         int cs_off_time;
 144         int we_on_time;
 145         int we_off_time;
 146         int re_on_time;
 147         int re_off_time;
 148         int we_cycle_time;
 149         int re_cycle_time;
 150         int cs_pulse_width;
 151         int access_time;
 152
 153         int clk_div;
 154
 155         u32 tim[5];             /* set by rfbi_convert_timings() */
 156
 157         int converted;
 158 };
 159
 160 void omap_rfbi_write_command(const void *buf, u32 len);
 161 void omap_rfbi_read_data(void *buf, u32 len);
 162 void omap_rfbi_write_data(const void *buf, u32 len);
 163 void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
 164                 u16 x, u16 y,
 165                 u16 w, u16 h);
 166 int omap_rfbi_enable_te(bool enable, unsigned line);
 167 int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
 168                              unsigned hs_pulse_time, unsigned vs_pulse_time,
 169                              int hs_pol_inv, int vs_pol_inv, int extif_div);
 170
 171 /* DSI */
 172 int dsi_vc_dcs_write(int channel, u8 *data, int len);
 173 int dsi_vc_dcs_write_nosync(int channel, u8 *data, int len);
 174 int dsi_vc_dcs_read(int channel, u8 dcs_cmd, u8 *buf, int buflen);
 175 int dsi_vc_set_max_rx_packet_size(int channel, u16 len);
 176 int dsi_vc_send_null(int channel);
 177
 178 /* Board specific data */
 179 struct omap_dss_display_config {
 180         enum omap_display_type type;
 181
 182         union {
 183                 struct {
 184                         u8 data_lines;
 185                 } dpi;
 186
 187                 struct {
 188                         u8 channel;
 189                         u8 data_lines;
 190                 } rfbi;
 191
 192                 struct {
 193                         u8 datapairs;
 194                 } sdi;
 195
 196                 struct {
 197                         u8 clk_lane;
 198                         u8 clk_pol;
 199                         u8 data1_lane;
 200                         u8 data1_pol;
 201                         u8 data2_lane;
 202                         u8 data2_pol;
 203                         unsigned long ddr_clk_hz;
 204                 } dsi;
 205
 206                 struct {
 207                         enum omap_dss_venc_type type;
 208                 } venc;
 209         } u;
 210
 211         int panel_reset_gpio;
 212         int ctrl_reset_gpio;
 213
 214         int max_backlight_level;
 215
 216         const char *name;               /* for debug */
 217         const char *ctrl_name;
 218         const char *panel_name;
 219
 220         void *panel_data;
 221         void *ctrl_data;
 222
 223         /* platform specific enable/disable */
 224         int (*panel_enable)(struct omap_display *display);
 225         void (*panel_disable)(struct omap_display *display);
 226         int (*ctrl_enable)(struct omap_display *display);
 227         void (*ctrl_disable)(struct omap_display *display);
 228         int (*set_backlight)(struct omap_display *display,
 229                         int level);
 230         int (*get_backlight)(struct omap_display *display);
 231 };
 232
 233 struct device;
 234
 235 /* Board specific data */
 236 struct  omap_dss_board_info {
 237         unsigned (*get_last_off_on_transaction_id)(struct device *dev);
 238         int (*dsi_power_up)(void);
 239         void (*dsi_power_down)(void);
 240         int num_displays;
 241         struct omap_dss_display_config *displays[];
 242 };
 243
 244 struct omap_ctrl {
 245         struct module *owner;
 246
 247         const char *name;
 248
 249         int (*init)(struct omap_display *display);
 250         void (*cleanup)(struct omap_display *display);
 251         int (*enable)(struct omap_display *display);
 252         void (*disable)(struct omap_display *display);
 253         int (*suspend)(struct omap_display *display);
 254         int (*resume)(struct omap_display *display);
 255         void (*setup_update)(struct omap_display *display,
 256                              u16 x, u16 y, u16 w, u16 h);
 257
 258         int (*enable_te)(struct omap_display *display, bool enable);
 259
 260         u8 (*get_rotate)(struct omap_display *display);
 261         int (*set_rotate)(struct omap_display *display, u8 rotate);
 262
 263         bool (*get_mirror)(struct omap_display *display);
 264         int (*set_mirror)(struct omap_display *display, bool enable);
 265
 266         int (*run_test)(struct omap_display *display, int test);
 267         int (*memory_read)(struct omap_display *display,
 268                         void *buf, size_t size,
 269                         u16 x, u16 y, u16 w, u16 h);
 270
 271         u8 pixel_size;
 272
 273         struct rfbi_timings timings;
 274
 275         void *priv;
 276 };
 277
 278 struct omap_video_timings {
 279         /* Unit: pixels */
 280         u16 x_res;
 281         /* Unit: pixels */
 282         u16 y_res;
 283         /* Unit: KHz */
 284         u32 pixel_clock;
 285         /* Unit: pixel clocks */
 286         u16 hsw;        /* Horizontal synchronization pulse width */
 287         /* Unit: pixel clocks */
 288         u16 hfp;        /* Horizontal front porch */
 289         /* Unit: pixel clocks */
 290         u16 hbp;        /* Horizontal back porch */
 291         /* Unit: line clocks */
 292         u16 vsw;        /* Vertical synchronization pulse width */
 293         /* Unit: line clocks */
 294         u16 vfp;        /* Vertical front porch */
 295         /* Unit: line clocks */
 296         u16 vbp;        /* Vertical back porch */
 297
 298 };
 299
 300 #ifdef CONFIG_OMAP2_DSS_VENC
 301 /* Hardcoded timings for tv modes. Venc only uses these to
 302  * identify the mode, and does not actually use the configs
 303  * itself. However, the configs should be something that
 304  * a normal monitor can also show */
 305 const extern struct omap_video_timings omap_dss_pal_timings;
 306 const extern struct omap_video_timings omap_dss_ntsc_timings;
 307 #endif
 308
 309 struct omap_panel {
 310         struct module *owner;
 311
 312         const char *name;
 313
 314         int (*init)(struct omap_display *display);
 315         void (*cleanup)(struct omap_display *display);
 316         int (*remove)(struct omap_display *display);
 317         int (*enable)(struct omap_display *display);
 318         void (*disable)(struct omap_display *display);
 319         int (*suspend)(struct omap_display *display);
 320         int (*resume)(struct omap_display *display);
 321         int (*run_test)(struct omap_display *display, int test);
 322
 323         struct omap_video_timings timings;
 324
 325         int acbi;       /* ac-bias pin transitions per interrupt */
 326         /* Unit: line clocks */
 327         int acb;        /* ac-bias pin frequency */
 328
 329         enum omap_panel_config config;
 330
 331         u8 recommended_bpp;
 332
 333         void *priv;
 334 };
 335
 336 /* XXX perhaps this should be removed */
 337 enum omap_dss_overlay_managers {
 338         OMAP_DSS_OVL_MGR_LCD,
 339         OMAP_DSS_OVL_MGR_TV,
 340 };
 341
 342 struct omap_overlay_manager;
 343
 344 enum omap_dss_rotation_type {
 345         OMAP_DSS_ROT_DMA = 0,
 346         OMAP_DSS_ROT_VRFB = 1,
 347 };
 348
 349 struct omap_overlay_info {
 350         bool enabled;
 351
 352         u32 paddr;
 353         void __iomem *vaddr;
 354         u16 screen_width;
 355         u16 width;
 356         u16 height;
 357         enum omap_color_mode color_mode;
 358         u8 rotation;
 359         enum omap_dss_rotation_type rotation_type;
 360         bool mirror;
 361
 362         u16 pos_x;
 363         u16 pos_y;
 364         u16 out_width;  /* if 0, out_width == width */
 365         u16 out_height; /* if 0, out_height == height */
 366 };
 367
 368 enum omap_overlay_caps {
 369         OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
 370         OMAP_DSS_OVL_CAP_DISPC = 1 << 1,
 371 };
 372
 373 struct omap_overlay {
 374         struct kobject kobj;
 375         struct list_head list;
 376
 377         const char *name;
 378         int id;
 379         struct omap_overlay_manager *manager;
 380         enum omap_color_mode supported_modes;
 381         struct omap_overlay_info info;
 382         enum omap_overlay_caps caps;
 383
 384         int (*set_manager)(struct omap_overlay *ovl,
 385                 struct omap_overlay_manager *mgr);
 386         int (*unset_manager)(struct omap_overlay *ovl);
 387
 388         int (*set_overlay_info)(struct omap_overlay *ovl,
 389                         struct omap_overlay_info *info);
 390         void (*get_overlay_info)(struct omap_overlay *ovl,
 391                         struct omap_overlay_info *info);
 392 };
 393
 394 enum omap_overlay_manager_caps {
 395         OMAP_DSS_OVL_MGR_CAP_DISPC = 1 << 0,
 396 };
 397
 398 struct omap_overlay_manager {
 399         struct kobject kobj;
 400         struct list_head list;
 401
 402         const char *name;
 403         int id;
 404         enum omap_overlay_manager_caps caps;
 405         struct omap_display *display;
 406         int num_overlays;
 407         struct omap_overlay **overlays;
 408         enum omap_display_type supported_displays;
 409
 410         int (*set_display)(struct omap_overlay_manager *mgr,
 411                 struct omap_display *display);
 412         int (*unset_display)(struct omap_overlay_manager *mgr);
 413
 414         int (*apply)(struct omap_overlay_manager *mgr);
 415
 416         void (*set_default_color)(struct omap_overlay_manager *mgr, u32 color);
 417         void (*set_trans_key)(struct omap_overlay_manager *mgr,
 418                 enum omap_dss_color_key_type type,
 419                 u32 trans_key);
 420         void (*enable_trans_key)(struct omap_overlay_manager *mgr,
 421                 bool enable);
 422 };
 423
 424 enum omap_display_caps {
 425         OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0,
 426 };
 427
 428 enum omap_dss_update_mode {
 429         OMAP_DSS_UPDATE_DISABLED = 0,
 430         OMAP_DSS_UPDATE_AUTO,
 431         OMAP_DSS_UPDATE_MANUAL,
 432 };
 433
 434 enum omap_dss_display_state {
 435         OMAP_DSS_DISPLAY_DISABLED = 0,
 436         OMAP_DSS_DISPLAY_ACTIVE,
 437         OMAP_DSS_DISPLAY_SUSPENDED,
 438 };
 439
 440 struct omap_display {
 441         struct kobject kobj;
 442         struct list_head list;
 443
 444         /*atomic_t ref_count;*/
 445         int ref_count;
 446         /* helper variable for driver suspend/resume */
 447         int activate_after_resume;
 448
 449         enum omap_display_type type;
 450         const char *name;
 451
 452         enum omap_display_caps caps;
 453
 454         struct omap_overlay_manager *manager;
 455
 456         enum omap_dss_display_state state;
 457
 458         struct omap_dss_display_config hw_config; /* board specific data */
 459         struct omap_ctrl *ctrl;                 /* static common data */
 460         struct omap_panel *panel;               /* static common data */
 461
 462         int (*enable)(struct omap_display *display);
 463         void (*disable)(struct omap_display *display);
 464
 465         int (*suspend)(struct omap_display *display);
 466         int (*resume)(struct omap_display *display);
 467
 468         void (*get_resolution)(struct omap_display *display,
 469                         u16 *xres, u16 *yres);
 470         int (*get_recommended_bpp)(struct omap_display *display);
 471
 472         int (*check_timings)(struct omap_display *display,
 473                         struct omap_video_timings *timings);
 474         void (*set_timings)(struct omap_display *display,
 475                         struct omap_video_timings *timings);
 476         void (*get_timings)(struct omap_display *display,
 477                         struct omap_video_timings *timings);
 478         int (*update)(struct omap_display *display,
 479                                u16 x, u16 y, u16 w, u16 h);
 480         int (*sync)(struct omap_display *display);
 481         int (*wait_vsync)(struct omap_display *display);
 482
 483         int (*set_update_mode)(struct omap_display *display,
 484                         enum omap_dss_update_mode);
 485         enum omap_dss_update_mode (*get_update_mode)
 486                 (struct omap_display *display);
 487
 488         int (*enable_te)(struct omap_display *display, bool enable);
 489         int (*get_te)(struct omap_display *display);
 490
 491         u8 (*get_rotate)(struct omap_display *display);
 492         int (*set_rotate)(struct omap_display *display, u8 rotate);
 493
 494         bool (*get_mirror)(struct omap_display *display);
 495         int (*set_mirror)(struct omap_display *display, bool enable);
 496
 497         int (*run_test)(struct omap_display *display, int test);
 498         int (*memory_read)(struct omap_display *display,
 499                         void *buf, size_t size,
 500                         u16 x, u16 y, u16 w, u16 h);
 501
 502         void (*configure_overlay)(struct omap_overlay *overlay);
 503 };
 504
 505 int omap_dss_get_num_displays(void);
 506 struct omap_display *omap_dss_get_display(int no);
 507 void omap_dss_put_display(struct omap_display *display);
 508
 509 void omap_dss_register_ctrl(struct omap_ctrl *ctrl);
 510 void omap_dss_unregister_ctrl(struct omap_ctrl *ctrl);
 511
 512 void omap_dss_register_panel(struct omap_panel *panel);
 513 void omap_dss_unregister_panel(struct omap_panel *panel);
 514
 515 int omap_dss_get_num_overlay_managers(void);
 516 struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
 517
 518 int omap_dss_get_num_overlays(void);
 519 struct omap_overlay *omap_dss_get_overlay(int num);
 520
 521 typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
 522 int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
 523 int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
 524
 525 int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout);
 526 int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask,
 527                 unsigned long timeout);
 528
 529 #endif