arch/arm/mach-tegra/board-dt-tegra30.c

   1 /*
   2  * arch/arm/mach-tegra/board-dt-tegra30.c
   3  *
   4  * NVIDIA Tegra30 device tree board support
   5  *
   6  * Copyright (C) 2011 NVIDIA Corporation
   7  *
   8  * Derived from:
   9  *
  10  * arch/arm/mach-tegra/board-dt-tegra20.c
  11  *
  12  * Copyright (C) 2010 Secret Lab Technologies, Ltd.
  13  * Copyright (C) 2010 Google, Inc.
  14  *
  15  * This software is licensed under the terms of the GNU General Public
  16  * License version 2, as published by the Free Software Foundation, and
  17  * may be copied, distributed, and modified under those terms.
  18  *
  19  * This program is distributed in the hope that it will be useful,
  20  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22  * GNU General Public License for more details.
  23  *
  24  */
  25
  26 #include <linux/kernel.h>
  27 #include <linux/of.h>
  28 #include <linux/of_address.h>
  29 #include <linux/of_fdt.h>
  30 #include <linux/of_irq.h>
  31 #include <linux/of_platform.h>
  32
  33 #include <asm/mach/arch.h>
  34 #include <asm/hardware/gic.h>
  35
  36 #include <mach/iomap.h>
  37
  38 #include "board.h"
  39 #include "clock.h"
  40
  41 struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = {
  42         OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000000, "sdhci-tegra.0", NULL),
  43         OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000200, "sdhci-tegra.1", NULL),
  44         OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000400, "sdhci-tegra.2", NULL),
  45         OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000600, "sdhci-tegra.3", NULL),
  46         OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000C000, "tegra-i2c.0", NULL),
  47         OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000C400, "tegra-i2c.1", NULL),
  48         OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000C500, "tegra-i2c.2", NULL),
  49         OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000C700, "tegra-i2c.3", NULL),
  50         OF_DEV_AUXDATA("nvidia,tegra20-i2c", 0x7000D000, "tegra-i2c.4", NULL),
  51         OF_DEV_AUXDATA("nvidia,tegra30-ahub", 0x70080000, "tegra30-ahub", NULL),
  52         OF_DEV_AUXDATA("nvidia,tegra30-apbdma", 0x6000a000, "tegra-apbdma", NULL),
  53         OF_DEV_AUXDATA("nvidia,tegra30-pwm", TEGRA_PWFM_BASE, "tegra-pwm", NULL),
  54         {}
  55 };
  56
  57 static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
  58         /* name         parent          rate            enabled */
  59         { "uarta",      "pll_p",        408000000,      true },
  60         { "pll_a",      "pll_p_out1",   564480000,      true },
  61         { "pll_a_out0", "pll_a",        11289600,       true },
  62         { "extern1",    "pll_a_out0",   0,              true },
  63         { "clk_out_1",  "extern1",      0,              true },
  64         { "i2s0",       "pll_a_out0",   11289600,       false},
  65         { "i2s1",       "pll_a_out0",   11289600,       false},
  66         { "i2s2",       "pll_a_out0",   11289600,       false},
  67         { "i2s3",       "pll_a_out0",   11289600,       false},
  68         { "i2s4",       "pll_a_out0",   11289600,       false},
  69         { NULL,         NULL,           0,              0},
  70 };
  71
  72 static void __init tegra30_dt_init(void)
  73 {
  74         tegra_clk_init_from_table(tegra_dt_clk_init_table);
  75
  76         of_platform_populate(NULL, of_default_bus_match_table,
  77                                 tegra30_auxdata_lookup, NULL);
  78 }
  79
  80 static const char *tegra30_dt_board_compat[] = {
  81         "nvidia,tegra30",
  82         NULL
  83 };
  84
  85 DT_MACHINE_START(TEGRA30_DT, "NVIDIA Tegra30 (Flattened Device Tree)")
  86         .map_io         = tegra_map_common_io,
  87         .init_early     = tegra30_init_early,
  88         .init_irq       = tegra_dt_init_irq,
  89         .handle_irq     = gic_handle_irq,
  90         .timer          = &tegra_timer,
  91         .init_machine   = tegra30_dt_init,
  92         .init_late      = tegra_init_late,
  93         .restart        = tegra_assert_system_reset,
  94         .dt_compat      = tegra30_dt_board_compat,
  95 MACHINE_END