arch/arm/mach-s5pv310/mach-smdkv310.c

   1 /* linux/arch/arm/mach-s5pv310/mach-smdkv310.c
   2  *
   3  * Copyright (c) 2010 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com/
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9 */
  10
  11 #include <linux/serial_core.h>
  12 #include <linux/gpio.h>
  13 #include <linux/mmc/host.h>
  14 #include <linux/platform_device.h>
  15
  16 #include <asm/mach/arch.h>
  17 #include <asm/mach-types.h>
  18
  19 #include <plat/regs-serial.h>
  20 #include <plat/s5pv310.h>
  21 #include <plat/cpu.h>
  22 #include <plat/devs.h>
  23 #include <plat/sdhci.h>
  24
  25 #include <mach/map.h>
  26
  27 /* Following are default values for UCON, ULCON and UFCON UART registers */
  28 #define SMDKV310_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
  29                                  S3C2410_UCON_RXILEVEL |        \
  30                                  S3C2410_UCON_TXIRQMODE |       \
  31                                  S3C2410_UCON_RXIRQMODE |       \
  32                                  S3C2410_UCON_RXFIFO_TOI |      \
  33                                  S3C2443_UCON_RXERR_IRQEN)
  34
  35 #define SMDKV310_ULCON_DEFAULT  S3C2410_LCON_CS8
  36
  37 #define SMDKV310_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
  38                                  S5PV210_UFCON_TXTRIG4 |        \
  39                                  S5PV210_UFCON_RXTRIG4)
  40
  41 static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
  42         [0] = {
  43                 .hwport         = 0,
  44                 .flags          = 0,
  45                 .ucon           = SMDKV310_UCON_DEFAULT,
  46                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  47                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  48         },
  49         [1] = {
  50                 .hwport         = 1,
  51                 .flags          = 0,
  52                 .ucon           = SMDKV310_UCON_DEFAULT,
  53                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  54                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  55         },
  56         [2] = {
  57                 .hwport         = 2,
  58                 .flags          = 0,
  59                 .ucon           = SMDKV310_UCON_DEFAULT,
  60                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  61                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  62         },
  63         [3] = {
  64                 .hwport         = 3,
  65                 .flags          = 0,
  66                 .ucon           = SMDKV310_UCON_DEFAULT,
  67                 .ulcon          = SMDKV310_ULCON_DEFAULT,
  68                 .ufcon          = SMDKV310_UFCON_DEFAULT,
  69         },
  70 };
  71
  72 static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
  73         .cd_type                = S3C_SDHCI_CD_GPIO,
  74         .ext_cd_gpio            = S5PV310_GPK0(2),
  75         .ext_cd_gpio_invert     = 1,
  76         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
  77 #ifdef CONFIG_S5PV310_SDHCI_CH0_8BIT
  78         .max_width              = 8,
  79         .host_caps              = MMC_CAP_8_BIT_DATA,
  80 #endif
  81 };
  82
  83 static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
  84         .cd_type                = S3C_SDHCI_CD_GPIO,
  85         .ext_cd_gpio            = S5PV310_GPK0(2),
  86         .ext_cd_gpio_invert     = 1,
  87         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
  88 };
  89
  90 static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
  91         .cd_type                = S3C_SDHCI_CD_GPIO,
  92         .ext_cd_gpio            = S5PV310_GPK2(2),
  93         .ext_cd_gpio_invert     = 1,
  94         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
  95 #ifdef CONFIG_S5PV310_SDHCI_CH2_8BIT
  96         .max_width              = 8,
  97         .host_caps              = MMC_CAP_8_BIT_DATA,
  98 #endif
  99 };
 100
 101 static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
 102         .cd_type                = S3C_SDHCI_CD_GPIO,
 103         .ext_cd_gpio            = S5PV310_GPK2(2),
 104         .ext_cd_gpio_invert     = 1,
 105         .clk_type               = S3C_SDHCI_CLK_DIV_EXTERNAL,
 106 };
 107
 108 static struct platform_device *smdkv310_devices[] __initdata = {
 109         &s3c_device_hsmmc0,
 110         &s3c_device_hsmmc1,
 111         &s3c_device_hsmmc2,
 112         &s3c_device_hsmmc3,
 113         &s3c_device_rtc,
 114         &s3c_device_wdt,
 115 };
 116
 117 static void __init smdkv310_map_io(void)
 118 {
 119         s5p_init_io(NULL, 0, S5P_VA_CHIPID);
 120         s3c24xx_init_clocks(24000000);
 121         s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
 122 }
 123
 124 static void __init smdkv310_machine_init(void)
 125 {
 126         s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata);
 127         s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata);
 128         s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata);
 129         s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata);
 130
 131         platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
 132 }
 133
 134 MACHINE_START(SMDKV310, "SMDKV310")
 135         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
 136         /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
 137         .phys_io        = S3C_PA_UART & 0xfff00000,
 138         .io_pg_offst    = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
 139         .boot_params    = S5P_PA_SDRAM + 0x100,
 140         .init_irq       = s5pv310_init_irq,
 141         .map_io         = smdkv310_map_io,
 142         .init_machine   = smdkv310_machine_init,
 143         .timer          = &s5pv310_timer,
 144 MACHINE_END