Merge branch 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied...
[pandora-kernel.git] / arch / arm / mach-s5pv210 / mach-aquila.c
1 /* linux/arch/arm/mach-s5pv210/mach-aquila.c
2  *
3  * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4  *              http://www.samsung.com/
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9 */
10
11 #include <linux/kernel.h>
12 #include <linux/types.h>
13 #include <linux/init.h>
14 #include <linux/serial_core.h>
15 #include <linux/fb.h>
16
17 #include <asm/mach/arch.h>
18 #include <asm/mach/map.h>
19 #include <asm/setup.h>
20 #include <asm/mach-types.h>
21
22 #include <mach/map.h>
23 #include <mach/regs-clock.h>
24 #include <mach/regs-fb.h>
25
26 #include <plat/regs-serial.h>
27 #include <plat/s5pv210.h>
28 #include <plat/devs.h>
29 #include <plat/cpu.h>
30 #include <plat/fb.h>
31
32 /* Following are default values for UCON, ULCON and UFCON UART registers */
33 #define S5PV210_UCON_DEFAULT    (S3C2410_UCON_TXILEVEL |        \
34                                  S3C2410_UCON_RXILEVEL |        \
35                                  S3C2410_UCON_TXIRQMODE |       \
36                                  S3C2410_UCON_RXIRQMODE |       \
37                                  S3C2410_UCON_RXFIFO_TOI |      \
38                                  S3C2443_UCON_RXERR_IRQEN)
39
40 #define S5PV210_ULCON_DEFAULT   S3C2410_LCON_CS8
41
42 #define S5PV210_UFCON_DEFAULT   (S3C2410_UFCON_FIFOMODE |       \
43                                  S5PV210_UFCON_TXTRIG4 |        \
44                                  S5PV210_UFCON_RXTRIG4)
45
46 static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = {
47         [0] = {
48                 .hwport         = 0,
49                 .flags          = 0,
50                 .ucon           = S5PV210_UCON_DEFAULT,
51                 .ulcon          = S5PV210_ULCON_DEFAULT,
52                 .ufcon          = S5PV210_UFCON_DEFAULT,
53         },
54         [1] = {
55                 .hwport         = 1,
56                 .flags          = 0,
57                 .ucon           = S5PV210_UCON_DEFAULT,
58                 .ulcon          = S5PV210_ULCON_DEFAULT,
59                 .ufcon          = S5PV210_UFCON_DEFAULT,
60         },
61         [2] = {
62                 .hwport         = 2,
63                 .flags          = 0,
64                 .ucon           = S5PV210_UCON_DEFAULT,
65                 .ulcon          = S5PV210_ULCON_DEFAULT,
66                 .ufcon          = S5PV210_UFCON_DEFAULT,
67         },
68         [3] = {
69                 .hwport         = 3,
70                 .flags          = 0,
71                 .ucon           = S5PV210_UCON_DEFAULT,
72                 .ulcon          = S5PV210_ULCON_DEFAULT,
73                 .ufcon          = S5PV210_UFCON_DEFAULT,
74         },
75 };
76
77 /* Frame Buffer */
78 static struct s3c_fb_pd_win aquila_fb_win0 = {
79         .win_mode = {
80                 .pixclock = 1000000000000ULL / ((16+16+2+480)*(28+3+2+800)*60),
81                 .left_margin = 16,
82                 .right_margin = 16,
83                 .upper_margin = 3,
84                 .lower_margin = 28,
85                 .hsync_len = 2,
86                 .vsync_len = 2,
87                 .xres = 480,
88                 .yres = 800,
89         },
90         .max_bpp = 32,
91         .default_bpp = 16,
92 };
93
94 static struct s3c_fb_pd_win aquila_fb_win1 = {
95         .win_mode = {
96                 .pixclock = 1000000000000ULL / ((16+16+2+480)*(28+3+2+800)*60),
97                 .left_margin = 16,
98                 .right_margin = 16,
99                 .upper_margin = 3,
100                 .lower_margin = 28,
101                 .hsync_len = 2,
102                 .vsync_len = 2,
103                 .xres = 480,
104                 .yres = 800,
105         },
106         .max_bpp = 32,
107         .default_bpp = 16,
108 };
109
110 static struct s3c_fb_platdata aquila_lcd_pdata __initdata = {
111         .win[0]         = &aquila_fb_win0,
112         .win[1]         = &aquila_fb_win1,
113         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
114         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
115                           VIDCON1_INV_VCLK | VIDCON1_INV_VDEN,
116         .setup_gpio     = s5pv210_fb_gpio_setup_24bpp,
117 };
118
119 static struct platform_device *aquila_devices[] __initdata = {
120         &s3c_device_fb,
121 };
122
123 static void __init aquila_map_io(void)
124 {
125         s5p_init_io(NULL, 0, S5P_VA_CHIPID);
126         s3c24xx_init_clocks(24000000);
127         s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs));
128 }
129
130 static void __init aquila_machine_init(void)
131 {
132         /* FB */
133         s3c_fb_set_platdata(&aquila_lcd_pdata);
134
135         platform_add_devices(aquila_devices, ARRAY_SIZE(aquila_devices));
136 }
137
138 MACHINE_START(AQUILA, "Aquila")
139         /* Maintainers:
140            Marek Szyprowski <m.szyprowski@samsung.com>
141            Kyungmin Park <kyungmin.park@samsung.com> */
142         .phys_io        = S3C_PA_UART & 0xfff00000,
143         .io_pg_offst    = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
144         .boot_params    = S5P_PA_SDRAM + 0x100,
145         .init_irq       = s5pv210_init_irq,
146         .map_io         = aquila_map_io,
147         .init_machine   = aquila_machine_init,
148         .timer          = &s3c24xx_timer,
149 MACHINE_END