Merge branch 'msm-fix' of git://codeaurora.org/quic/kernel/davidb/linux-msm into...
[pandora-kernel.git] / arch / arm / mach-s5p64x0 / mach-smdk6450.c
1 /* linux/arch/arm/mach-s5p64x0/mach-smdk6450.c
2  *
3  * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4  *              http://www.samsung.com
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9 */
10
11 #include <linux/kernel.h>
12 #include <linux/types.h>
13 #include <linux/interrupt.h>
14 #include <linux/list.h>
15 #include <linux/timer.h>
16 #include <linux/delay.h>
17 #include <linux/init.h>
18 #include <linux/i2c.h>
19 #include <linux/serial_core.h>
20 #include <linux/platform_device.h>
21 #include <linux/io.h>
22 #include <linux/module.h>
23 #include <linux/clk.h>
24 #include <linux/gpio.h>
25 #include <linux/pwm_backlight.h>
26 #include <linux/fb.h>
27
28 #include <video/platform_lcd.h>
29
30 #include <asm/mach/arch.h>
31 #include <asm/mach/map.h>
32 #include <asm/irq.h>
33 #include <asm/mach-types.h>
34
35 #include <mach/hardware.h>
36 #include <mach/map.h>
37 #include <mach/regs-clock.h>
38 #include <mach/i2c.h>
39 #include <mach/regs-gpio.h>
40
41 #include <plat/regs-serial.h>
42 #include <plat/gpio-cfg.h>
43 #include <plat/s5p6450.h>
44 #include <plat/clock.h>
45 #include <plat/devs.h>
46 #include <plat/cpu.h>
47 #include <plat/iic.h>
48 #include <plat/pll.h>
49 #include <plat/adc.h>
50 #include <plat/ts.h>
51 #include <plat/s5p-time.h>
52 #include <plat/backlight.h>
53 #include <plat/fb.h>
54 #include <plat/regs-fb.h>
55
56 #define SMDK6450_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
57                                 S3C2410_UCON_RXILEVEL |         \
58                                 S3C2410_UCON_TXIRQMODE |        \
59                                 S3C2410_UCON_RXIRQMODE |        \
60                                 S3C2410_UCON_RXFIFO_TOI |       \
61                                 S3C2443_UCON_RXERR_IRQEN)
62
63 #define SMDK6450_ULCON_DEFAULT  S3C2410_LCON_CS8
64
65 #define SMDK6450_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
66                                 S3C2440_UFCON_TXTRIG16 |        \
67                                 S3C2410_UFCON_RXTRIG8)
68
69 static struct s3c2410_uartcfg smdk6450_uartcfgs[] __initdata = {
70         [0] = {
71                 .hwport         = 0,
72                 .flags          = 0,
73                 .ucon           = SMDK6450_UCON_DEFAULT,
74                 .ulcon          = SMDK6450_ULCON_DEFAULT,
75                 .ufcon          = SMDK6450_UFCON_DEFAULT,
76         },
77         [1] = {
78                 .hwport         = 1,
79                 .flags          = 0,
80                 .ucon           = SMDK6450_UCON_DEFAULT,
81                 .ulcon          = SMDK6450_ULCON_DEFAULT,
82                 .ufcon          = SMDK6450_UFCON_DEFAULT,
83         },
84         [2] = {
85                 .hwport         = 2,
86                 .flags          = 0,
87                 .ucon           = SMDK6450_UCON_DEFAULT,
88                 .ulcon          = SMDK6450_ULCON_DEFAULT,
89                 .ufcon          = SMDK6450_UFCON_DEFAULT,
90         },
91         [3] = {
92                 .hwport         = 3,
93                 .flags          = 0,
94                 .ucon           = SMDK6450_UCON_DEFAULT,
95                 .ulcon          = SMDK6450_ULCON_DEFAULT,
96                 .ufcon          = SMDK6450_UFCON_DEFAULT,
97         },
98 #if CONFIG_SERIAL_SAMSUNG_UARTS > 4
99         [4] = {
100                 .hwport         = 4,
101                 .flags          = 0,
102                 .ucon           = SMDK6450_UCON_DEFAULT,
103                 .ulcon          = SMDK6450_ULCON_DEFAULT,
104                 .ufcon          = SMDK6450_UFCON_DEFAULT,
105         },
106 #endif
107 #if CONFIG_SERIAL_SAMSUNG_UARTS > 5
108         [5] = {
109                 .hwport         = 5,
110                 .flags          = 0,
111                 .ucon           = SMDK6450_UCON_DEFAULT,
112                 .ulcon          = SMDK6450_ULCON_DEFAULT,
113                 .ufcon          = SMDK6450_UFCON_DEFAULT,
114         },
115 #endif
116 };
117
118 /* Frame Buffer */
119 static struct s3c_fb_pd_win smdk6450_fb_win0 = {
120         .win_mode       = {
121                 .left_margin    = 8,
122                 .right_margin   = 13,
123                 .upper_margin   = 7,
124                 .lower_margin   = 5,
125                 .hsync_len      = 3,
126                 .vsync_len      = 1,
127                 .xres           = 800,
128                 .yres           = 480,
129         },
130         .max_bpp        = 32,
131         .default_bpp    = 24,
132 };
133
134 static struct s3c_fb_platdata smdk6450_lcd_pdata __initdata = {
135         .win[0]         = &smdk6450_fb_win0,
136         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
137         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
138         .setup_gpio     = s5p64x0_fb_gpio_setup_24bpp,
139 };
140
141 /* LCD power controller */
142 static void smdk6450_lte480_reset_power(struct plat_lcd_data *pd,
143                                          unsigned int power)
144 {
145         int err;
146
147         if (power) {
148                 err = gpio_request(S5P6450_GPN(5), "GPN");
149                 if (err) {
150                         printk(KERN_ERR "failed to request GPN for lcd reset\n");
151                         return;
152                 }
153
154                 gpio_direction_output(S5P6450_GPN(5), 1);
155                 gpio_set_value(S5P6450_GPN(5), 0);
156                 gpio_set_value(S5P6450_GPN(5), 1);
157                 gpio_free(S5P6450_GPN(5));
158         }
159 }
160
161 static struct plat_lcd_data smdk6450_lcd_power_data = {
162         .set_power      = smdk6450_lte480_reset_power,
163 };
164
165 static struct platform_device smdk6450_lcd_lte480wv = {
166         .name                   = "platform-lcd",
167         .dev.parent             = &s3c_device_fb.dev,
168         .dev.platform_data      = &smdk6450_lcd_power_data,
169 };
170
171 static struct platform_device *smdk6450_devices[] __initdata = {
172         &s3c_device_adc,
173         &s3c_device_rtc,
174         &s3c_device_i2c0,
175         &s3c_device_i2c1,
176         &s3c_device_ts,
177         &s3c_device_wdt,
178         &samsung_asoc_dma,
179         &s5p6450_device_iis0,
180         &s3c_device_fb,
181         &smdk6450_lcd_lte480wv,
182
183         /* s5p6450_device_spi0 will be added */
184 };
185
186 static struct s3c2410_platform_i2c s5p6450_i2c0_data __initdata = {
187         .flags          = 0,
188         .slave_addr     = 0x10,
189         .frequency      = 100*1000,
190         .sda_delay      = 100,
191         .cfg_gpio       = s5p6450_i2c0_cfg_gpio,
192 };
193
194 static struct s3c2410_platform_i2c s5p6450_i2c1_data __initdata = {
195         .flags          = 0,
196         .bus_num        = 1,
197         .slave_addr     = 0x10,
198         .frequency      = 100*1000,
199         .sda_delay      = 100,
200         .cfg_gpio       = s5p6450_i2c1_cfg_gpio,
201 };
202
203 static struct i2c_board_info smdk6450_i2c_devs0[] __initdata = {
204         { I2C_BOARD_INFO("wm8580", 0x1b), },
205         { I2C_BOARD_INFO("24c08", 0x50), },     /* Samsung KS24C080C EEPROM */
206 };
207
208 static struct i2c_board_info smdk6450_i2c_devs1[] __initdata = {
209         { I2C_BOARD_INFO("24c128", 0x57), },/* Samsung S524AD0XD1 EEPROM */
210 };
211
212 /* LCD Backlight data */
213 static struct samsung_bl_gpio_info smdk6450_bl_gpio_info = {
214         .no = S5P6450_GPF(15),
215         .func = S3C_GPIO_SFN(2),
216 };
217
218 static struct platform_pwm_backlight_data smdk6450_bl_data = {
219         .pwm_id = 1,
220 };
221
222 static void __init smdk6450_map_io(void)
223 {
224         s5p_init_io(NULL, 0, S5P64X0_SYS_ID);
225         s3c24xx_init_clocks(19200000);
226         s3c24xx_init_uarts(smdk6450_uartcfgs, ARRAY_SIZE(smdk6450_uartcfgs));
227         s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
228 }
229
230 static void s5p6450_set_lcd_interface(void)
231 {
232         unsigned int cfg;
233
234         /* select TFT LCD type (RGB I/F) */
235         cfg = __raw_readl(S5P64X0_SPCON0);
236         cfg &= ~S5P64X0_SPCON0_LCD_SEL_MASK;
237         cfg |= S5P64X0_SPCON0_LCD_SEL_RGB;
238         __raw_writel(cfg, S5P64X0_SPCON0);
239 }
240
241 static void __init smdk6450_machine_init(void)
242 {
243         s3c24xx_ts_set_platdata(NULL);
244
245         s3c_i2c0_set_platdata(&s5p6450_i2c0_data);
246         s3c_i2c1_set_platdata(&s5p6450_i2c1_data);
247         i2c_register_board_info(0, smdk6450_i2c_devs0,
248                         ARRAY_SIZE(smdk6450_i2c_devs0));
249         i2c_register_board_info(1, smdk6450_i2c_devs1,
250                         ARRAY_SIZE(smdk6450_i2c_devs1));
251
252         samsung_bl_set(&smdk6450_bl_gpio_info, &smdk6450_bl_data);
253
254         s5p6450_set_lcd_interface();
255         s3c_fb_set_platdata(&smdk6450_lcd_pdata);
256
257         platform_add_devices(smdk6450_devices, ARRAY_SIZE(smdk6450_devices));
258 }
259
260 MACHINE_START(SMDK6450, "SMDK6450")
261         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
262         .atag_offset    = 0x100,
263
264         .init_irq       = s5p6450_init_irq,
265         .map_io         = smdk6450_map_io,
266         .init_machine   = smdk6450_machine_init,
267         .timer          = &s5p_timer,
268 MACHINE_END