Merge branch 'next-samsung-devel-mmc-spi5' of git://git.kernel.org/pub/scm/linux...
[pandora-kernel.git] / arch / arm / mach-s5p64x0 / mach-smdk6440.c
1 /* linux/arch/arm/mach-s5p64x0/mach-smdk6440.c
2  *
3  * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4  *              http://www.samsung.com
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9 */
10
11 #include <linux/kernel.h>
12 #include <linux/types.h>
13 #include <linux/interrupt.h>
14 #include <linux/list.h>
15 #include <linux/timer.h>
16 #include <linux/delay.h>
17 #include <linux/init.h>
18 #include <linux/i2c.h>
19 #include <linux/serial_core.h>
20 #include <linux/platform_device.h>
21 #include <linux/io.h>
22 #include <linux/module.h>
23 #include <linux/clk.h>
24 #include <linux/gpio.h>
25 #include <linux/pwm_backlight.h>
26 #include <linux/fb.h>
27 #include <linux/mmc/host.h>
28
29 #include <video/platform_lcd.h>
30
31 #include <asm/mach/arch.h>
32 #include <asm/mach/map.h>
33 #include <asm/irq.h>
34 #include <asm/mach-types.h>
35
36 #include <mach/hardware.h>
37 #include <mach/map.h>
38 #include <mach/regs-clock.h>
39 #include <mach/i2c.h>
40 #include <mach/regs-gpio.h>
41
42 #include <plat/regs-serial.h>
43 #include <plat/gpio-cfg.h>
44 #include <plat/s5p6440.h>
45 #include <plat/clock.h>
46 #include <plat/devs.h>
47 #include <plat/cpu.h>
48 #include <plat/iic.h>
49 #include <plat/pll.h>
50 #include <plat/adc.h>
51 #include <plat/ts.h>
52 #include <plat/s5p-time.h>
53 #include <plat/backlight.h>
54 #include <plat/fb.h>
55 #include <plat/regs-fb.h>
56 #include <plat/sdhci.h>
57
58 #define SMDK6440_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
59                                 S3C2410_UCON_RXILEVEL |         \
60                                 S3C2410_UCON_TXIRQMODE |        \
61                                 S3C2410_UCON_RXIRQMODE |        \
62                                 S3C2410_UCON_RXFIFO_TOI |       \
63                                 S3C2443_UCON_RXERR_IRQEN)
64
65 #define SMDK6440_ULCON_DEFAULT  S3C2410_LCON_CS8
66
67 #define SMDK6440_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
68                                 S3C2440_UFCON_TXTRIG16 |        \
69                                 S3C2410_UFCON_RXTRIG8)
70
71 static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = {
72         [0] = {
73                 .hwport         = 0,
74                 .flags          = 0,
75                 .ucon           = SMDK6440_UCON_DEFAULT,
76                 .ulcon          = SMDK6440_ULCON_DEFAULT,
77                 .ufcon          = SMDK6440_UFCON_DEFAULT,
78         },
79         [1] = {
80                 .hwport         = 1,
81                 .flags          = 0,
82                 .ucon           = SMDK6440_UCON_DEFAULT,
83                 .ulcon          = SMDK6440_ULCON_DEFAULT,
84                 .ufcon          = SMDK6440_UFCON_DEFAULT,
85         },
86         [2] = {
87                 .hwport         = 2,
88                 .flags          = 0,
89                 .ucon           = SMDK6440_UCON_DEFAULT,
90                 .ulcon          = SMDK6440_ULCON_DEFAULT,
91                 .ufcon          = SMDK6440_UFCON_DEFAULT,
92         },
93         [3] = {
94                 .hwport         = 3,
95                 .flags          = 0,
96                 .ucon           = SMDK6440_UCON_DEFAULT,
97                 .ulcon          = SMDK6440_ULCON_DEFAULT,
98                 .ufcon          = SMDK6440_UFCON_DEFAULT,
99         },
100 };
101
102 /* Frame Buffer */
103 static struct s3c_fb_pd_win smdk6440_fb_win0 = {
104         .win_mode = {
105                 .left_margin    = 8,
106                 .right_margin   = 13,
107                 .upper_margin   = 7,
108                 .lower_margin   = 5,
109                 .hsync_len      = 3,
110                 .vsync_len      = 1,
111                 .xres           = 800,
112                 .yres           = 480,
113         },
114         .max_bpp        = 32,
115         .default_bpp    = 24,
116 };
117
118 static struct s3c_fb_platdata smdk6440_lcd_pdata __initdata = {
119         .win[0]         = &smdk6440_fb_win0,
120         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
121         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
122         .setup_gpio     = s5p64x0_fb_gpio_setup_24bpp,
123 };
124
125 /* LCD power controller */
126 static void smdk6440_lte480_reset_power(struct plat_lcd_data *pd,
127                                          unsigned int power)
128 {
129         int err;
130
131         if (power) {
132                 err = gpio_request(S5P6440_GPN(5), "GPN");
133                 if (err) {
134                         printk(KERN_ERR "failed to request GPN for lcd reset\n");
135                         return;
136                 }
137
138                 gpio_direction_output(S5P6440_GPN(5), 1);
139                 gpio_set_value(S5P6440_GPN(5), 0);
140                 gpio_set_value(S5P6440_GPN(5), 1);
141                 gpio_free(S5P6440_GPN(5));
142         }
143 }
144
145 static struct plat_lcd_data smdk6440_lcd_power_data = {
146         .set_power      = smdk6440_lte480_reset_power,
147 };
148
149 static struct platform_device smdk6440_lcd_lte480wv = {
150         .name                   = "platform-lcd",
151         .dev.parent             = &s3c_device_fb.dev,
152         .dev.platform_data      = &smdk6440_lcd_power_data,
153 };
154
155 static struct platform_device *smdk6440_devices[] __initdata = {
156         &s3c_device_adc,
157         &s3c_device_rtc,
158         &s3c_device_i2c0,
159         &s3c_device_i2c1,
160         &s3c_device_ts,
161         &s3c_device_wdt,
162         &samsung_asoc_dma,
163         &s5p6440_device_iis,
164         &s3c_device_fb,
165         &smdk6440_lcd_lte480wv,
166         &s3c_device_hsmmc0,
167         &s3c_device_hsmmc1,
168         &s3c_device_hsmmc2,
169 };
170
171 static struct s3c_sdhci_platdata smdk6440_hsmmc0_pdata __initdata = {
172         .cd_type        = S3C_SDHCI_CD_NONE,
173 };
174
175 static struct s3c_sdhci_platdata smdk6440_hsmmc1_pdata __initdata = {
176         .cd_type        = S3C_SDHCI_CD_INTERNAL,
177 #if defined(CONFIG_S5P64X0_SD_CH1_8BIT)
178         .max_width      = 8,
179         .host_caps      = MMC_CAP_8_BIT_DATA,
180 #endif
181 };
182
183 static struct s3c_sdhci_platdata smdk6440_hsmmc2_pdata __initdata = {
184         .cd_type        = S3C_SDHCI_CD_NONE,
185 };
186
187 static struct s3c2410_platform_i2c s5p6440_i2c0_data __initdata = {
188         .flags          = 0,
189         .slave_addr     = 0x10,
190         .frequency      = 100*1000,
191         .sda_delay      = 100,
192         .cfg_gpio       = s5p6440_i2c0_cfg_gpio,
193 };
194
195 static struct s3c2410_platform_i2c s5p6440_i2c1_data __initdata = {
196         .flags          = 0,
197         .bus_num        = 1,
198         .slave_addr     = 0x10,
199         .frequency      = 100*1000,
200         .sda_delay      = 100,
201         .cfg_gpio       = s5p6440_i2c1_cfg_gpio,
202 };
203
204 static struct i2c_board_info smdk6440_i2c_devs0[] __initdata = {
205         { I2C_BOARD_INFO("24c08", 0x50), },
206         { I2C_BOARD_INFO("wm8580", 0x1b), },
207 };
208
209 static struct i2c_board_info smdk6440_i2c_devs1[] __initdata = {
210         /* To be populated */
211 };
212
213 /* LCD Backlight data */
214 static struct samsung_bl_gpio_info smdk6440_bl_gpio_info = {
215         .no = S5P6440_GPF(15),
216         .func = S3C_GPIO_SFN(2),
217 };
218
219 static struct platform_pwm_backlight_data smdk6440_bl_data = {
220         .pwm_id = 1,
221 };
222
223 static void __init smdk6440_map_io(void)
224 {
225         s5p_init_io(NULL, 0, S5P64X0_SYS_ID);
226         s3c24xx_init_clocks(12000000);
227         s3c24xx_init_uarts(smdk6440_uartcfgs, ARRAY_SIZE(smdk6440_uartcfgs));
228         s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
229 }
230
231 static void s5p6440_set_lcd_interface(void)
232 {
233         unsigned int cfg;
234
235         /* select TFT LCD type (RGB I/F) */
236         cfg = __raw_readl(S5P64X0_SPCON0);
237         cfg &= ~S5P64X0_SPCON0_LCD_SEL_MASK;
238         cfg |= S5P64X0_SPCON0_LCD_SEL_RGB;
239         __raw_writel(cfg, S5P64X0_SPCON0);
240 }
241
242 static void __init smdk6440_machine_init(void)
243 {
244         s3c24xx_ts_set_platdata(NULL);
245
246         s3c_i2c0_set_platdata(&s5p6440_i2c0_data);
247         s3c_i2c1_set_platdata(&s5p6440_i2c1_data);
248         i2c_register_board_info(0, smdk6440_i2c_devs0,
249                         ARRAY_SIZE(smdk6440_i2c_devs0));
250         i2c_register_board_info(1, smdk6440_i2c_devs1,
251                         ARRAY_SIZE(smdk6440_i2c_devs1));
252
253         samsung_bl_set(&smdk6440_bl_gpio_info, &smdk6440_bl_data);
254
255         s5p6440_set_lcd_interface();
256         s3c_fb_set_platdata(&smdk6440_lcd_pdata);
257
258         s3c_sdhci0_set_platdata(&smdk6440_hsmmc0_pdata);
259         s3c_sdhci1_set_platdata(&smdk6440_hsmmc1_pdata);
260         s3c_sdhci2_set_platdata(&smdk6440_hsmmc2_pdata);
261
262         platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices));
263 }
264
265 MACHINE_START(SMDK6440, "SMDK6440")
266         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
267         .atag_offset    = 0x100,
268
269         .init_irq       = s5p6440_init_irq,
270         .map_io         = smdk6440_map_io,
271         .init_machine   = smdk6440_machine_init,
272         .timer          = &s5p_timer,
273 MACHINE_END