1 /* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
14 #include <linux/kernel.h>
15 #include <linux/types.h>
16 #include <linux/interrupt.h>
17 #include <linux/list.h>
18 #include <linux/timer.h>
19 #include <linux/init.h>
20 #include <linux/serial_core.h>
21 #include <linux/platform_device.h>
23 #include <linux/i2c.h>
24 #include <linux/leds.h>
26 #include <linux/gpio.h>
27 #include <linux/delay.h>
28 #include <linux/smsc911x.h>
29 #include <linux/regulator/fixed.h>
31 #ifdef CONFIG_SMDK6410_WM1190_EV1
32 #include <linux/mfd/wm8350/core.h>
33 #include <linux/mfd/wm8350/pmic.h>
36 #ifdef CONFIG_SMDK6410_WM1192_EV1
37 #include <linux/mfd/wm831x/core.h>
38 #include <linux/mfd/wm831x/pdata.h>
41 #include <video/platform_lcd.h>
43 #include <asm/mach/arch.h>
44 #include <asm/mach/map.h>
45 #include <asm/mach/irq.h>
47 #include <mach/hardware.h>
48 #include <mach/regs-fb.h>
52 #include <asm/mach-types.h>
54 #include <plat/regs-serial.h>
55 #include <mach/regs-modem.h>
56 #include <mach/regs-gpio.h>
57 #include <mach/regs-sys.h>
58 #include <mach/regs-srom.h>
62 #include <plat/gpio-cfg.h>
64 #include <mach/s3c6410.h>
65 #include <plat/clock.h>
66 #include <plat/devs.h>
71 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
72 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
73 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
75 static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
106 /* framebuffer and LCD setup. */
108 /* GPF15 = LCD backlight control
109 * GPF13 => Panel power
110 * GPN5 = LCD nRESET signal
111 * PWM_TOUT1 => backlight brightness
114 static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
118 gpio_direction_output(S3C64XX_GPF(13), 1);
119 gpio_direction_output(S3C64XX_GPF(15), 1);
121 /* fire nRESET on power up */
122 gpio_direction_output(S3C64XX_GPN(5), 0);
124 gpio_direction_output(S3C64XX_GPN(5), 1);
127 gpio_direction_output(S3C64XX_GPF(15), 0);
128 gpio_direction_output(S3C64XX_GPF(13), 0);
132 static struct plat_lcd_data smdk6410_lcd_power_data = {
133 .set_power = smdk6410_lcd_power_set,
136 static struct platform_device smdk6410_lcd_powerdev = {
137 .name = "platform-lcd",
138 .dev.parent = &s3c_device_fb.dev,
139 .dev.platform_data = &smdk6410_lcd_power_data,
142 static struct s3c_fb_pd_win smdk6410_fb_win0 = {
143 /* this is to ensure we use win0 */
159 /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
160 static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
161 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
162 .win[0] = &smdk6410_fb_win0,
163 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
164 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
168 * Configuring Ethernet on SMDK6410
170 * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
171 * The constant address below corresponds to nCS1
173 * 1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
174 * 2) CFG6 needs to be switched to "LAN9115" side
177 static struct resource smdk6410_smsc911x_resources[] = {
179 .start = S3C64XX_PA_XM0CSN1,
180 .end = S3C64XX_PA_XM0CSN1 + SZ_64K - 1,
181 .flags = IORESOURCE_MEM,
184 .start = S3C_EINT(10),
186 .flags = IORESOURCE_IRQ | IRQ_TYPE_LEVEL_LOW,
190 static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
191 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
192 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
193 .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
194 .phy_interface = PHY_INTERFACE_MODE_MII,
198 static struct platform_device smdk6410_smsc911x = {
201 .num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
202 .resource = &smdk6410_smsc911x_resources[0],
204 .platform_data = &smdk6410_smsc911x_pdata,
208 #ifdef CONFIG_REGULATOR
209 static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] = {
213 .dev_name = "0-001b",
218 .dev_name = "0-001b",
222 static struct regulator_init_data smdk6410_b_pwr_5v_data = {
226 .num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers),
227 .consumer_supplies = smdk6410_b_pwr_5v_consumers,
230 static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = {
231 .supply_name = "B_PWR_5V",
232 .microvolts = 5000000,
233 .init_data = &smdk6410_b_pwr_5v_data,
237 static struct platform_device smdk6410_b_pwr_5v = {
238 .name = "reg-fixed-voltage",
241 .platform_data = &smdk6410_b_pwr_5v_pdata,
246 static struct s3c_ide_platdata smdk6410_ide_pdata __initdata = {
247 .setup_gpio = s3c64xx_ide_setup_gpio,
250 static struct map_desc smdk6410_iodesc[] = {};
252 static struct platform_device *smdk6410_devices[] __initdata = {
253 #ifdef CONFIG_SMDK6410_SD_CH0
256 #ifdef CONFIG_SMDK6410_SD_CH1
263 &s3c_device_usb_hsotg,
264 &s3c64xx_device_iisv4,
266 #ifdef CONFIG_REGULATOR
269 &smdk6410_lcd_powerdev,
279 #ifdef CONFIG_REGULATOR
281 static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
287 /* VDDARM, BUCK1 on J5 */
288 static struct regulator_init_data smdk6410_vddarm = {
294 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
296 .num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
297 .consumer_supplies = smdk6410_vddarm_consumers,
300 /* VDD_INT, BUCK2 on J5 */
301 static struct regulator_init_data smdk6410_vddint = {
307 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
311 /* VDD_HI, LDO3 on J5 */
312 static struct regulator_init_data smdk6410_vddhi = {
319 /* VDD_PLL, LDO2 on J5 */
320 static struct regulator_init_data smdk6410_vddpll = {
327 /* VDD_UH_MMC, LDO5 on J5 */
328 static struct regulator_init_data smdk6410_vdduh_mmc = {
330 .name = "PVDD_UH/PVDD_MMC",
335 /* VCCM3BT, LDO8 on J5 */
336 static struct regulator_init_data smdk6410_vccmc3bt = {
343 /* VCCM2MTV, LDO11 on J5 */
344 static struct regulator_init_data smdk6410_vccm2mtv = {
351 /* VDD_LCD, LDO12 on J5 */
352 static struct regulator_init_data smdk6410_vddlcd = {
359 /* VDD_OTGI, LDO9 on J5 */
360 static struct regulator_init_data smdk6410_vddotgi = {
367 /* VDD_OTG, LDO14 on J5 */
368 static struct regulator_init_data smdk6410_vddotg = {
375 /* VDD_ALIVE, LDO15 on J5 */
376 static struct regulator_init_data smdk6410_vddalive = {
378 .name = "PVDD_ALIVE",
383 /* VDD_AUDIO, VLDO_AUDIO on J5 */
384 static struct regulator_init_data smdk6410_vddaudio = {
386 .name = "PVDD_AUDIO",
392 #ifdef CONFIG_SMDK6410_WM1190_EV1
393 /* S3C64xx internal logic & PLL */
394 static struct regulator_init_data wm8350_dcdc1_data = {
396 .name = "PVDD_INT/PVDD_PLL",
405 static struct regulator_init_data wm8350_dcdc3_data = {
413 .mode = REGULATOR_MODE_NORMAL,
416 .initial_state = PM_SUSPEND_MEM,
420 /* USB, EXT, PCM, ADC/DAC, USB, MMC */
421 static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
425 .dev_name = "0-001b",
429 static struct regulator_init_data wm8350_dcdc4_data = {
431 .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV",
436 .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
437 .consumer_supplies = wm8350_dcdc4_consumers,
440 /* OTGi/1190-EV1 HPVDD & AVDD */
441 static struct regulator_init_data wm8350_ldo4_data = {
443 .name = "PVDD_OTGI/HPVDD/AVDD",
453 struct regulator_init_data *initdata;
454 } wm1190_regulators[] = {
455 { WM8350_DCDC_1, &wm8350_dcdc1_data },
456 { WM8350_DCDC_3, &wm8350_dcdc3_data },
457 { WM8350_DCDC_4, &wm8350_dcdc4_data },
458 { WM8350_DCDC_6, &smdk6410_vddarm },
459 { WM8350_LDO_1, &smdk6410_vddalive },
460 { WM8350_LDO_2, &smdk6410_vddotg },
461 { WM8350_LDO_3, &smdk6410_vddlcd },
462 { WM8350_LDO_4, &wm8350_ldo4_data },
465 static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
469 /* Configure the IRQ line */
470 s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
472 /* Instantiate the regulators */
473 for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
474 wm8350_register_regulator(wm8350,
475 wm1190_regulators[i].regulator,
476 wm1190_regulators[i].initdata);
481 static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
482 .init = smdk6410_wm8350_init,
484 .irq_base = IRQ_BOARD_START,
488 #ifdef CONFIG_SMDK6410_WM1192_EV1
489 static struct gpio_led wm1192_pmic_leds[] = {
491 .name = "PMIC:red:power",
492 .gpio = GPIO_BOARD_START + 3,
493 .default_state = LEDS_GPIO_DEFSTATE_ON,
497 static struct gpio_led_platform_data wm1192_pmic_led = {
498 .num_leds = ARRAY_SIZE(wm1192_pmic_leds),
499 .leds = wm1192_pmic_leds,
502 static struct platform_device wm1192_pmic_led_dev = {
506 .platform_data = &wm1192_pmic_led,
510 static int wm1192_pre_init(struct wm831x *wm831x)
514 /* Configure the IRQ line */
515 s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
517 ret = platform_device_register(&wm1192_pmic_led_dev);
519 dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret);
524 static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
529 static struct regulator_init_data wm1192_dcdc3 = {
531 .name = "PVDD_MEM/PVDD_GPS",
536 static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
537 { .supply = "DVDD", .dev_name = "0-001b", }, /* WM8580 */
540 static struct regulator_init_data wm1192_ldo1 = {
542 .name = "PVDD_LCD/PVDD_EXT",
545 .consumer_supplies = wm1192_ldo1_consumers,
546 .num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
549 static struct wm831x_status_pdata wm1192_led7_pdata = {
550 .name = "LED7:green:",
553 static struct wm831x_status_pdata wm1192_led8_pdata = {
554 .name = "LED8:green:",
557 static struct wm831x_pdata smdk6410_wm1192_pdata = {
558 .pre_init = wm1192_pre_init,
559 .irq_base = IRQ_BOARD_START,
561 .backlight = &wm1192_backlight_pdata,
563 &smdk6410_vddarm, /* DCDC1 */
564 &smdk6410_vddint, /* DCDC2 */
567 .gpio_base = GPIO_BOARD_START,
569 &wm1192_ldo1, /* LDO1 */
570 &smdk6410_vdduh_mmc, /* LDO2 */
572 &smdk6410_vddotgi, /* LDO4 */
573 &smdk6410_vddotg, /* LDO5 */
574 &smdk6410_vddhi, /* LDO6 */
575 &smdk6410_vddaudio, /* LDO7 */
576 &smdk6410_vccm2mtv, /* LDO8 */
577 &smdk6410_vddpll, /* LDO9 */
578 &smdk6410_vccmc3bt, /* LDO10 */
579 &smdk6410_vddalive, /* LDO11 */
588 static struct i2c_board_info i2c_devs0[] __initdata = {
589 { I2C_BOARD_INFO("24c08", 0x50), },
590 { I2C_BOARD_INFO("wm8580", 0x1b), },
592 #ifdef CONFIG_SMDK6410_WM1192_EV1
593 { I2C_BOARD_INFO("wm8312", 0x34),
594 .platform_data = &smdk6410_wm1192_pdata,
599 #ifdef CONFIG_SMDK6410_WM1190_EV1
600 { I2C_BOARD_INFO("wm8350", 0x1a),
601 .platform_data = &smdk6410_wm8350_pdata,
607 static struct i2c_board_info i2c_devs1[] __initdata = {
608 { I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */
611 static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
614 .oversampling_shift = 2,
617 static void __init smdk6410_map_io(void)
621 s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
622 s3c24xx_init_clocks(12000000);
623 s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
625 /* set the LCD type */
627 tmp = __raw_readl(S3C64XX_SPCON);
628 tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
629 tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
630 __raw_writel(tmp, S3C64XX_SPCON);
632 /* remove the lcd bypass */
633 tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
634 tmp &= ~MIFPCON_LCD_BYPASS;
635 __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
638 static void __init smdk6410_machine_init(void)
642 s3c_i2c0_set_platdata(NULL);
643 s3c_i2c1_set_platdata(NULL);
644 s3c_fb_set_platdata(&smdk6410_lcd_pdata);
646 s3c24xx_ts_set_platdata(&s3c_ts_platform);
648 /* configure nCS1 width to 16 bits */
650 cs1 = __raw_readl(S3C64XX_SROM_BW) &
651 ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
652 cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
653 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
654 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
655 S3C64XX_SROM_BW__NCS1__SHIFT;
656 __raw_writel(cs1, S3C64XX_SROM_BW);
658 /* set timing for nCS1 suitable for ethernet chip */
660 __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
661 (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
662 (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
663 (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
664 (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
665 (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
666 (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
668 gpio_request(S3C64XX_GPN(5), "LCD power");
669 gpio_request(S3C64XX_GPF(13), "LCD power");
670 gpio_request(S3C64XX_GPF(15), "LCD power");
672 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
673 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
675 s3c_ide_set_platdata(&smdk6410_ide_pdata);
677 platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
680 MACHINE_START(SMDK6410, "SMDK6410")
681 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
682 .phys_io = S3C_PA_UART & 0xfff00000,
683 .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
684 .boot_params = S3C64XX_PA_SDRAM + 0x100,
686 .init_irq = s3c6410_init_irq,
687 .map_io = smdk6410_map_io,
688 .init_machine = smdk6410_machine_init,
689 .timer = &s3c24xx_timer,