arch/arm/mach-s3c64xx/mach-smdk6410.c

   1 /* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c
   2  *
   3  * Copyright 2008 Openmoko, Inc.
   4  * Copyright 2008 Simtec Electronics
   5  *      Ben Dooks <ben@simtec.co.uk>
   6  *      http://armlinux.simtec.co.uk/
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12 */
  13
  14 #include <linux/kernel.h>
  15 #include <linux/types.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/list.h>
  18 #include <linux/timer.h>
  19 #include <linux/init.h>
  20 #include <linux/input.h>
  21 #include <linux/serial_core.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/io.h>
  24 #include <linux/i2c.h>
  25 #include <linux/leds.h>
  26 #include <linux/fb.h>
  27 #include <linux/gpio.h>
  28 #include <linux/delay.h>
  29 #include <linux/smsc911x.h>
  30 #include <linux/regulator/fixed.h>
  31
  32 #ifdef CONFIG_SMDK6410_WM1190_EV1
  33 #include <linux/mfd/wm8350/core.h>
  34 #include <linux/mfd/wm8350/pmic.h>
  35 #endif
  36
  37 #ifdef CONFIG_SMDK6410_WM1192_EV1
  38 #include <linux/mfd/wm831x/core.h>
  39 #include <linux/mfd/wm831x/pdata.h>
  40 #endif
  41
  42 #include <video/platform_lcd.h>
  43
  44 #include <asm/mach/arch.h>
  45 #include <asm/mach/map.h>
  46 #include <asm/mach/irq.h>
  47
  48 #include <mach/hardware.h>
  49 #include <mach/regs-fb.h>
  50 #include <mach/map.h>
  51
  52 #include <asm/irq.h>
  53 #include <asm/mach-types.h>
  54
  55 #include <plat/regs-serial.h>
  56 #include <mach/regs-modem.h>
  57 #include <mach/regs-gpio.h>
  58 #include <mach/regs-sys.h>
  59 #include <mach/regs-srom.h>
  60 #include <plat/ata.h>
  61 #include <plat/iic.h>
  62 #include <plat/fb.h>
  63 #include <plat/gpio-cfg.h>
  64
  65 #include <mach/s3c6410.h>
  66 #include <plat/clock.h>
  67 #include <plat/devs.h>
  68 #include <plat/cpu.h>
  69 #include <plat/adc.h>
  70 #include <plat/ts.h>
  71 #include <plat/keypad.h>
  72
  73 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
  74 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  75 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  76
  77 static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
  78         [0] = {
  79                 .hwport      = 0,
  80                 .flags       = 0,
  81                 .ucon        = UCON,
  82                 .ulcon       = ULCON,
  83                 .ufcon       = UFCON,
  84         },
  85         [1] = {
  86                 .hwport      = 1,
  87                 .flags       = 0,
  88                 .ucon        = UCON,
  89                 .ulcon       = ULCON,
  90                 .ufcon       = UFCON,
  91         },
  92         [2] = {
  93                 .hwport      = 2,
  94                 .flags       = 0,
  95                 .ucon        = UCON,
  96                 .ulcon       = ULCON,
  97                 .ufcon       = UFCON,
  98         },
  99         [3] = {
 100                 .hwport      = 3,
 101                 .flags       = 0,
 102                 .ucon        = UCON,
 103                 .ulcon       = ULCON,
 104                 .ufcon       = UFCON,
 105         },
 106 };
 107
 108 /* framebuffer and LCD setup. */
 109
 110 /* GPF15 = LCD backlight control
 111  * GPF13 => Panel power
 112  * GPN5 = LCD nRESET signal
 113  * PWM_TOUT1 => backlight brightness
 114  */
 115
 116 static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
 117                                    unsigned int power)
 118 {
 119         if (power) {
 120                 gpio_direction_output(S3C64XX_GPF(13), 1);
 121                 gpio_direction_output(S3C64XX_GPF(15), 1);
 122
 123                 /* fire nRESET on power up */
 124                 gpio_direction_output(S3C64XX_GPN(5), 0);
 125                 msleep(10);
 126                 gpio_direction_output(S3C64XX_GPN(5), 1);
 127                 msleep(1);
 128         } else {
 129                 gpio_direction_output(S3C64XX_GPF(15), 0);
 130                 gpio_direction_output(S3C64XX_GPF(13), 0);
 131         }
 132 }
 133
 134 static struct plat_lcd_data smdk6410_lcd_power_data = {
 135         .set_power      = smdk6410_lcd_power_set,
 136 };
 137
 138 static struct platform_device smdk6410_lcd_powerdev = {
 139         .name                   = "platform-lcd",
 140         .dev.parent             = &s3c_device_fb.dev,
 141         .dev.platform_data      = &smdk6410_lcd_power_data,
 142 };
 143
 144 static struct s3c_fb_pd_win smdk6410_fb_win0 = {
 145         /* this is to ensure we use win0 */
 146         .win_mode       = {
 147                 .left_margin    = 8,
 148                 .right_margin   = 13,
 149                 .upper_margin   = 7,
 150                 .lower_margin   = 5,
 151                 .hsync_len      = 3,
 152                 .vsync_len      = 1,
 153                 .xres           = 800,
 154                 .yres           = 480,
 155         },
 156         .max_bpp        = 32,
 157         .default_bpp    = 16,
 158         .virtual_y      = 480 * 2,
 159         .virtual_x      = 800,
 160 };
 161
 162 /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
 163 static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
 164         .setup_gpio     = s3c64xx_fb_gpio_setup_24bpp,
 165         .win[0]         = &smdk6410_fb_win0,
 166         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
 167         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
 168 };
 169
 170 /*
 171  * Configuring Ethernet on SMDK6410
 172  *
 173  * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
 174  * The constant address below corresponds to nCS1
 175  *
 176  *  1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
 177  *  2) CFG6 needs to be switched to "LAN9115" side
 178  */
 179
 180 static struct resource smdk6410_smsc911x_resources[] = {
 181         [0] = {
 182                 .start = S3C64XX_PA_XM0CSN1,
 183                 .end   = S3C64XX_PA_XM0CSN1 + SZ_64K - 1,
 184                 .flags = IORESOURCE_MEM,
 185         },
 186         [1] = {
 187                 .start = S3C_EINT(10),
 188                 .end   = S3C_EINT(10),
 189                 .flags = IORESOURCE_IRQ | IRQ_TYPE_LEVEL_LOW,
 190         },
 191 };
 192
 193 static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
 194         .irq_polarity  = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
 195         .irq_type      = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
 196         .flags         = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
 197         .phy_interface = PHY_INTERFACE_MODE_MII,
 198 };
 199
 200
 201 static struct platform_device smdk6410_smsc911x = {
 202         .name          = "smsc911x",
 203         .id            = -1,
 204         .num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
 205         .resource      = &smdk6410_smsc911x_resources[0],
 206         .dev = {
 207                 .platform_data = &smdk6410_smsc911x_pdata,
 208         },
 209 };
 210
 211 #ifdef CONFIG_REGULATOR
 212 static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] = {
 213         {
 214                 /* WM8580 */
 215                 .supply = "PVDD",
 216                 .dev_name = "0-001b",
 217         },
 218         {
 219                 /* WM8580 */
 220                 .supply = "AVDD",
 221                 .dev_name = "0-001b",
 222         },
 223 };
 224
 225 static struct regulator_init_data smdk6410_b_pwr_5v_data = {
 226         .constraints = {
 227                 .always_on = 1,
 228         },
 229         .num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers),
 230         .consumer_supplies = smdk6410_b_pwr_5v_consumers,
 231 };
 232
 233 static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = {
 234         .supply_name = "B_PWR_5V",
 235         .microvolts = 5000000,
 236         .init_data = &smdk6410_b_pwr_5v_data,
 237         .gpio = -EINVAL,
 238 };
 239
 240 static struct platform_device smdk6410_b_pwr_5v = {
 241         .name          = "reg-fixed-voltage",
 242         .id            = -1,
 243         .dev = {
 244                 .platform_data = &smdk6410_b_pwr_5v_pdata,
 245         },
 246 };
 247 #endif
 248
 249 static struct s3c_ide_platdata smdk6410_ide_pdata __initdata = {
 250         .setup_gpio     = s3c64xx_ide_setup_gpio,
 251 };
 252
 253 static uint32_t smdk6410_keymap[] __initdata = {
 254         /* KEY(row, col, keycode) */
 255         KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
 256         KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
 257         KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
 258         KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
 259 };
 260
 261 static struct matrix_keymap_data smdk6410_keymap_data __initdata = {
 262         .keymap         = smdk6410_keymap,
 263         .keymap_size    = ARRAY_SIZE(smdk6410_keymap),
 264 };
 265
 266 static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = {
 267         .keymap_data    = &smdk6410_keymap_data,
 268         .rows           = 2,
 269         .cols           = 8,
 270 };
 271
 272 static struct map_desc smdk6410_iodesc[] = {};
 273
 274 static struct platform_device *smdk6410_devices[] __initdata = {
 275 #ifdef CONFIG_SMDK6410_SD_CH0
 276         &s3c_device_hsmmc0,
 277 #endif
 278 #ifdef CONFIG_SMDK6410_SD_CH1
 279         &s3c_device_hsmmc1,
 280 #endif
 281         &s3c_device_i2c0,
 282         &s3c_device_i2c1,
 283         &s3c_device_fb,
 284         &s3c_device_ohci,
 285         &s3c_device_usb_hsotg,
 286         &s3c_device_pcm,
 287         &s3c64xx_device_iisv4,
 288         &samsung_device_keypad,
 289
 290 #ifdef CONFIG_REGULATOR
 291         &smdk6410_b_pwr_5v,
 292 #endif
 293         &smdk6410_lcd_powerdev,
 294
 295         &smdk6410_smsc911x,
 296         &s3c_device_adc,
 297         &s3c_device_cfcon,
 298         &s3c_device_rtc,
 299         &s3c_device_ts,
 300         &s3c_device_wdt,
 301 };
 302
 303 #ifdef CONFIG_REGULATOR
 304 /* ARM core */
 305 static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
 306         {
 307                 .supply = "vddarm",
 308         }
 309 };
 310
 311 /* VDDARM, BUCK1 on J5 */
 312 static struct regulator_init_data smdk6410_vddarm = {
 313         .constraints = {
 314                 .name = "PVDD_ARM",
 315                 .min_uV = 1000000,
 316                 .max_uV = 1300000,
 317                 .always_on = 1,
 318                 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
 319         },
 320         .num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
 321         .consumer_supplies = smdk6410_vddarm_consumers,
 322 };
 323
 324 /* VDD_INT, BUCK2 on J5 */
 325 static struct regulator_init_data smdk6410_vddint = {
 326         .constraints = {
 327                 .name = "PVDD_INT",
 328                 .min_uV = 1000000,
 329                 .max_uV = 1200000,
 330                 .always_on = 1,
 331                 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
 332         },
 333 };
 334
 335 /* VDD_HI, LDO3 on J5 */
 336 static struct regulator_init_data smdk6410_vddhi = {
 337         .constraints = {
 338                 .name = "PVDD_HI",
 339                 .always_on = 1,
 340         },
 341 };
 342
 343 /* VDD_PLL, LDO2 on J5 */
 344 static struct regulator_init_data smdk6410_vddpll = {
 345         .constraints = {
 346                 .name = "PVDD_PLL",
 347                 .always_on = 1,
 348         },
 349 };
 350
 351 /* VDD_UH_MMC, LDO5 on J5 */
 352 static struct regulator_init_data smdk6410_vdduh_mmc = {
 353         .constraints = {
 354                 .name = "PVDD_UH/PVDD_MMC",
 355                 .always_on = 1,
 356         },
 357 };
 358
 359 /* VCCM3BT, LDO8 on J5 */
 360 static struct regulator_init_data smdk6410_vccmc3bt = {
 361         .constraints = {
 362                 .name = "PVCCM3BT",
 363                 .always_on = 1,
 364         },
 365 };
 366
 367 /* VCCM2MTV, LDO11 on J5 */
 368 static struct regulator_init_data smdk6410_vccm2mtv = {
 369         .constraints = {
 370                 .name = "PVCCM2MTV",
 371                 .always_on = 1,
 372         },
 373 };
 374
 375 /* VDD_LCD, LDO12 on J5 */
 376 static struct regulator_init_data smdk6410_vddlcd = {
 377         .constraints = {
 378                 .name = "PVDD_LCD",
 379                 .always_on = 1,
 380         },
 381 };
 382
 383 /* VDD_OTGI, LDO9 on J5 */
 384 static struct regulator_init_data smdk6410_vddotgi = {
 385         .constraints = {
 386                 .name = "PVDD_OTGI",
 387                 .always_on = 1,
 388         },
 389 };
 390
 391 /* VDD_OTG, LDO14 on J5 */
 392 static struct regulator_init_data smdk6410_vddotg = {
 393         .constraints = {
 394                 .name = "PVDD_OTG",
 395                 .always_on = 1,
 396         },
 397 };
 398
 399 /* VDD_ALIVE, LDO15 on J5 */
 400 static struct regulator_init_data smdk6410_vddalive = {
 401         .constraints = {
 402                 .name = "PVDD_ALIVE",
 403                 .always_on = 1,
 404         },
 405 };
 406
 407 /* VDD_AUDIO, VLDO_AUDIO on J5 */
 408 static struct regulator_init_data smdk6410_vddaudio = {
 409         .constraints = {
 410                 .name = "PVDD_AUDIO",
 411                 .always_on = 1,
 412         },
 413 };
 414 #endif
 415
 416 #ifdef CONFIG_SMDK6410_WM1190_EV1
 417 /* S3C64xx internal logic & PLL */
 418 static struct regulator_init_data wm8350_dcdc1_data = {
 419         .constraints = {
 420                 .name = "PVDD_INT/PVDD_PLL",
 421                 .min_uV = 1200000,
 422                 .max_uV = 1200000,
 423                 .always_on = 1,
 424                 .apply_uV = 1,
 425         },
 426 };
 427
 428 /* Memory */
 429 static struct regulator_init_data wm8350_dcdc3_data = {
 430         .constraints = {
 431                 .name = "PVDD_MEM",
 432                 .min_uV = 1800000,
 433                 .max_uV = 1800000,
 434                 .always_on = 1,
 435                 .state_mem = {
 436                          .uV = 1800000,
 437                          .mode = REGULATOR_MODE_NORMAL,
 438                          .enabled = 1,
 439                 },
 440                 .initial_state = PM_SUSPEND_MEM,
 441         },
 442 };
 443
 444 /* USB, EXT, PCM, ADC/DAC, USB, MMC */
 445 static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
 446         {
 447                 /* WM8580 */
 448                 .supply = "DVDD",
 449                 .dev_name = "0-001b",
 450         },
 451 };
 452
 453 static struct regulator_init_data wm8350_dcdc4_data = {
 454         .constraints = {
 455                 .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV",
 456                 .min_uV = 3000000,
 457                 .max_uV = 3000000,
 458                 .always_on = 1,
 459         },
 460         .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
 461         .consumer_supplies = wm8350_dcdc4_consumers,
 462 };
 463
 464 /* OTGi/1190-EV1 HPVDD & AVDD */
 465 static struct regulator_init_data wm8350_ldo4_data = {
 466         .constraints = {
 467                 .name = "PVDD_OTGI/HPVDD/AVDD",
 468                 .min_uV = 1200000,
 469                 .max_uV = 1200000,
 470                 .apply_uV = 1,
 471                 .always_on = 1,
 472         },
 473 };
 474
 475 static struct {
 476         int regulator;
 477         struct regulator_init_data *initdata;
 478 } wm1190_regulators[] = {
 479         { WM8350_DCDC_1, &wm8350_dcdc1_data },
 480         { WM8350_DCDC_3, &wm8350_dcdc3_data },
 481         { WM8350_DCDC_4, &wm8350_dcdc4_data },
 482         { WM8350_DCDC_6, &smdk6410_vddarm },
 483         { WM8350_LDO_1, &smdk6410_vddalive },
 484         { WM8350_LDO_2, &smdk6410_vddotg },
 485         { WM8350_LDO_3, &smdk6410_vddlcd },
 486         { WM8350_LDO_4, &wm8350_ldo4_data },
 487 };
 488
 489 static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
 490 {
 491         int i;
 492
 493         /* Configure the IRQ line */
 494         s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
 495
 496         /* Instantiate the regulators */
 497         for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
 498                 wm8350_register_regulator(wm8350,
 499                                           wm1190_regulators[i].regulator,
 500                                           wm1190_regulators[i].initdata);
 501
 502         return 0;
 503 }
 504
 505 static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
 506         .init = smdk6410_wm8350_init,
 507         .irq_high = 1,
 508         .irq_base = IRQ_BOARD_START,
 509 };
 510 #endif
 511
 512 #ifdef CONFIG_SMDK6410_WM1192_EV1
 513 static struct gpio_led wm1192_pmic_leds[] = {
 514         {
 515                 .name = "PMIC:red:power",
 516                 .gpio = GPIO_BOARD_START + 3,
 517                 .default_state = LEDS_GPIO_DEFSTATE_ON,
 518         },
 519 };
 520
 521 static struct gpio_led_platform_data wm1192_pmic_led = {
 522         .num_leds = ARRAY_SIZE(wm1192_pmic_leds),
 523         .leds = wm1192_pmic_leds,
 524 };
 525
 526 static struct platform_device wm1192_pmic_led_dev = {
 527         .name          = "leds-gpio",
 528         .id            = -1,
 529         .dev = {
 530                 .platform_data = &wm1192_pmic_led,
 531         },
 532 };
 533
 534 static int wm1192_pre_init(struct wm831x *wm831x)
 535 {
 536         int ret;
 537
 538         /* Configure the IRQ line */
 539         s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
 540
 541         ret = platform_device_register(&wm1192_pmic_led_dev);
 542         if (ret != 0)
 543                 dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret);
 544
 545         return 0;
 546 }
 547
 548 static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
 549         .isink = 1,
 550         .max_uA = 27554,
 551 };
 552
 553 static struct regulator_init_data wm1192_dcdc3 = {
 554         .constraints = {
 555                 .name = "PVDD_MEM/PVDD_GPS",
 556                 .always_on = 1,
 557         },
 558 };
 559
 560 static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
 561         { .supply = "DVDD", .dev_name = "0-001b", },   /* WM8580 */
 562 };
 563
 564 static struct regulator_init_data wm1192_ldo1 = {
 565         .constraints = {
 566                 .name = "PVDD_LCD/PVDD_EXT",
 567                 .always_on = 1,
 568         },
 569         .consumer_supplies = wm1192_ldo1_consumers,
 570         .num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
 571 };
 572
 573 static struct wm831x_status_pdata wm1192_led7_pdata = {
 574         .name = "LED7:green:",
 575 };
 576
 577 static struct wm831x_status_pdata wm1192_led8_pdata = {
 578         .name = "LED8:green:",
 579 };
 580
 581 static struct wm831x_pdata smdk6410_wm1192_pdata = {
 582         .pre_init = wm1192_pre_init,
 583         .irq_base = IRQ_BOARD_START,
 584
 585         .backlight = &wm1192_backlight_pdata,
 586         .dcdc = {
 587                 &smdk6410_vddarm,  /* DCDC1 */
 588                 &smdk6410_vddint,  /* DCDC2 */
 589                 &wm1192_dcdc3,
 590         },
 591         .gpio_base = GPIO_BOARD_START,
 592         .ldo = {
 593                  &wm1192_ldo1,        /* LDO1 */
 594                  &smdk6410_vdduh_mmc, /* LDO2 */
 595                  NULL,                /* LDO3 NC */
 596                  &smdk6410_vddotgi,   /* LDO4 */
 597                  &smdk6410_vddotg,    /* LDO5 */
 598                  &smdk6410_vddhi,     /* LDO6 */
 599                  &smdk6410_vddaudio,  /* LDO7 */
 600                  &smdk6410_vccm2mtv,  /* LDO8 */
 601                  &smdk6410_vddpll,    /* LDO9 */
 602                  &smdk6410_vccmc3bt,  /* LDO10 */
 603                  &smdk6410_vddalive,  /* LDO11 */
 604         },
 605         .status = {
 606                 &wm1192_led7_pdata,
 607                 &wm1192_led8_pdata,
 608         },
 609 };
 610 #endif
 611
 612 static struct i2c_board_info i2c_devs0[] __initdata = {
 613         { I2C_BOARD_INFO("24c08", 0x50), },
 614         { I2C_BOARD_INFO("wm8580", 0x1b), },
 615
 616 #ifdef CONFIG_SMDK6410_WM1192_EV1
 617         { I2C_BOARD_INFO("wm8312", 0x34),
 618           .platform_data = &smdk6410_wm1192_pdata,
 619           .irq = S3C_EINT(12),
 620         },
 621 #endif
 622
 623 #ifdef CONFIG_SMDK6410_WM1190_EV1
 624         { I2C_BOARD_INFO("wm8350", 0x1a),
 625           .platform_data = &smdk6410_wm8350_pdata,
 626           .irq = S3C_EINT(12),
 627         },
 628 #endif
 629 };
 630
 631 static struct i2c_board_info i2c_devs1[] __initdata = {
 632         { I2C_BOARD_INFO("24c128", 0x57), },    /* Samsung S524AD0XD1 */
 633 };
 634
 635 static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
 636         .delay                  = 10000,
 637         .presc                  = 49,
 638         .oversampling_shift     = 2,
 639 };
 640
 641 static void __init smdk6410_map_io(void)
 642 {
 643         u32 tmp;
 644
 645         s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
 646         s3c24xx_init_clocks(12000000);
 647         s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
 648
 649         /* set the LCD type */
 650
 651         tmp = __raw_readl(S3C64XX_SPCON);
 652         tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
 653         tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
 654         __raw_writel(tmp, S3C64XX_SPCON);
 655
 656         /* remove the lcd bypass */
 657         tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
 658         tmp &= ~MIFPCON_LCD_BYPASS;
 659         __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
 660 }
 661
 662 static void __init smdk6410_machine_init(void)
 663 {
 664         u32 cs1;
 665
 666         s3c_i2c0_set_platdata(NULL);
 667         s3c_i2c1_set_platdata(NULL);
 668         s3c_fb_set_platdata(&smdk6410_lcd_pdata);
 669
 670         samsung_keypad_set_platdata(&smdk6410_keypad_data);
 671
 672         s3c24xx_ts_set_platdata(&s3c_ts_platform);
 673
 674         /* configure nCS1 width to 16 bits */
 675
 676         cs1 = __raw_readl(S3C64XX_SROM_BW) &
 677                     ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
 678         cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
 679                 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
 680                 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
 681                                                    S3C64XX_SROM_BW__NCS1__SHIFT;
 682         __raw_writel(cs1, S3C64XX_SROM_BW);
 683
 684         /* set timing for nCS1 suitable for ethernet chip */
 685
 686         __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
 687                      (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
 688                      (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
 689                      (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
 690                      (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
 691                      (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
 692                      (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
 693
 694         gpio_request(S3C64XX_GPN(5), "LCD power");
 695         gpio_request(S3C64XX_GPF(13), "LCD power");
 696         gpio_request(S3C64XX_GPF(15), "LCD power");
 697
 698         i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
 699         i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
 700
 701         s3c_ide_set_platdata(&smdk6410_ide_pdata);
 702
 703         platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
 704 }
 705
 706 MACHINE_START(SMDK6410, "SMDK6410")
 707         /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
 708         .boot_params    = S3C64XX_PA_SDRAM + 0x100,
 709
 710         .init_irq       = s3c6410_init_irq,
 711         .map_io         = smdk6410_map_io,
 712         .init_machine   = smdk6410_machine_init,
 713         .timer          = &s3c24xx_timer,
 714 MACHINE_END