pandora: defconfig: update
[pandora-kernel.git] / arch / arm / mach-s3c64xx / dev-spi.c
1 /* linux/arch/arm/plat-s3c64xx/dev-spi.c
2  *
3  * Copyright (C) 2009 Samsung Electronics Ltd.
4  *      Jaswinder Singh <jassi.brar@samsung.com>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10
11 #include <linux/kernel.h>
12 #include <linux/string.h>
13 #include <linux/export.h>
14 #include <linux/platform_device.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/gpio.h>
17
18 #include <mach/dma.h>
19 #include <mach/map.h>
20 #include <mach/spi-clocks.h>
21 #include <mach/irqs.h>
22
23 #include <plat/s3c64xx-spi.h>
24 #include <plat/gpio-cfg.h>
25 #include <plat/devs.h>
26
27 static char *spi_src_clks[] = {
28         [S3C64XX_SPI_SRCCLK_PCLK] = "pclk",
29         [S3C64XX_SPI_SRCCLK_SPIBUS] = "spi-bus",
30         [S3C64XX_SPI_SRCCLK_48M] = "spi_48m",
31 };
32
33 /* SPI Controller platform_devices */
34
35 /* Since we emulate multi-cs capability, we do not touch the GPC-3,7.
36  * The emulated CS is toggled by board specific mechanism, as it can
37  * be either some immediate GPIO or some signal out of some other
38  * chip in between ... or some yet another way.
39  * We simply do not assume anything about CS.
40  */
41 static int s3c64xx_spi_cfg_gpio(struct platform_device *pdev)
42 {
43         unsigned int base;
44
45         switch (pdev->id) {
46         case 0:
47                 base = S3C64XX_GPC(0);
48                 break;
49
50         case 1:
51                 base = S3C64XX_GPC(4);
52                 break;
53
54         default:
55                 dev_err(&pdev->dev, "Invalid SPI Controller number!");
56                 return -EINVAL;
57         }
58
59         s3c_gpio_cfgall_range(base, 3,
60                               S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
61
62         return 0;
63 }
64
65 static struct resource s3c64xx_spi0_resource[] = {
66         [0] = {
67                 .start = S3C64XX_PA_SPI0,
68                 .end   = S3C64XX_PA_SPI0 + 0x100 - 1,
69                 .flags = IORESOURCE_MEM,
70         },
71         [1] = {
72                 .start = DMACH_SPI0_TX,
73                 .end   = DMACH_SPI0_TX,
74                 .flags = IORESOURCE_DMA,
75         },
76         [2] = {
77                 .start = DMACH_SPI0_RX,
78                 .end   = DMACH_SPI0_RX,
79                 .flags = IORESOURCE_DMA,
80         },
81         [3] = {
82                 .start = IRQ_SPI0,
83                 .end   = IRQ_SPI0,
84                 .flags = IORESOURCE_IRQ,
85         },
86 };
87
88 static struct s3c64xx_spi_info s3c64xx_spi0_pdata = {
89         .cfg_gpio = s3c64xx_spi_cfg_gpio,
90         .fifo_lvl_mask = 0x7f,
91         .rx_lvl_offset = 13,
92         .tx_st_done = 21,
93 };
94
95 static u64 spi_dmamask = DMA_BIT_MASK(32);
96
97 struct platform_device s3c64xx_device_spi0 = {
98         .name             = "s3c64xx-spi",
99         .id               = 0,
100         .num_resources    = ARRAY_SIZE(s3c64xx_spi0_resource),
101         .resource         = s3c64xx_spi0_resource,
102         .dev = {
103                 .dma_mask               = &spi_dmamask,
104                 .coherent_dma_mask      = DMA_BIT_MASK(32),
105                 .platform_data = &s3c64xx_spi0_pdata,
106         },
107 };
108 EXPORT_SYMBOL(s3c64xx_device_spi0);
109
110 static struct resource s3c64xx_spi1_resource[] = {
111         [0] = {
112                 .start = S3C64XX_PA_SPI1,
113                 .end   = S3C64XX_PA_SPI1 + 0x100 - 1,
114                 .flags = IORESOURCE_MEM,
115         },
116         [1] = {
117                 .start = DMACH_SPI1_TX,
118                 .end   = DMACH_SPI1_TX,
119                 .flags = IORESOURCE_DMA,
120         },
121         [2] = {
122                 .start = DMACH_SPI1_RX,
123                 .end   = DMACH_SPI1_RX,
124                 .flags = IORESOURCE_DMA,
125         },
126         [3] = {
127                 .start = IRQ_SPI1,
128                 .end   = IRQ_SPI1,
129                 .flags = IORESOURCE_IRQ,
130         },
131 };
132
133 static struct s3c64xx_spi_info s3c64xx_spi1_pdata = {
134         .cfg_gpio = s3c64xx_spi_cfg_gpio,
135         .fifo_lvl_mask = 0x7f,
136         .rx_lvl_offset = 13,
137         .tx_st_done = 21,
138 };
139
140 struct platform_device s3c64xx_device_spi1 = {
141         .name             = "s3c64xx-spi",
142         .id               = 1,
143         .num_resources    = ARRAY_SIZE(s3c64xx_spi1_resource),
144         .resource         = s3c64xx_spi1_resource,
145         .dev = {
146                 .dma_mask               = &spi_dmamask,
147                 .coherent_dma_mask      = DMA_BIT_MASK(32),
148                 .platform_data = &s3c64xx_spi1_pdata,
149         },
150 };
151 EXPORT_SYMBOL(s3c64xx_device_spi1);
152
153 void __init s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
154 {
155         struct s3c64xx_spi_info *pd;
156
157         /* Reject invalid configuration */
158         if (!num_cs || src_clk_nr < 0
159                         || src_clk_nr > S3C64XX_SPI_SRCCLK_48M) {
160                 printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
161                 return;
162         }
163
164         switch (cntrlr) {
165         case 0:
166                 pd = &s3c64xx_spi0_pdata;
167                 break;
168         case 1:
169                 pd = &s3c64xx_spi1_pdata;
170                 break;
171         default:
172                 printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
173                                                         __func__, cntrlr);
174                 return;
175         }
176
177         pd->num_cs = num_cs;
178         pd->src_clk_nr = src_clk_nr;
179         pd->src_clk_name = spi_src_clks[src_clk_nr];
180 }