arch/arm/mach-pxa/lpd270.c

   1 /*
   2  * linux/arch/arm/mach-pxa/lpd270.c
   3  *
   4  * Support for the LogicPD PXA270 Card Engine.
   5  * Derived from the mainstone code, which carries these notices:
   6  *
   7  * Author:      Nicolas Pitre
   8  * Created:     Nov 05, 2002
   9  * Copyright:   MontaVista Software Inc.
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  */
  15
  16 #include <linux/init.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/sysdev.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/sched.h>
  21 #include <linux/bitops.h>
  22 #include <linux/fb.h>
  23 #include <linux/ioport.h>
  24 #include <linux/mtd/mtd.h>
  25 #include <linux/mtd/partitions.h>
  26 #include <linux/pwm_backlight.h>
  27
  28 #include <asm/types.h>
  29 #include <asm/setup.h>
  30 #include <asm/memory.h>
  31 #include <asm/mach-types.h>
  32 #include <mach/hardware.h>
  33 #include <asm/irq.h>
  34 #include <asm/sizes.h>
  35
  36 #include <asm/mach/arch.h>
  37 #include <asm/mach/map.h>
  38 #include <asm/mach/irq.h>
  39 #include <asm/mach/flash.h>
  40
  41 #include <mach/pxa27x.h>
  42 #include <mach/gpio.h>
  43 #include <mach/lpd270.h>
  44 #include <mach/audio.h>
  45 #include <mach/pxafb.h>
  46 #include <mach/mmc.h>
  47 #include <mach/irda.h>
  48 #include <mach/ohci.h>
  49 #include <mach/smemc.h>
  50
  51 #include "generic.h"
  52 #include "devices.h"
  53
  54 static unsigned long lpd270_pin_config[] __initdata = {
  55         /* Chip Selects */
  56         GPIO15_nCS_1,   /* Mainboard Flash */
  57         GPIO78_nCS_2,   /* CPLD + Ethernet */
  58
  59         /* LCD - 16bpp Active TFT */
  60         GPIO58_LCD_LDD_0,
  61         GPIO59_LCD_LDD_1,
  62         GPIO60_LCD_LDD_2,
  63         GPIO61_LCD_LDD_3,
  64         GPIO62_LCD_LDD_4,
  65         GPIO63_LCD_LDD_5,
  66         GPIO64_LCD_LDD_6,
  67         GPIO65_LCD_LDD_7,
  68         GPIO66_LCD_LDD_8,
  69         GPIO67_LCD_LDD_9,
  70         GPIO68_LCD_LDD_10,
  71         GPIO69_LCD_LDD_11,
  72         GPIO70_LCD_LDD_12,
  73         GPIO71_LCD_LDD_13,
  74         GPIO72_LCD_LDD_14,
  75         GPIO73_LCD_LDD_15,
  76         GPIO74_LCD_FCLK,
  77         GPIO75_LCD_LCLK,
  78         GPIO76_LCD_PCLK,
  79         GPIO77_LCD_BIAS,
  80         GPIO16_PWM0_OUT,        /* Backlight */
  81
  82         /* USB Host */
  83         GPIO88_USBH1_PWR,
  84         GPIO89_USBH1_PEN,
  85
  86         /* AC97 */
  87         GPIO28_AC97_BITCLK,
  88         GPIO29_AC97_SDATA_IN_0,
  89         GPIO30_AC97_SDATA_OUT,
  90         GPIO31_AC97_SYNC,
  91         GPIO45_AC97_SYSCLK,
  92
  93         GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
  94 };
  95
  96 static unsigned int lpd270_irq_enabled;
  97
  98 static void lpd270_mask_irq(unsigned int irq)
  99 {
 100         int lpd270_irq = irq - LPD270_IRQ(0);
 101
 102         __raw_writew(~(1 << lpd270_irq), LPD270_INT_STATUS);
 103
 104         lpd270_irq_enabled &= ~(1 << lpd270_irq);
 105         __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
 106 }
 107
 108 static void lpd270_unmask_irq(unsigned int irq)
 109 {
 110         int lpd270_irq = irq - LPD270_IRQ(0);
 111
 112         lpd270_irq_enabled |= 1 << lpd270_irq;
 113         __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
 114 }
 115
 116 static struct irq_chip lpd270_irq_chip = {
 117         .name           = "CPLD",
 118         .ack            = lpd270_mask_irq,
 119         .mask           = lpd270_mask_irq,
 120         .unmask         = lpd270_unmask_irq,
 121 };
 122
 123 static void lpd270_irq_handler(unsigned int irq, struct irq_desc *desc)
 124 {
 125         unsigned long pending;
 126
 127         pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled;
 128         do {
 129                 desc->chip->ack(irq);   /* clear useless edge notification */
 130                 if (likely(pending)) {
 131                         irq = LPD270_IRQ(0) + __ffs(pending);
 132                         generic_handle_irq(irq);
 133
 134                         pending = __raw_readw(LPD270_INT_STATUS) &
 135                                                 lpd270_irq_enabled;
 136                 }
 137         } while (pending);
 138 }
 139
 140 static void __init lpd270_init_irq(void)
 141 {
 142         int irq;
 143
 144         pxa27x_init_irq();
 145
 146         __raw_writew(0, LPD270_INT_MASK);
 147         __raw_writew(0, LPD270_INT_STATUS);
 148
 149         /* setup extra LogicPD PXA270 irqs */
 150         for (irq = LPD270_IRQ(2); irq <= LPD270_IRQ(4); irq++) {
 151                 set_irq_chip(irq, &lpd270_irq_chip);
 152                 set_irq_handler(irq, handle_level_irq);
 153                 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
 154         }
 155         set_irq_chained_handler(IRQ_GPIO(0), lpd270_irq_handler);
 156         set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
 157 }
 158
 159
 160 #ifdef CONFIG_PM
 161 static int lpd270_irq_resume(struct sys_device *dev)
 162 {
 163         __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK);
 164         return 0;
 165 }
 166
 167 static struct sysdev_class lpd270_irq_sysclass = {
 168         .name = "cpld_irq",
 169         .resume = lpd270_irq_resume,
 170 };
 171
 172 static struct sys_device lpd270_irq_device = {
 173         .cls = &lpd270_irq_sysclass,
 174 };
 175
 176 static int __init lpd270_irq_device_init(void)
 177 {
 178         int ret = -ENODEV;
 179         if (machine_is_logicpd_pxa270()) {
 180                 ret = sysdev_class_register(&lpd270_irq_sysclass);
 181                 if (ret == 0)
 182                         ret = sysdev_register(&lpd270_irq_device);
 183         }
 184         return ret;
 185 }
 186
 187 device_initcall(lpd270_irq_device_init);
 188 #endif
 189
 190
 191 static struct resource smc91x_resources[] = {
 192         [0] = {
 193                 .start  = LPD270_ETH_PHYS,
 194                 .end    = (LPD270_ETH_PHYS + 0xfffff),
 195                 .flags  = IORESOURCE_MEM,
 196         },
 197         [1] = {
 198                 .start  = LPD270_ETHERNET_IRQ,
 199                 .end    = LPD270_ETHERNET_IRQ,
 200                 .flags  = IORESOURCE_IRQ,
 201         },
 202 };
 203
 204 static struct platform_device smc91x_device = {
 205         .name           = "smc91x",
 206         .id             = 0,
 207         .num_resources  = ARRAY_SIZE(smc91x_resources),
 208         .resource       = smc91x_resources,
 209 };
 210
 211 static struct resource lpd270_flash_resources[] = {
 212         [0] = {
 213                 .start  = PXA_CS0_PHYS,
 214                 .end    = PXA_CS0_PHYS + SZ_64M - 1,
 215                 .flags  = IORESOURCE_MEM,
 216         },
 217         [1] = {
 218                 .start  = PXA_CS1_PHYS,
 219                 .end    = PXA_CS1_PHYS + SZ_64M - 1,
 220                 .flags  = IORESOURCE_MEM,
 221         },
 222 };
 223
 224 static struct mtd_partition lpd270_flash0_partitions[] = {
 225         {
 226                 .name =         "Bootloader",
 227                 .size =         0x00040000,
 228                 .offset =       0,
 229                 .mask_flags =   MTD_WRITEABLE  /* force read-only */
 230         }, {
 231                 .name =         "Kernel",
 232                 .size =         0x00400000,
 233                 .offset =       0x00040000,
 234         }, {
 235                 .name =         "Filesystem",
 236                 .size =         MTDPART_SIZ_FULL,
 237                 .offset =       0x00440000
 238         },
 239 };
 240
 241 static struct flash_platform_data lpd270_flash_data[2] = {
 242         {
 243                 .name           = "processor-flash",
 244                 .map_name       = "cfi_probe",
 245                 .parts          = lpd270_flash0_partitions,
 246                 .nr_parts       = ARRAY_SIZE(lpd270_flash0_partitions),
 247         }, {
 248                 .name           = "mainboard-flash",
 249                 .map_name       = "cfi_probe",
 250                 .parts          = NULL,
 251                 .nr_parts       = 0,
 252         }
 253 };
 254
 255 static struct platform_device lpd270_flash_device[2] = {
 256         {
 257                 .name           = "pxa2xx-flash",
 258                 .id             = 0,
 259                 .dev = {
 260                         .platform_data  = &lpd270_flash_data[0],
 261                 },
 262                 .resource       = &lpd270_flash_resources[0],
 263                 .num_resources  = 1,
 264         }, {
 265                 .name           = "pxa2xx-flash",
 266                 .id             = 1,
 267                 .dev = {
 268                         .platform_data  = &lpd270_flash_data[1],
 269                 },
 270                 .resource       = &lpd270_flash_resources[1],
 271                 .num_resources  = 1,
 272         },
 273 };
 274
 275 static struct platform_pwm_backlight_data lpd270_backlight_data = {
 276         .pwm_id         = 0,
 277         .max_brightness = 1,
 278         .dft_brightness = 1,
 279         .pwm_period_ns  = 78770,
 280 };
 281
 282 static struct platform_device lpd270_backlight_device = {
 283         .name           = "pwm-backlight",
 284         .dev            = {
 285                 .parent = &pxa27x_device_pwm0.dev,
 286                 .platform_data = &lpd270_backlight_data,
 287         },
 288 };
 289
 290 /* 5.7" TFT QVGA (LoLo display number 1) */
 291 static struct pxafb_mode_info sharp_lq057q3dc02_mode = {
 292         .pixclock               = 150000,
 293         .xres                   = 320,
 294         .yres                   = 240,
 295         .bpp                    = 16,
 296         .hsync_len              = 0x14,
 297         .left_margin            = 0x28,
 298         .right_margin           = 0x0a,
 299         .vsync_len              = 0x02,
 300         .upper_margin           = 0x08,
 301         .lower_margin           = 0x14,
 302         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 303 };
 304
 305 static struct pxafb_mach_info sharp_lq057q3dc02 = {
 306         .modes                  = &sharp_lq057q3dc02_mode,
 307         .num_modes              = 1,
 308         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
 309                                   LCD_ALTERNATE_MAPPING,
 310 };
 311
 312 /* 12.1" TFT SVGA (LoLo display number 2) */
 313 static struct pxafb_mode_info sharp_lq121s1dg31_mode = {
 314         .pixclock               = 50000,
 315         .xres                   = 800,
 316         .yres                   = 600,
 317         .bpp                    = 16,
 318         .hsync_len              = 0x05,
 319         .left_margin            = 0x52,
 320         .right_margin           = 0x05,
 321         .vsync_len              = 0x04,
 322         .upper_margin           = 0x14,
 323         .lower_margin           = 0x0a,
 324         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 325 };
 326
 327 static struct pxafb_mach_info sharp_lq121s1dg31 = {
 328         .modes                  = &sharp_lq121s1dg31_mode,
 329         .num_modes              = 1,
 330         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
 331                                   LCD_ALTERNATE_MAPPING,
 332 };
 333
 334 /* 3.6" TFT QVGA (LoLo display number 3) */
 335 static struct pxafb_mode_info sharp_lq036q1da01_mode = {
 336         .pixclock               = 150000,
 337         .xres                   = 320,
 338         .yres                   = 240,
 339         .bpp                    = 16,
 340         .hsync_len              = 0x0e,
 341         .left_margin            = 0x04,
 342         .right_margin           = 0x0a,
 343         .vsync_len              = 0x03,
 344         .upper_margin           = 0x03,
 345         .lower_margin           = 0x03,
 346         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 347 };
 348
 349 static struct pxafb_mach_info sharp_lq036q1da01 = {
 350         .modes                  = &sharp_lq036q1da01_mode,
 351         .num_modes              = 1,
 352         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
 353                                   LCD_ALTERNATE_MAPPING,
 354 };
 355
 356 /* 6.4" TFT VGA (LoLo display number 5) */
 357 static struct pxafb_mode_info sharp_lq64d343_mode = {
 358         .pixclock               = 25000,
 359         .xres                   = 640,
 360         .yres                   = 480,
 361         .bpp                    = 16,
 362         .hsync_len              = 0x31,
 363         .left_margin            = 0x89,
 364         .right_margin           = 0x19,
 365         .vsync_len              = 0x12,
 366         .upper_margin           = 0x22,
 367         .lower_margin           = 0x00,
 368         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 369 };
 370
 371 static struct pxafb_mach_info sharp_lq64d343 = {
 372         .modes                  = &sharp_lq64d343_mode,
 373         .num_modes              = 1,
 374         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
 375                                   LCD_ALTERNATE_MAPPING,
 376 };
 377
 378 /* 10.4" TFT VGA (LoLo display number 7) */
 379 static struct pxafb_mode_info sharp_lq10d368_mode = {
 380         .pixclock               = 25000,
 381         .xres                   = 640,
 382         .yres                   = 480,
 383         .bpp                    = 16,
 384         .hsync_len              = 0x31,
 385         .left_margin            = 0x89,
 386         .right_margin           = 0x19,
 387         .vsync_len              = 0x12,
 388         .upper_margin           = 0x22,
 389         .lower_margin           = 0x00,
 390         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 391 };
 392
 393 static struct pxafb_mach_info sharp_lq10d368 = {
 394         .modes                  = &sharp_lq10d368_mode,
 395         .num_modes              = 1,
 396         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
 397                                   LCD_ALTERNATE_MAPPING,
 398 };
 399
 400 /* 3.5" TFT QVGA (LoLo display number 8) */
 401 static struct pxafb_mode_info sharp_lq035q7db02_20_mode = {
 402         .pixclock               = 150000,
 403         .xres                   = 240,
 404         .yres                   = 320,
 405         .bpp                    = 16,
 406         .hsync_len              = 0x0e,
 407         .left_margin            = 0x0a,
 408         .right_margin           = 0x0a,
 409         .vsync_len              = 0x03,
 410         .upper_margin           = 0x05,
 411         .lower_margin           = 0x14,
 412         .sync                   = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 413 };
 414
 415 static struct pxafb_mach_info sharp_lq035q7db02_20 = {
 416         .modes                  = &sharp_lq035q7db02_20_mode,
 417         .num_modes              = 1,
 418         .lcd_conn               = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL |
 419                                   LCD_ALTERNATE_MAPPING,
 420 };
 421
 422 static struct pxafb_mach_info *lpd270_lcd_to_use;
 423
 424 static int __init lpd270_set_lcd(char *str)
 425 {
 426         if (!strnicmp(str, "lq057q3dc02", 11)) {
 427                 lpd270_lcd_to_use = &sharp_lq057q3dc02;
 428         } else if (!strnicmp(str, "lq121s1dg31", 11)) {
 429                 lpd270_lcd_to_use = &sharp_lq121s1dg31;
 430         } else if (!strnicmp(str, "lq036q1da01", 11)) {
 431                 lpd270_lcd_to_use = &sharp_lq036q1da01;
 432         } else if (!strnicmp(str, "lq64d343", 8)) {
 433                 lpd270_lcd_to_use = &sharp_lq64d343;
 434         } else if (!strnicmp(str, "lq10d368", 8)) {
 435                 lpd270_lcd_to_use = &sharp_lq10d368;
 436         } else if (!strnicmp(str, "lq035q7db02-20", 14)) {
 437                 lpd270_lcd_to_use = &sharp_lq035q7db02_20;
 438         } else {
 439                 printk(KERN_INFO "lpd270: unknown lcd panel [%s]\n", str);
 440         }
 441
 442         return 1;
 443 }
 444
 445 __setup("lcd=", lpd270_set_lcd);
 446
 447 static struct platform_device *platform_devices[] __initdata = {
 448         &smc91x_device,
 449         &lpd270_backlight_device,
 450         &lpd270_flash_device[0],
 451         &lpd270_flash_device[1],
 452 };
 453
 454 static struct pxaohci_platform_data lpd270_ohci_platform_data = {
 455         .port_mode      = PMM_PERPORT_MODE,
 456         .flags          = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
 457 };
 458
 459 static void __init lpd270_init(void)
 460 {
 461         pxa2xx_mfp_config(ARRAY_AND_SIZE(lpd270_pin_config));
 462
 463         pxa_set_ffuart_info(NULL);
 464         pxa_set_btuart_info(NULL);
 465         pxa_set_stuart_info(NULL);
 466
 467         lpd270_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4;
 468         lpd270_flash_data[1].width = 4;
 469
 470         /*
 471          * System bus arbiter setting:
 472          * - Core_Park
 473          * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
 474          */
 475         ARB_CNTRL = ARB_CORE_PARK | 0x234;
 476
 477         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
 478
 479         pxa_set_ac97_info(NULL);
 480
 481         if (lpd270_lcd_to_use != NULL)
 482                 set_pxa_fb_info(lpd270_lcd_to_use);
 483
 484         pxa_set_ohci_info(&lpd270_ohci_platform_data);
 485 }
 486
 487
 488 static struct map_desc lpd270_io_desc[] __initdata = {
 489         {
 490                 .virtual        = LPD270_CPLD_VIRT,
 491                 .pfn            = __phys_to_pfn(LPD270_CPLD_PHYS),
 492                 .length         = LPD270_CPLD_SIZE,
 493                 .type           = MT_DEVICE,
 494         },
 495 };
 496
 497 static void __init lpd270_map_io(void)
 498 {
 499         pxa27x_map_io();
 500         iotable_init(lpd270_io_desc, ARRAY_SIZE(lpd270_io_desc));
 501
 502         /* for use I SRAM as framebuffer.  */
 503         PSLR |= 0x00000F04;
 504         PCFR  = 0x00000066;
 505 }
 506
 507 MACHINE_START(LOGICPD_PXA270, "LogicPD PXA270 Card Engine")
 508         /* Maintainer: Peter Barada */
 509         .boot_params    = 0xa0000100,
 510         .map_io         = lpd270_map_io,
 511         .nr_irqs        = LPD270_NR_IRQS,
 512         .init_irq       = lpd270_init_irq,
 513         .timer          = &pxa_timer,
 514         .init_machine   = lpd270_init,
 515 MACHINE_END