arch/arm/mach-omap2/gpmc-nand.c

   1 /*
   2  * gpmc-nand.c
   3  *
   4  * Copyright (C) 2009 Texas Instruments
   5  * Vimal Singh <vimalsingh@ti.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/io.h>
  15
  16 #include <asm/mach/flash.h>
  17
  18 #include <plat/nand.h>
  19 #include <plat/board.h>
  20 #include <plat/gpmc.h>
  21
  22 #define WR_RD_PIN_MONITORING    0x00600000
  23
  24 static struct omap_nand_platform_data *gpmc_nand_data;
  25
  26 static struct resource gpmc_nand_resource = {
  27         .flags          = IORESOURCE_MEM,
  28 };
  29
  30 static struct platform_device gpmc_nand_device = {
  31         .name           = "omap2-nand",
  32         .id             = 0,
  33         .num_resources  = 1,
  34         .resource       = &gpmc_nand_resource,
  35 };
  36
  37 static int omap2_nand_gpmc_retime(void)
  38 {
  39         struct gpmc_timings t;
  40         int err;
  41
  42         memset(&t, 0, sizeof(t));
  43         t.sync_clk = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->sync_clk);
  44         t.cs_on = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_on);
  45         t.adv_on = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->adv_on);
  46
  47         /* Read */
  48         t.adv_rd_off = gpmc_round_ns_to_ticks(
  49                                 gpmc_nand_data->gpmc_t->adv_rd_off);
  50         t.oe_on  = t.adv_on;
  51         t.access = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->access);
  52         t.oe_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->oe_off);
  53         t.cs_rd_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_rd_off);
  54         t.rd_cycle  = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->rd_cycle);
  55
  56         /* Write */
  57         t.adv_wr_off = gpmc_round_ns_to_ticks(
  58                                 gpmc_nand_data->gpmc_t->adv_wr_off);
  59         t.we_on  = t.oe_on;
  60         if (cpu_is_omap34xx()) {
  61             t.wr_data_mux_bus = gpmc_round_ns_to_ticks(
  62                                 gpmc_nand_data->gpmc_t->wr_data_mux_bus);
  63             t.wr_access = gpmc_round_ns_to_ticks(
  64                                 gpmc_nand_data->gpmc_t->wr_access);
  65         }
  66         t.we_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->we_off);
  67         t.cs_wr_off = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_wr_off);
  68         t.wr_cycle  = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->wr_cycle);
  69
  70         /* Configure GPMC */
  71         gpmc_cs_write_reg(gpmc_nand_data->cs, GPMC_CS_CONFIG1,
  72                         GPMC_CONFIG1_DEVICESIZE(gpmc_nand_data->devsize) |
  73                         GPMC_CONFIG1_DEVICETYPE_NAND);
  74
  75         err = gpmc_cs_set_timings(gpmc_nand_data->cs, &t);
  76         if (err)
  77                 return err;
  78
  79         return 0;
  80 }
  81
  82 static int gpmc_nand_setup(void)
  83 {
  84         struct device *dev = &gpmc_nand_device.dev;
  85
  86         /* Set timings in GPMC */
  87         if (omap2_nand_gpmc_retime() < 0) {
  88                 dev_err(dev, "Unable to set gpmc timings\n");
  89                 return -EINVAL;
  90         }
  91
  92         return 0;
  93 }
  94
  95 int __init gpmc_nand_init(struct omap_nand_platform_data *_nand_data)
  96 {
  97         unsigned int val;
  98         int err = 0;
  99         struct device *dev = &gpmc_nand_device.dev;
 100
 101         gpmc_nand_data = _nand_data;
 102         gpmc_nand_data->nand_setup = gpmc_nand_setup;
 103         gpmc_nand_device.dev.platform_data = gpmc_nand_data;
 104
 105         err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE,
 106                                 &gpmc_nand_data->phys_base);
 107         if (err < 0) {
 108                 dev_err(dev, "Cannot request GPMC CS\n");
 109                 return err;
 110         }
 111
 112         err = gpmc_nand_setup();
 113         if (err < 0) {
 114                 dev_err(dev, "NAND platform setup failed: %d\n", err);
 115                 return err;
 116         }
 117
 118         /* Enable RD PIN Monitoring Reg */
 119         if (gpmc_nand_data->dev_ready) {
 120                 val  = gpmc_cs_read_reg(gpmc_nand_data->cs,
 121                                                  GPMC_CS_CONFIG1);
 122                 val |= WR_RD_PIN_MONITORING;
 123                 gpmc_cs_write_reg(gpmc_nand_data->cs,
 124                                                 GPMC_CS_CONFIG1, val);
 125         }
 126
 127         err = platform_device_register(&gpmc_nand_device);
 128         if (err < 0) {
 129                 dev_err(dev, "Unable to register NAND device\n");
 130                 goto out_free_cs;
 131         }
 132
 133         return 0;
 134
 135 out_free_cs:
 136         gpmc_cs_free(gpmc_nand_data->cs);
 137
 138         return err;
 139 }