arch/arm/mach-omap2/devices.c

   1 /*
   2  * linux/arch/arm/mach-omap2/devices.c
   3  *
   4  * OMAP2 platform device setup/initialization
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  */
  11
  12 #include <linux/module.h>
  13 #include <linux/kernel.h>
  14 #include <linux/init.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/io.h>
  17 #include <linux/clk.h>
  18
  19 #include <mach/hardware.h>
  20 #include <mach/irqs.h>
  21 #include <asm/mach-types.h>
  22 #include <asm/mach/map.h>
  23 #include <asm/pmu.h>
  24
  25 #include <plat/control.h>
  26 #include <plat/tc.h>
  27 #include <plat/board.h>
  28 #include <mach/gpio.h>
  29 #include <plat/mmc.h>
  30 #include <plat/dma.h>
  31
  32 #include "mux.h"
  33
  34 #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
  35
  36 static struct resource cam_resources[] = {
  37         {
  38                 .start          = OMAP24XX_CAMERA_BASE,
  39                 .end            = OMAP24XX_CAMERA_BASE + 0xfff,
  40                 .flags          = IORESOURCE_MEM,
  41         },
  42         {
  43                 .start          = INT_24XX_CAM_IRQ,
  44                 .flags          = IORESOURCE_IRQ,
  45         }
  46 };
  47
  48 static struct platform_device omap_cam_device = {
  49         .name           = "omap24xxcam",
  50         .id             = -1,
  51         .num_resources  = ARRAY_SIZE(cam_resources),
  52         .resource       = cam_resources,
  53 };
  54
  55 static inline void omap_init_camera(void)
  56 {
  57         platform_device_register(&omap_cam_device);
  58 }
  59
  60 #elif defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE)
  61
  62 static struct resource omap3isp_resources[] = {
  63         {
  64                 .start          = OMAP3430_ISP_BASE,
  65                 .end            = OMAP3430_ISP_END,
  66                 .flags          = IORESOURCE_MEM,
  67         },
  68         {
  69                 .start          = OMAP3430_ISP_CBUFF_BASE,
  70                 .end            = OMAP3430_ISP_CBUFF_END,
  71                 .flags          = IORESOURCE_MEM,
  72         },
  73         {
  74                 .start          = OMAP3430_ISP_CCP2_BASE,
  75                 .end            = OMAP3430_ISP_CCP2_END,
  76                 .flags          = IORESOURCE_MEM,
  77         },
  78         {
  79                 .start          = OMAP3430_ISP_CCDC_BASE,
  80                 .end            = OMAP3430_ISP_CCDC_END,
  81                 .flags          = IORESOURCE_MEM,
  82         },
  83         {
  84                 .start          = OMAP3430_ISP_HIST_BASE,
  85                 .end            = OMAP3430_ISP_HIST_END,
  86                 .flags          = IORESOURCE_MEM,
  87         },
  88         {
  89                 .start          = OMAP3430_ISP_H3A_BASE,
  90                 .end            = OMAP3430_ISP_H3A_END,
  91                 .flags          = IORESOURCE_MEM,
  92         },
  93         {
  94                 .start          = OMAP3430_ISP_PREV_BASE,
  95                 .end            = OMAP3430_ISP_PREV_END,
  96                 .flags          = IORESOURCE_MEM,
  97         },
  98         {
  99                 .start          = OMAP3430_ISP_RESZ_BASE,
 100                 .end            = OMAP3430_ISP_RESZ_END,
 101                 .flags          = IORESOURCE_MEM,
 102         },
 103         {
 104                 .start          = OMAP3430_ISP_SBL_BASE,
 105                 .end            = OMAP3430_ISP_SBL_END,
 106                 .flags          = IORESOURCE_MEM,
 107         },
 108         {
 109                 .start          = OMAP3430_ISP_CSI2A_BASE,
 110                 .end            = OMAP3430_ISP_CSI2A_END,
 111                 .flags          = IORESOURCE_MEM,
 112         },
 113         {
 114                 .start          = OMAP3430_ISP_CSI2PHY_BASE,
 115                 .end            = OMAP3430_ISP_CSI2PHY_END,
 116                 .flags          = IORESOURCE_MEM,
 117         },
 118         {
 119                 .start          = INT_34XX_CAM_IRQ,
 120                 .flags          = IORESOURCE_IRQ,
 121         }
 122 };
 123
 124 static struct platform_device omap3isp_device = {
 125         .name           = "omap3isp",
 126         .id             = -1,
 127         .num_resources  = ARRAY_SIZE(omap3isp_resources),
 128         .resource       = omap3isp_resources,
 129 };
 130
 131 static inline void omap_init_camera(void)
 132 {
 133         platform_device_register(&omap3isp_device);
 134 }
 135 #else
 136 static inline void omap_init_camera(void)
 137 {
 138 }
 139 #endif
 140
 141 #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
 142
 143 #define MBOX_REG_SIZE   0x120
 144
 145 #ifdef CONFIG_ARCH_OMAP2
 146 static struct resource omap2_mbox_resources[] = {
 147         {
 148                 .start          = OMAP24XX_MAILBOX_BASE,
 149                 .end            = OMAP24XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
 150                 .flags          = IORESOURCE_MEM,
 151         },
 152         {
 153                 .start          = INT_24XX_MAIL_U0_MPU,
 154                 .flags          = IORESOURCE_IRQ,
 155                 .name           = "dsp",
 156         },
 157         {
 158                 .start          = INT_24XX_MAIL_U3_MPU,
 159                 .flags          = IORESOURCE_IRQ,
 160                 .name           = "iva",
 161         },
 162 };
 163 static int omap2_mbox_resources_sz = ARRAY_SIZE(omap2_mbox_resources);
 164 #else
 165 #define omap2_mbox_resources            NULL
 166 #define omap2_mbox_resources_sz         0
 167 #endif
 168
 169 #ifdef CONFIG_ARCH_OMAP3
 170 static struct resource omap3_mbox_resources[] = {
 171         {
 172                 .start          = OMAP34XX_MAILBOX_BASE,
 173                 .end            = OMAP34XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
 174                 .flags          = IORESOURCE_MEM,
 175         },
 176         {
 177                 .start          = INT_24XX_MAIL_U0_MPU,
 178                 .flags          = IORESOURCE_IRQ,
 179                 .name           = "dsp",
 180         },
 181 };
 182 static int omap3_mbox_resources_sz = ARRAY_SIZE(omap3_mbox_resources);
 183 #else
 184 #define omap3_mbox_resources            NULL
 185 #define omap3_mbox_resources_sz         0
 186 #endif
 187
 188 #ifdef CONFIG_ARCH_OMAP4
 189
 190 #define OMAP4_MBOX_REG_SIZE     0x130
 191 static struct resource omap4_mbox_resources[] = {
 192         {
 193                 .start          = OMAP44XX_MAILBOX_BASE,
 194                 .end            = OMAP44XX_MAILBOX_BASE +
 195                                         OMAP4_MBOX_REG_SIZE - 1,
 196                 .flags          = IORESOURCE_MEM,
 197         },
 198         {
 199                 .start          = OMAP44XX_IRQ_MAIL_U0,
 200                 .flags          = IORESOURCE_IRQ,
 201                 .name           = "mbox",
 202         },
 203 };
 204 static int omap4_mbox_resources_sz = ARRAY_SIZE(omap4_mbox_resources);
 205 #else
 206 #define omap4_mbox_resources            NULL
 207 #define omap4_mbox_resources_sz         0
 208 #endif
 209
 210 static struct platform_device mbox_device = {
 211         .name           = "omap-mailbox",
 212         .id             = -1,
 213 };
 214
 215 static inline void omap_init_mbox(void)
 216 {
 217         if (cpu_is_omap24xx()) {
 218                 mbox_device.resource = omap2_mbox_resources;
 219                 mbox_device.num_resources = omap2_mbox_resources_sz;
 220         } else if (cpu_is_omap34xx()) {
 221                 mbox_device.resource = omap3_mbox_resources;
 222                 mbox_device.num_resources = omap3_mbox_resources_sz;
 223         } else if (cpu_is_omap44xx()) {
 224                 mbox_device.resource = omap4_mbox_resources;
 225                 mbox_device.num_resources = omap4_mbox_resources_sz;
 226         } else {
 227                 pr_err("%s: platform not supported\n", __func__);
 228                 return;
 229         }
 230         platform_device_register(&mbox_device);
 231 }
 232 #else
 233 static inline void omap_init_mbox(void) { }
 234 #endif /* CONFIG_OMAP_MBOX_FWK */
 235
 236 static inline void omap_init_sti(void) {}
 237
 238 #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
 239
 240 #include <plat/mcspi.h>
 241
 242 #define OMAP2_MCSPI1_BASE               0x48098000
 243 #define OMAP2_MCSPI2_BASE               0x4809a000
 244 #define OMAP2_MCSPI3_BASE               0x480b8000
 245 #define OMAP2_MCSPI4_BASE               0x480ba000
 246
 247 #define OMAP4_MCSPI1_BASE               0x48098100
 248 #define OMAP4_MCSPI2_BASE               0x4809a100
 249 #define OMAP4_MCSPI3_BASE               0x480b8100
 250 #define OMAP4_MCSPI4_BASE               0x480ba100
 251
 252 static struct omap2_mcspi_platform_config omap2_mcspi1_config = {
 253         .num_cs         = 4,
 254 };
 255
 256 static struct resource omap2_mcspi1_resources[] = {
 257         {
 258                 .start          = OMAP2_MCSPI1_BASE,
 259                 .end            = OMAP2_MCSPI1_BASE + 0xff,
 260                 .flags          = IORESOURCE_MEM,
 261         },
 262 };
 263
 264 static struct platform_device omap2_mcspi1 = {
 265         .name           = "omap2_mcspi",
 266         .id             = 1,
 267         .num_resources  = ARRAY_SIZE(omap2_mcspi1_resources),
 268         .resource       = omap2_mcspi1_resources,
 269         .dev            = {
 270                 .platform_data = &omap2_mcspi1_config,
 271         },
 272 };
 273
 274 static struct omap2_mcspi_platform_config omap2_mcspi2_config = {
 275         .num_cs         = 2,
 276 };
 277
 278 static struct resource omap2_mcspi2_resources[] = {
 279         {
 280                 .start          = OMAP2_MCSPI2_BASE,
 281                 .end            = OMAP2_MCSPI2_BASE + 0xff,
 282                 .flags          = IORESOURCE_MEM,
 283         },
 284 };
 285
 286 static struct platform_device omap2_mcspi2 = {
 287         .name           = "omap2_mcspi",
 288         .id             = 2,
 289         .num_resources  = ARRAY_SIZE(omap2_mcspi2_resources),
 290         .resource       = omap2_mcspi2_resources,
 291         .dev            = {
 292                 .platform_data = &omap2_mcspi2_config,
 293         },
 294 };
 295
 296 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
 297         defined(CONFIG_ARCH_OMAP4)
 298 static struct omap2_mcspi_platform_config omap2_mcspi3_config = {
 299         .num_cs         = 2,
 300 };
 301
 302 static struct resource omap2_mcspi3_resources[] = {
 303         {
 304         .start          = OMAP2_MCSPI3_BASE,
 305         .end            = OMAP2_MCSPI3_BASE + 0xff,
 306         .flags          = IORESOURCE_MEM,
 307         },
 308 };
 309
 310 static struct platform_device omap2_mcspi3 = {
 311         .name           = "omap2_mcspi",
 312         .id             = 3,
 313         .num_resources  = ARRAY_SIZE(omap2_mcspi3_resources),
 314         .resource       = omap2_mcspi3_resources,
 315         .dev            = {
 316                 .platform_data = &omap2_mcspi3_config,
 317         },
 318 };
 319 #endif
 320
 321 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
 322 static struct omap2_mcspi_platform_config omap2_mcspi4_config = {
 323         .num_cs         = 1,
 324 };
 325
 326 static struct resource omap2_mcspi4_resources[] = {
 327         {
 328                 .start          = OMAP2_MCSPI4_BASE,
 329                 .end            = OMAP2_MCSPI4_BASE + 0xff,
 330                 .flags          = IORESOURCE_MEM,
 331         },
 332 };
 333
 334 static struct platform_device omap2_mcspi4 = {
 335         .name           = "omap2_mcspi",
 336         .id             = 4,
 337         .num_resources  = ARRAY_SIZE(omap2_mcspi4_resources),
 338         .resource       = omap2_mcspi4_resources,
 339         .dev            = {
 340                 .platform_data = &omap2_mcspi4_config,
 341         },
 342 };
 343 #endif
 344
 345 #ifdef CONFIG_ARCH_OMAP4
 346 static inline void omap4_mcspi_fixup(void)
 347 {
 348         omap2_mcspi1_resources[0].start = OMAP4_MCSPI1_BASE;
 349         omap2_mcspi1_resources[0].end   = OMAP4_MCSPI1_BASE + 0xff;
 350         omap2_mcspi2_resources[0].start = OMAP4_MCSPI2_BASE;
 351         omap2_mcspi2_resources[0].end   = OMAP4_MCSPI2_BASE + 0xff;
 352         omap2_mcspi3_resources[0].start = OMAP4_MCSPI3_BASE;
 353         omap2_mcspi3_resources[0].end   = OMAP4_MCSPI3_BASE + 0xff;
 354         omap2_mcspi4_resources[0].start = OMAP4_MCSPI4_BASE;
 355         omap2_mcspi4_resources[0].end   = OMAP4_MCSPI4_BASE + 0xff;
 356 }
 357 #else
 358 static inline void omap4_mcspi_fixup(void)
 359 {
 360 }
 361 #endif
 362
 363 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
 364         defined(CONFIG_ARCH_OMAP4)
 365 static inline void omap2_mcspi3_init(void)
 366 {
 367         platform_device_register(&omap2_mcspi3);
 368 }
 369 #else
 370 static inline void omap2_mcspi3_init(void)
 371 {
 372 }
 373 #endif
 374
 375 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
 376 static inline void omap2_mcspi4_init(void)
 377 {
 378         platform_device_register(&omap2_mcspi4);
 379 }
 380 #else
 381 static inline void omap2_mcspi4_init(void)
 382 {
 383 }
 384 #endif
 385
 386 static void omap_init_mcspi(void)
 387 {
 388         if (cpu_is_omap44xx())
 389                 omap4_mcspi_fixup();
 390
 391         platform_device_register(&omap2_mcspi1);
 392         platform_device_register(&omap2_mcspi2);
 393
 394         if (cpu_is_omap2430() || cpu_is_omap343x() || cpu_is_omap44xx())
 395                 omap2_mcspi3_init();
 396
 397         if (cpu_is_omap343x() || cpu_is_omap44xx())
 398                 omap2_mcspi4_init();
 399 }
 400
 401 #else
 402 static inline void omap_init_mcspi(void) {}
 403 #endif
 404
 405 static struct resource omap2_pmu_resource = {
 406         .start  = 3,
 407         .end    = 3,
 408         .flags  = IORESOURCE_IRQ,
 409 };
 410
 411 static struct resource omap3_pmu_resource = {
 412         .start  = INT_34XX_BENCH_MPU_EMUL,
 413         .end    = INT_34XX_BENCH_MPU_EMUL,
 414         .flags  = IORESOURCE_IRQ,
 415 };
 416
 417 static struct platform_device omap_pmu_device = {
 418         .name           = "arm-pmu",
 419         .id             = ARM_PMU_DEVICE_CPU,
 420         .num_resources  = 1,
 421 };
 422
 423 static void omap_init_pmu(void)
 424 {
 425         if (cpu_is_omap24xx())
 426                 omap_pmu_device.resource = &omap2_pmu_resource;
 427         else if (cpu_is_omap34xx())
 428                 omap_pmu_device.resource = &omap3_pmu_resource;
 429         else
 430                 return;
 431
 432         platform_device_register(&omap_pmu_device);
 433 }
 434
 435
 436 #if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
 437
 438 #ifdef CONFIG_ARCH_OMAP2
 439 static struct resource omap2_sham_resources[] = {
 440         {
 441                 .start  = OMAP24XX_SEC_SHA1MD5_BASE,
 442                 .end    = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
 443                 .flags  = IORESOURCE_MEM,
 444         },
 445         {
 446                 .start  = INT_24XX_SHA1MD5,
 447                 .flags  = IORESOURCE_IRQ,
 448         }
 449 };
 450 static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources);
 451 #else
 452 #define omap2_sham_resources            NULL
 453 #define omap2_sham_resources_sz         0
 454 #endif
 455
 456 #ifdef CONFIG_ARCH_OMAP3
 457 static struct resource omap3_sham_resources[] = {
 458         {
 459                 .start  = OMAP34XX_SEC_SHA1MD5_BASE,
 460                 .end    = OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
 461                 .flags  = IORESOURCE_MEM,
 462         },
 463         {
 464                 .start  = INT_34XX_SHA1MD52_IRQ,
 465                 .flags  = IORESOURCE_IRQ,
 466         },
 467         {
 468                 .start  = OMAP34XX_DMA_SHA1MD5_RX,
 469                 .flags  = IORESOURCE_DMA,
 470         }
 471 };
 472 static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources);
 473 #else
 474 #define omap3_sham_resources            NULL
 475 #define omap3_sham_resources_sz         0
 476 #endif
 477
 478 static struct platform_device sham_device = {
 479         .name           = "omap-sham",
 480         .id             = -1,
 481 };
 482
 483 static void omap_init_sham(void)
 484 {
 485         if (cpu_is_omap24xx()) {
 486                 sham_device.resource = omap2_sham_resources;
 487                 sham_device.num_resources = omap2_sham_resources_sz;
 488         } else if (cpu_is_omap34xx()) {
 489                 sham_device.resource = omap3_sham_resources;
 490                 sham_device.num_resources = omap3_sham_resources_sz;
 491         } else {
 492                 pr_err("%s: platform not supported\n", __func__);
 493                 return;
 494         }
 495         platform_device_register(&sham_device);
 496 }
 497 #else
 498 static inline void omap_init_sham(void) { }
 499 #endif
 500
 501 #if defined(CONFIG_CRYPTO_DEV_OMAP_AES) || defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE)
 502
 503 #ifdef CONFIG_ARCH_OMAP2
 504 static struct resource omap2_aes_resources[] = {
 505         {
 506                 .start  = OMAP24XX_SEC_AES_BASE,
 507                 .end    = OMAP24XX_SEC_AES_BASE + 0x4C,
 508                 .flags  = IORESOURCE_MEM,
 509         },
 510         {
 511                 .start  = OMAP24XX_DMA_AES_TX,
 512                 .flags  = IORESOURCE_DMA,
 513         },
 514         {
 515                 .start  = OMAP24XX_DMA_AES_RX,
 516                 .flags  = IORESOURCE_DMA,
 517         }
 518 };
 519 static int omap2_aes_resources_sz = ARRAY_SIZE(omap2_aes_resources);
 520 #else
 521 #define omap2_aes_resources             NULL
 522 #define omap2_aes_resources_sz          0
 523 #endif
 524
 525 #ifdef CONFIG_ARCH_OMAP3
 526 static struct resource omap3_aes_resources[] = {
 527         {
 528                 .start  = OMAP34XX_SEC_AES_BASE,
 529                 .end    = OMAP34XX_SEC_AES_BASE + 0x4C,
 530                 .flags  = IORESOURCE_MEM,
 531         },
 532         {
 533                 .start  = OMAP34XX_DMA_AES2_TX,
 534                 .flags  = IORESOURCE_DMA,
 535         },
 536         {
 537                 .start  = OMAP34XX_DMA_AES2_RX,
 538                 .flags  = IORESOURCE_DMA,
 539         }
 540 };
 541 static int omap3_aes_resources_sz = ARRAY_SIZE(omap3_aes_resources);
 542 #else
 543 #define omap3_aes_resources             NULL
 544 #define omap3_aes_resources_sz          0
 545 #endif
 546
 547 static struct platform_device aes_device = {
 548         .name           = "omap-aes",
 549         .id             = -1,
 550 };
 551
 552 static void omap_init_aes(void)
 553 {
 554         if (cpu_is_omap24xx()) {
 555                 aes_device.resource = omap2_aes_resources;
 556                 aes_device.num_resources = omap2_aes_resources_sz;
 557         } else if (cpu_is_omap34xx()) {
 558                 aes_device.resource = omap3_aes_resources;
 559                 aes_device.num_resources = omap3_aes_resources_sz;
 560         } else {
 561                 pr_err("%s: platform not supported\n", __func__);
 562                 return;
 563         }
 564         platform_device_register(&aes_device);
 565 }
 566
 567 #else
 568 static inline void omap_init_aes(void) { }
 569 #endif
 570
 571 /*-------------------------------------------------------------------------*/
 572
 573 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
 574
 575 #define MMCHS_SYSCONFIG                 0x0010
 576 #define MMCHS_SYSCONFIG_SWRESET         (1 << 1)
 577 #define MMCHS_SYSSTATUS                 0x0014
 578 #define MMCHS_SYSSTATUS_RESETDONE       (1 << 0)
 579
 580 static struct platform_device dummy_pdev = {
 581         .dev = {
 582                 .bus = &platform_bus_type,
 583         },
 584 };
 585
 586 /**
 587  * omap_hsmmc_reset() - Full reset of each HS-MMC controller
 588  *
 589  * Ensure that each MMC controller is fully reset.  Controllers
 590  * left in an unknown state (by bootloader) may prevent retention
 591  * or OFF-mode.  This is especially important in cases where the
 592  * MMC driver is not enabled, _or_ built as a module.
 593  *
 594  * In order for reset to work, interface, functional and debounce
 595  * clocks must be enabled.  The debounce clock comes from func_32k_clk
 596  * and is not under SW control, so we only enable i- and f-clocks.
 597  **/
 598 static void __init omap_hsmmc_reset(void)
 599 {
 600         u32 i, nr_controllers;
 601
 602         if (cpu_is_omap242x())
 603                 return;
 604
 605         nr_controllers = cpu_is_omap44xx() ? OMAP44XX_NR_MMC :
 606                 (cpu_is_omap34xx() ? OMAP34XX_NR_MMC : OMAP24XX_NR_MMC);
 607
 608         for (i = 0; i < nr_controllers; i++) {
 609                 u32 v, base = 0;
 610                 struct clk *iclk, *fclk;
 611                 struct device *dev = &dummy_pdev.dev;
 612
 613                 switch (i) {
 614                 case 0:
 615                         base = OMAP2_MMC1_BASE;
 616                         break;
 617                 case 1:
 618                         base = OMAP2_MMC2_BASE;
 619                         break;
 620                 case 2:
 621                         base = OMAP3_MMC3_BASE;
 622                         break;
 623                 case 3:
 624                         if (!cpu_is_omap44xx())
 625                                 return;
 626                         base = OMAP4_MMC4_BASE;
 627                         break;
 628                 case 4:
 629                         if (!cpu_is_omap44xx())
 630                                 return;
 631                         base = OMAP4_MMC5_BASE;
 632                         break;
 633                 }
 634
 635                 if (cpu_is_omap44xx())
 636                         base += OMAP4_MMC_REG_OFFSET;
 637
 638                 dummy_pdev.id = i;
 639                 dev_set_name(&dummy_pdev.dev, "mmci-omap-hs.%d", i);
 640                 iclk = clk_get(dev, "ick");
 641                 if (iclk && clk_enable(iclk))
 642                         iclk = NULL;
 643
 644                 fclk = clk_get(dev, "fck");
 645                 if (fclk && clk_enable(fclk))
 646                         fclk = NULL;
 647
 648                 if (!iclk || !fclk) {
 649                         printk(KERN_WARNING
 650                                "%s: Unable to enable clocks for MMC%d, "
 651                                "cannot reset.\n",  __func__, i);
 652                         break;
 653                 }
 654
 655                 omap_writel(MMCHS_SYSCONFIG_SWRESET, base + MMCHS_SYSCONFIG);
 656                 v = omap_readl(base + MMCHS_SYSSTATUS);
 657                 while (!(omap_readl(base + MMCHS_SYSSTATUS) &
 658                          MMCHS_SYSSTATUS_RESETDONE))
 659                         cpu_relax();
 660
 661                 if (fclk) {
 662                         clk_disable(fclk);
 663                         clk_put(fclk);
 664                 }
 665                 if (iclk) {
 666                         clk_disable(iclk);
 667                         clk_put(iclk);
 668                 }
 669         }
 670 }
 671 #else
 672 static inline void omap_hsmmc_reset(void) {}
 673 #endif
 674
 675 #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
 676         defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
 677
 678 static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
 679                         int controller_nr)
 680 {
 681         if ((mmc_controller->slots[0].switch_pin > 0) && \
 682                 (mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES))
 683                 omap_mux_init_gpio(mmc_controller->slots[0].switch_pin,
 684                                         OMAP_PIN_INPUT_PULLUP);
 685         if ((mmc_controller->slots[0].gpio_wp > 0) && \
 686                 (mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES))
 687                 omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
 688                                         OMAP_PIN_INPUT_PULLUP);
 689
 690         if (cpu_is_omap2420() && controller_nr == 0) {
 691                 omap_mux_init_signal("sdmmc_cmd", 0);
 692                 omap_mux_init_signal("sdmmc_clki", 0);
 693                 omap_mux_init_signal("sdmmc_clko", 0);
 694                 omap_mux_init_signal("sdmmc_dat0", 0);
 695                 omap_mux_init_signal("sdmmc_dat_dir0", 0);
 696                 omap_mux_init_signal("sdmmc_cmd_dir", 0);
 697                 if (mmc_controller->slots[0].caps & MMC_CAP_4_BIT_DATA) {
 698                         omap_mux_init_signal("sdmmc_dat1", 0);
 699                         omap_mux_init_signal("sdmmc_dat2", 0);
 700                         omap_mux_init_signal("sdmmc_dat3", 0);
 701                         omap_mux_init_signal("sdmmc_dat_dir1", 0);
 702                         omap_mux_init_signal("sdmmc_dat_dir2", 0);
 703                         omap_mux_init_signal("sdmmc_dat_dir3", 0);
 704                 }
 705
 706                 /*
 707                  * Use internal loop-back in MMC/SDIO Module Input Clock
 708                  * selection
 709                  */
 710                 if (mmc_controller->slots[0].internal_clock) {
 711                         u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
 712                         v |= (1 << 24);
 713                         omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
 714                 }
 715         }
 716
 717         if (cpu_is_omap34xx()) {
 718                 if (controller_nr == 0) {
 719                         omap_mux_init_signal("sdmmc1_clk",
 720                                 OMAP_PIN_INPUT_PULLUP);
 721                         omap_mux_init_signal("sdmmc1_cmd",
 722                                 OMAP_PIN_INPUT_PULLUP);
 723                         omap_mux_init_signal("sdmmc1_dat0",
 724                                 OMAP_PIN_INPUT_PULLUP);
 725                         if (mmc_controller->slots[0].caps &
 726                                 (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA)) {
 727                                 omap_mux_init_signal("sdmmc1_dat1",
 728                                         OMAP_PIN_INPUT_PULLUP);
 729                                 omap_mux_init_signal("sdmmc1_dat2",
 730                                         OMAP_PIN_INPUT_PULLUP);
 731                                 omap_mux_init_signal("sdmmc1_dat3",
 732                                         OMAP_PIN_INPUT_PULLUP);
 733                         }
 734                         if (mmc_controller->slots[0].caps &
 735                                                 MMC_CAP_8_BIT_DATA) {
 736                                 omap_mux_init_signal("sdmmc1_dat4",
 737                                         OMAP_PIN_INPUT_PULLUP);
 738                                 omap_mux_init_signal("sdmmc1_dat5",
 739                                         OMAP_PIN_INPUT_PULLUP);
 740                                 omap_mux_init_signal("sdmmc1_dat6",
 741                                         OMAP_PIN_INPUT_PULLUP);
 742                                 omap_mux_init_signal("sdmmc1_dat7",
 743                                         OMAP_PIN_INPUT_PULLUP);
 744                         }
 745                 }
 746                 if (controller_nr == 1) {
 747                         /* MMC2 */
 748                         omap_mux_init_signal("sdmmc2_clk",
 749                                 OMAP_PIN_INPUT_PULLUP);
 750                         omap_mux_init_signal("sdmmc2_cmd",
 751                                 OMAP_PIN_INPUT_PULLUP);
 752                         omap_mux_init_signal("sdmmc2_dat0",
 753                                 OMAP_PIN_INPUT_PULLUP);
 754
 755                         /*
 756                          * For 8 wire configurations, Lines DAT4, 5, 6 and 7 need to be muxed
 757                          * in the board-*.c files
 758                          */
 759                         if (mmc_controller->slots[0].caps &
 760                                 (MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA)) {
 761                                 omap_mux_init_signal("sdmmc2_dat1",
 762                                         OMAP_PIN_INPUT_PULLUP);
 763                                 omap_mux_init_signal("sdmmc2_dat2",
 764                                         OMAP_PIN_INPUT_PULLUP);
 765                                 omap_mux_init_signal("sdmmc2_dat3",
 766                                         OMAP_PIN_INPUT_PULLUP);
 767                         }
 768                         if (mmc_controller->slots[0].caps &
 769                                                         MMC_CAP_8_BIT_DATA) {
 770                                 omap_mux_init_signal("sdmmc2_dat4.sdmmc2_dat4",
 771                                         OMAP_PIN_INPUT_PULLUP);
 772                                 omap_mux_init_signal("sdmmc2_dat5.sdmmc2_dat5",
 773                                         OMAP_PIN_INPUT_PULLUP);
 774                                 omap_mux_init_signal("sdmmc2_dat6.sdmmc2_dat6",
 775                                         OMAP_PIN_INPUT_PULLUP);
 776                                 omap_mux_init_signal("sdmmc2_dat7.sdmmc2_dat7",
 777                                         OMAP_PIN_INPUT_PULLUP);
 778                         }
 779                 }
 780
 781                 /*
 782                  * For MMC3 the pins need to be muxed in the board-*.c files
 783                  */
 784         }
 785 }
 786
 787 void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
 788                         int nr_controllers)
 789 {
 790         int i;
 791         char *name;
 792
 793         for (i = 0; i < nr_controllers; i++) {
 794                 unsigned long base, size;
 795                 unsigned int irq = 0;
 796
 797                 if (!mmc_data[i])
 798                         continue;
 799
 800                 omap2_mmc_mux(mmc_data[i], i);
 801
 802                 switch (i) {
 803                 case 0:
 804                         base = OMAP2_MMC1_BASE;
 805                         irq = INT_24XX_MMC_IRQ;
 806                         break;
 807                 case 1:
 808                         base = OMAP2_MMC2_BASE;
 809                         irq = INT_24XX_MMC2_IRQ;
 810                         break;
 811                 case 2:
 812                         if (!cpu_is_omap44xx() && !cpu_is_omap34xx())
 813                                 return;
 814                         base = OMAP3_MMC3_BASE;
 815                         irq = INT_34XX_MMC3_IRQ;
 816                         break;
 817                 case 3:
 818                         if (!cpu_is_omap44xx())
 819                                 return;
 820                         base = OMAP4_MMC4_BASE + OMAP4_MMC_REG_OFFSET;
 821                         irq = OMAP44XX_IRQ_MMC4;
 822                         break;
 823                 case 4:
 824                         if (!cpu_is_omap44xx())
 825                                 return;
 826                         base = OMAP4_MMC5_BASE + OMAP4_MMC_REG_OFFSET;
 827                         irq = OMAP44XX_IRQ_MMC5;
 828                         break;
 829                 default:
 830                         continue;
 831                 }
 832
 833                 if (cpu_is_omap2420()) {
 834                         size = OMAP2420_MMC_SIZE;
 835                         name = "mmci-omap";
 836                 } else if (cpu_is_omap44xx()) {
 837                         if (i < 3) {
 838                                 base += OMAP4_MMC_REG_OFFSET;
 839                                 irq += OMAP44XX_IRQ_GIC_START;
 840                         }
 841                         size = OMAP4_HSMMC_SIZE;
 842                         name = "mmci-omap-hs";
 843                 } else {
 844                         size = OMAP3_HSMMC_SIZE;
 845                         name = "mmci-omap-hs";
 846                 }
 847                 omap_mmc_add(name, i, base, size, irq, mmc_data[i]);
 848         };
 849 }
 850
 851 #endif
 852
 853 /*-------------------------------------------------------------------------*/
 854
 855 #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
 856 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430)
 857 #define OMAP_HDQ_BASE   0x480B2000
 858 #endif
 859 static struct resource omap_hdq_resources[] = {
 860         {
 861                 .start          = OMAP_HDQ_BASE,
 862                 .end            = OMAP_HDQ_BASE + 0x1C,
 863                 .flags          = IORESOURCE_MEM,
 864         },
 865         {
 866                 .start          = INT_24XX_HDQ_IRQ,
 867                 .flags          = IORESOURCE_IRQ,
 868         },
 869 };
 870 static struct platform_device omap_hdq_dev = {
 871         .name = "omap_hdq",
 872         .id = 0,
 873         .dev = {
 874                 .platform_data = NULL,
 875         },
 876         .num_resources  = ARRAY_SIZE(omap_hdq_resources),
 877         .resource       = omap_hdq_resources,
 878 };
 879 static inline void omap_hdq_init(void)
 880 {
 881         (void) platform_device_register(&omap_hdq_dev);
 882 }
 883 #else
 884 static inline void omap_hdq_init(void) {}
 885 #endif
 886
 887 /*---------------------------------------------------------------------------*/
 888
 889 #if defined(CONFIG_VIDEO_OMAP2_VOUT) || \
 890         defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE)
 891 #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
 892 static struct resource omap_vout_resource[3 - CONFIG_FB_OMAP2_NUM_FBS] = {
 893 };
 894 #else
 895 static struct resource omap_vout_resource[2] = {
 896 };
 897 #endif
 898
 899 static struct platform_device omap_vout_device = {
 900         .name           = "omap_vout",
 901         .num_resources  = ARRAY_SIZE(omap_vout_resource),
 902         .resource       = &omap_vout_resource[0],
 903         .id             = -1,
 904 };
 905 static void omap_init_vout(void)
 906 {
 907         if (platform_device_register(&omap_vout_device) < 0)
 908                 printk(KERN_ERR "Unable to register OMAP-VOUT device\n");
 909 }
 910 #else
 911 static inline void omap_init_vout(void) {}
 912 #endif
 913
 914 /*-------------------------------------------------------------------------*/
 915
 916 static int __init omap2_init_devices(void)
 917 {
 918         /* please keep these calls, and their implementations above,
 919          * in alphabetical order so they're easier to sort through.
 920          */
 921         omap_hsmmc_reset();
 922         omap_init_camera();
 923         omap_init_mbox();
 924         omap_init_mcspi();
 925         omap_init_pmu();
 926         omap_hdq_init();
 927         omap_init_sti();
 928         omap_init_sham();
 929         omap_init_aes();
 930         omap_init_vout();
 931
 932         return 0;
 933 }
 934 arch_initcall(omap2_init_devices);