arch/arm/mach-omap1/board-h3.c

   1 /*
   2  * linux/arch/arm/mach-omap1/board-h3.c
   3  *
   4  * This file contains OMAP1710 H3 specific code.
   5  *
   6  * Copyright (C) 2004 Texas Instruments, Inc.
   7  * Copyright (C) 2002 MontaVista Software, Inc.
   8  * Copyright (C) 2001 RidgeRun, Inc.
   9  * Author: RidgeRun, Inc.
  10  *         Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  */
  16
  17 #include <linux/types.h>
  18 #include <linux/init.h>
  19 #include <linux/major.h>
  20 #include <linux/kernel.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/errno.h>
  23 #include <linux/workqueue.h>
  24 #include <linux/i2c.h>
  25 #include <linux/mtd/mtd.h>
  26 #include <linux/mtd/nand.h>
  27 #include <linux/mtd/partitions.h>
  28 #include <linux/input.h>
  29 #include <linux/i2c/tps65010.h>
  30 #include <linux/clk.h>
  31 #include <linux/i2c.h>
  32 #include <linux/spi/spi.h>
  33 #include <linux/spi/tsc210x.h>
  34
  35 #include <asm/setup.h>
  36 #include <asm/page.h>
  37 #include <asm/hardware.h>
  38 #include <asm/gpio.h>
  39
  40 #include <asm/mach-types.h>
  41 #include <asm/mach/arch.h>
  42 #include <asm/mach/flash.h>
  43 #include <asm/mach/map.h>
  44
  45 #include <media/v4l2-int-device.h>
  46
  47 #include <asm/arch/gpio.h>
  48 #include <asm/arch/gpio-switch.h>
  49 #include <asm/arch/gpioexpander.h>
  50 #include <asm/arch/irqs.h>
  51 #include <asm/arch/mux.h>
  52 #include <asm/arch/tc.h>
  53 #include <asm/arch/nand.h>
  54 #include <asm/arch/irda.h>
  55 #include <asm/arch/usb.h>
  56 #include <asm/arch/keypad.h>
  57 #include <asm/arch/dma.h>
  58 #include <asm/arch/common.h>
  59 #include <asm/arch/mcbsp.h>
  60 #include <asm/arch/omap-alsa.h>
  61
  62 #include <../drivers/media/video/ov9640.h>
  63
  64 #define H3_TS_GPIO      48
  65
  66 static int h3_keymap[] = {
  67         KEY(0, 0, KEY_LEFT),
  68         KEY(0, 1, KEY_RIGHT),
  69         KEY(0, 2, KEY_3),
  70         KEY(0, 3, KEY_F10),
  71         KEY(0, 4, KEY_F5),
  72         KEY(0, 5, KEY_9),
  73         KEY(1, 0, KEY_DOWN),
  74         KEY(1, 1, KEY_UP),
  75         KEY(1, 2, KEY_2),
  76         KEY(1, 3, KEY_F9),
  77         KEY(1, 4, KEY_F7),
  78         KEY(1, 5, KEY_0),
  79         KEY(2, 0, KEY_ENTER),
  80         KEY(2, 1, KEY_6),
  81         KEY(2, 2, KEY_1),
  82         KEY(2, 3, KEY_F2),
  83         KEY(2, 4, KEY_F6),
  84         KEY(2, 5, KEY_HOME),
  85         KEY(3, 0, KEY_8),
  86         KEY(3, 1, KEY_5),
  87         KEY(3, 2, KEY_F12),
  88         KEY(3, 3, KEY_F3),
  89         KEY(3, 4, KEY_F8),
  90         KEY(3, 5, KEY_END),
  91         KEY(4, 0, KEY_7),
  92         KEY(4, 1, KEY_4),
  93         KEY(4, 2, KEY_F11),
  94         KEY(4, 3, KEY_F1),
  95         KEY(4, 4, KEY_F4),
  96         KEY(4, 5, KEY_ESC),
  97         KEY(5, 0, KEY_F13),
  98         KEY(5, 1, KEY_F14),
  99         KEY(5, 2, KEY_F15),
 100         KEY(5, 3, KEY_F16),
 101         KEY(5, 4, KEY_SLEEP),
 102         0
 103 };
 104
 105
 106 static struct mtd_partition nor_partitions[] = {
 107         /* bootloader (U-Boot, etc) in first sector */
 108         {
 109               .name             = "bootloader",
 110               .offset           = 0,
 111               .size             = SZ_128K,
 112               .mask_flags       = MTD_WRITEABLE, /* force read-only */
 113         },
 114         /* bootloader params in the next sector */
 115         {
 116               .name             = "params",
 117               .offset           = MTDPART_OFS_APPEND,
 118               .size             = SZ_128K,
 119               .mask_flags       = 0,
 120         },
 121         /* kernel */
 122         {
 123               .name             = "kernel",
 124               .offset           = MTDPART_OFS_APPEND,
 125               .size             = SZ_2M,
 126               .mask_flags       = 0
 127         },
 128         /* file system */
 129         {
 130               .name             = "filesystem",
 131               .offset           = MTDPART_OFS_APPEND,
 132               .size             = MTDPART_SIZ_FULL,
 133               .mask_flags       = 0
 134         }
 135 };
 136
 137 static struct flash_platform_data nor_data = {
 138         .map_name       = "cfi_probe",
 139         .width          = 2,
 140         .parts          = nor_partitions,
 141         .nr_parts       = ARRAY_SIZE(nor_partitions),
 142 };
 143
 144 static struct resource nor_resource = {
 145         /* This is on CS3, wherever it's mapped */
 146         .flags          = IORESOURCE_MEM,
 147 };
 148
 149 static struct platform_device nor_device = {
 150         .name           = "omapflash",
 151         .id             = 0,
 152         .dev            = {
 153                 .platform_data  = &nor_data,
 154         },
 155         .num_resources  = 1,
 156         .resource       = &nor_resource,
 157 };
 158
 159 static struct mtd_partition nand_partitions[] = {
 160 #if 0
 161         /* REVISIT: enable these partitions if you make NAND BOOT work */
 162         {
 163                 .name           = "xloader",
 164                 .offset         = 0,
 165                 .size           = 64 * 1024,
 166                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
 167         },
 168         {
 169                 .name           = "bootloader",
 170                 .offset         = MTDPART_OFS_APPEND,
 171                 .size           = 256 * 1024,
 172                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
 173         },
 174         {
 175                 .name           = "params",
 176                 .offset         = MTDPART_OFS_APPEND,
 177                 .size           = 192 * 1024,
 178         },
 179         {
 180                 .name           = "kernel",
 181                 .offset         = MTDPART_OFS_APPEND,
 182                 .size           = 2 * SZ_1M,
 183         },
 184 #endif
 185         {
 186                 .name           = "filesystem",
 187                 .size           = MTDPART_SIZ_FULL,
 188                 .offset         = MTDPART_OFS_APPEND,
 189         },
 190 };
 191
 192 /* dip switches control NAND chip access:  8 bit, 16 bit, or neither */
 193 static struct omap_nand_platform_data nand_data = {
 194         .options        = NAND_SAMSUNG_LP_OPTIONS,
 195         .parts          = nand_partitions,
 196         .nr_parts       = ARRAY_SIZE(nand_partitions),
 197 };
 198
 199 static struct resource nand_resource = {
 200         .flags          = IORESOURCE_MEM,
 201 };
 202
 203 static struct platform_device nand_device = {
 204         .name           = "omapnand",
 205         .id             = 0,
 206         .dev            = {
 207                 .platform_data  = &nand_data,
 208         },
 209         .num_resources  = 1,
 210         .resource       = &nand_resource,
 211 };
 212
 213 static struct resource smc91x_resources[] = {
 214         [0] = {
 215                 .start  = OMAP1710_ETHR_START,          /* Physical */
 216                 .end    = OMAP1710_ETHR_START + 0xf,
 217                 .flags  = IORESOURCE_MEM,
 218         },
 219         [1] = {
 220                 .start  = OMAP_GPIO_IRQ(40),
 221                 .end    = OMAP_GPIO_IRQ(40),
 222                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
 223         },
 224 };
 225
 226 static struct platform_device smc91x_device = {
 227         .name           = "smc91x",
 228         .id             = 0,
 229         .num_resources  = ARRAY_SIZE(smc91x_resources),
 230         .resource       = smc91x_resources,
 231 };
 232
 233 #define GPTIMER_BASE            0xFFFB1400
 234 #define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800))
 235 #define GPTIMER_REGS_SIZE       0x46
 236
 237 static struct resource intlat_resources[] = {
 238         [0] = {
 239                 .start  = GPTIMER_REGS(0),            /* Physical */
 240                 .end    = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
 241                 .flags  = IORESOURCE_MEM,
 242         },
 243         [1] = {
 244                 .start  = INT_1610_GPTIMER1,
 245                 .end    = INT_1610_GPTIMER1,
 246                 .flags  = IORESOURCE_IRQ,
 247         },
 248 };
 249
 250 static struct platform_device intlat_device = {
 251         .name      = "omap_intlat",
 252         .id          = 0,
 253         .num_resources  = ARRAY_SIZE(intlat_resources),
 254         .resource       = intlat_resources,
 255 };
 256
 257 static struct resource h3_kp_resources[] = {
 258         [0] = {
 259                 .start  = INT_KEYBOARD,
 260                 .end    = INT_KEYBOARD,
 261                 .flags  = IORESOURCE_IRQ,
 262         },
 263 };
 264
 265 static struct omap_kp_platform_data h3_kp_data = {
 266         .rows           = 8,
 267         .cols           = 8,
 268         .keymap         = h3_keymap,
 269         .keymapsize     = ARRAY_SIZE(h3_keymap),
 270         .rep            = 1,
 271         .delay          = 9,
 272         .dbounce        = 1,
 273 };
 274
 275 static struct platform_device h3_kp_device = {
 276         .name           = "omap-keypad",
 277         .id             = -1,
 278         .dev            = {
 279                 .platform_data = &h3_kp_data,
 280         },
 281         .num_resources  = ARRAY_SIZE(h3_kp_resources),
 282         .resource       = h3_kp_resources,
 283 };
 284
 285
 286 /* Select between the IrDA and aGPS module
 287  */
 288 static int h3_select_irda(struct device *dev, int state)
 289 {
 290         unsigned char expa;
 291         int err = 0;
 292
 293         if ((err = read_gpio_expa(&expa, 0x26))) {
 294                 printk(KERN_ERR "Error reading from I/O EXPANDER \n");
 295                 return err;
 296         }
 297
 298         /* 'P6' enable/disable IRDA_TX and IRDA_RX */
 299         if (state & IR_SEL) { /* IrDA */
 300                 if ((err = write_gpio_expa(expa | 0x40, 0x26))) {
 301                         printk(KERN_ERR "Error writing to I/O EXPANDER \n");
 302                         return err;
 303                 }
 304         } else {
 305                 if ((err = write_gpio_expa(expa & ~0x40, 0x26))) {
 306                         printk(KERN_ERR "Error writing to I/O EXPANDER \n");
 307                         return err;
 308                 }
 309         }
 310         return err;
 311 }
 312
 313 static void set_trans_mode(struct work_struct *work)
 314 {
 315         struct omap_irda_config *irda_config =
 316                 container_of(work, struct omap_irda_config, gpio_expa.work);
 317         int mode = irda_config->mode;
 318         unsigned char expa;
 319         int err = 0;
 320
 321         if ((err = read_gpio_expa(&expa, 0x27)) != 0) {
 322                 printk(KERN_ERR "Error reading from I/O expander\n");
 323         }
 324
 325         expa &= ~0x03;
 326
 327         if (mode & IR_SIRMODE) {
 328                 expa |= 0x01;
 329         } else { /* MIR/FIR */
 330                 expa |= 0x03;
 331         }
 332
 333         if ((err = write_gpio_expa(expa, 0x27)) != 0) {
 334                 printk(KERN_ERR "Error writing to I/O expander\n");
 335         }
 336 }
 337
 338 static int h3_transceiver_mode(struct device *dev, int mode)
 339 {
 340         struct omap_irda_config *irda_config = dev->platform_data;
 341
 342         irda_config->mode = mode;
 343         cancel_delayed_work(&irda_config->gpio_expa);
 344         PREPARE_DELAYED_WORK(&irda_config->gpio_expa, set_trans_mode);
 345         schedule_delayed_work(&irda_config->gpio_expa, 0);
 346
 347         return 0;
 348 }
 349
 350 static struct omap_irda_config h3_irda_data = {
 351         .transceiver_cap        = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
 352         .transceiver_mode       = h3_transceiver_mode,
 353         .select_irda            = h3_select_irda,
 354         .rx_channel             = OMAP_DMA_UART3_RX,
 355         .tx_channel             = OMAP_DMA_UART3_TX,
 356         .dest_start             = UART3_THR,
 357         .src_start              = UART3_RHR,
 358         .tx_trigger             = 0,
 359         .rx_trigger             = 0,
 360 };
 361
 362 static struct resource h3_irda_resources[] = {
 363         [0] = {
 364                 .start  = INT_UART3,
 365                 .end    = INT_UART3,
 366                 .flags  = IORESOURCE_IRQ,
 367         },
 368 };
 369
 370 static u64 irda_dmamask = 0xffffffff;
 371
 372 static struct platform_device h3_irda_device = {
 373         .name           = "omapirda",
 374         .id             = 0,
 375         .dev            = {
 376                 .platform_data  = &h3_irda_data,
 377                 .dma_mask       = &irda_dmamask,
 378         },
 379         .num_resources  = ARRAY_SIZE(h3_irda_resources),
 380         .resource       = h3_irda_resources,
 381 };
 382
 383 static struct platform_device h3_lcd_device = {
 384         .name           = "lcd_h3",
 385         .id             = -1,
 386 };
 387
 388 static struct tsc210x_config tsc_platform_data = {
 389         .use_internal           = 1,
 390         .monitor                = TSC_VBAT | TSC_TEMP,
 391         .mclk                   = "mclk",
 392 };
 393
 394 static struct spi_board_info h3_spi_board_info[] __initdata = {
 395         [0] = {
 396                 .modalias       = "tsc2101",
 397                 .bus_num        = 2,
 398                 .chip_select    = 0,
 399                 .irq            = OMAP_GPIO_IRQ(H3_TS_GPIO),
 400                 .max_speed_hz   = 16000000,
 401                 .platform_data  = &tsc_platform_data,
 402         },
 403 };
 404
 405 static struct omap_mcbsp_reg_cfg mcbsp_regs = {
 406         .spcr2 = FREE | FRST | GRST | XRST | XINTM(3),
 407         .spcr1 = RINTM(3) | RRST,
 408         .rcr2  = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) |
 409                 RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(1),
 410         .rcr1  = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16),
 411         .xcr2  = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) |
 412                 XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(1) | XFIG,
 413         .xcr1  = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16),
 414         .srgr1 = FWID(15),
 415         .srgr2 = GSYNC | CLKSP | FSGM | FPER(31),
 416
 417         .pcr0  = CLKRM | SCLKME | FSXP | FSRP | CLKXP | CLKRP,
 418         /*.pcr0 = CLKXP | CLKRP,*/        /* mcbsp: slave */
 419 };
 420
 421 static struct omap_alsa_codec_config alsa_config = {
 422         .name                   = "H3 TSC2101",
 423         .mcbsp_regs_alsa        = &mcbsp_regs,
 424         .codec_configure_dev    = NULL, /* tsc2101_configure, */
 425         .codec_set_samplerate   = NULL, /* tsc2101_set_samplerate, */
 426         .codec_clock_setup      = NULL, /* tsc2101_clock_setup, */
 427         .codec_clock_on         = NULL, /* tsc2101_clock_on, */
 428         .codec_clock_off        = NULL, /* tsc2101_clock_off, */
 429         .get_default_samplerate = NULL, /* tsc2101_get_default_samplerate, */
 430 };
 431
 432 static struct platform_device h3_mcbsp1_device = {
 433         .name   = "omap_alsa_mcbsp",
 434         .id     = 1,
 435         .dev = {
 436                 .platform_data  = &alsa_config,
 437         },
 438 };
 439
 440 static struct platform_device *devices[] __initdata = {
 441         &nor_device,
 442         &nand_device,
 443         &smc91x_device,
 444         &intlat_device,
 445         &h3_irda_device,
 446         &h3_kp_device,
 447         &h3_lcd_device,
 448         &h3_mcbsp1_device,
 449 };
 450
 451 static struct omap_usb_config h3_usb_config __initdata = {
 452         /* usb1 has a Mini-AB port and external isp1301 transceiver */
 453         .otg        = 2,
 454
 455 #ifdef CONFIG_USB_GADGET_OMAP
 456         .hmc_mode       = 19,   /* 0:host(off) 1:dev|otg 2:disabled */
 457 #elif  defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 458         /* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
 459         .hmc_mode       = 20,   /* 1:dev|otg(off) 1:host 2:disabled */
 460 #endif
 461
 462         .pins[1]        = 3,
 463 };
 464
 465 static struct omap_mmc_config h3_mmc_config __initdata = {
 466         .mmc[0] = {
 467                 .enabled        = 1,
 468                 .wire4          = 1,
 469        },
 470 };
 471
 472 extern struct omap_mmc_platform_data h3_mmc_data;
 473
 474 static struct omap_uart_config h3_uart_config __initdata = {
 475         .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
 476 };
 477
 478 static struct omap_lcd_config h3_lcd_config __initdata = {
 479         .ctrl_name      = "internal",
 480 };
 481
 482 static struct omap_board_config_kernel h3_config[] __initdata = {
 483         { OMAP_TAG_USB,         &h3_usb_config },
 484         { OMAP_TAG_MMC,         &h3_mmc_config },
 485         { OMAP_TAG_UART,        &h3_uart_config },
 486         { OMAP_TAG_LCD,         &h3_lcd_config },
 487 };
 488
 489 static struct omap_gpio_switch h3_gpio_switches[] __initdata = {
 490         {
 491                 .name                   = "mmc_slot",
 492                 .gpio                   = OMAP_MPUIO(1),
 493                 .type                   = OMAP_GPIO_SWITCH_TYPE_COVER,
 494                 .debounce_rising        = 100,
 495                 .debounce_falling       = 0,
 496                 .notify                 = h3_mmc_slot_cover_handler,
 497                 .notify_data            = NULL,
 498         },
 499 };
 500
 501 #define H3_NAND_RB_GPIO_PIN     10
 502
 503 static int nand_dev_ready(struct omap_nand_platform_data *data)
 504 {
 505         return omap_get_gpio_datain(H3_NAND_RB_GPIO_PIN);
 506 }
 507
 508 #if defined(CONFIG_VIDEO_OV9640) || defined(CONFIG_VIDEO_OV9640_MODULE)
 509 /*
 510  * Common OV9640 register initialization for all image sizes, pixel formats,
 511  * and frame rates
 512  */
 513 const static struct ov9640_reg ov9640_common[] = {
 514
 515         { 0x12, 0x80 }, { 0x11, 0x80 }, { 0x13, 0x88 }, /* COM7, CLKRC, COM8 */
 516         { 0x01, 0x58 }, { 0x02, 0x24 }, { 0x04, 0x00 }, /* BLUE, RED, COM1 */
 517         { 0x0E, 0x81 }, { 0x0F, 0x4F }, { 0x14, 0xcA }, /* COM5, COM6, COM9 */
 518         { 0x16, 0x02 }, { 0x1B, 0x01 }, { 0x24, 0x70 }, /* ?, PSHFT, AEW */
 519         { 0x25, 0x68 }, { 0x26, 0xD3 }, { 0x27, 0x90 }, /* AEB, VPT, BBIAS */
 520         { 0x2A, 0x00 }, { 0x2B, 0x00 }, { 0x32, 0x24 }, /* EXHCH, EXHCL, HREF */
 521         { 0x33, 0x02 }, { 0x37, 0x02 }, { 0x38, 0x13 }, /* CHLF, ADC, ACOM */
 522         { 0x39, 0xF0 }, { 0x3A, 0x00 }, { 0x3B, 0x01 }, /* OFON, TSLB, COM11 */
 523         { 0x3D, 0x90 }, { 0x3E, 0x02 }, { 0x3F, 0xF2 }, /* COM13, COM14, EDGE */
 524         { 0x41, 0x02 }, { 0x42, 0xC8 },         /* COM16, COM17 */
 525         { 0x43, 0xF0 }, { 0x44, 0x10 }, { 0x45, 0x6C }, /* ?, ?, ? */
 526         { 0x46, 0x6C }, { 0x47, 0x44 }, { 0x48, 0x44 }, /* ?, ?, ? */
 527         { 0x49, 0x03 }, { 0x59, 0x49 }, { 0x5A, 0x94 }, /* ?, ?, ? */
 528         { 0x5B, 0x46 }, { 0x5C, 0x84 }, { 0x5D, 0x5C }, /* ?, ?, ? */
 529         { 0x5E, 0x08 }, { 0x5F, 0x00 }, { 0x60, 0x14 }, /* ?, ?, ? */
 530         { 0x61, 0xCE },                                 /* ? */
 531         { 0x62, 0x70 }, { 0x63, 0x00 }, { 0x64, 0x04 }, /* LCC1, LCC2, LCC3 */
 532         { 0x65, 0x00 }, { 0x66, 0x00 },                 /* LCC4, LCC5 */
 533         { 0x69, 0x00 }, { 0x6A, 0x3E }, { 0x6B, 0x3F }, /* HV, MBD, DBLV */
 534         { 0x6C, 0x40 }, { 0x6D, 0x30 }, { 0x6E, 0x4B }, /* GSP1, GSP2, GSP3 */
 535         { 0x6F, 0x60 }, { 0x70, 0x70 }, { 0x71, 0x70 }, /* GSP4, GSP5, GSP6 */
 536         { 0x72, 0x70 }, { 0x73, 0x70 }, { 0x74, 0x60 }, /* GSP7, GSP8, GSP9 */
 537         { 0x75, 0x60 }, { 0x76, 0x50 }, { 0x77, 0x48 }, /* GSP10,GSP11,GSP12 */
 538         { 0x78, 0x3A }, { 0x79, 0x2E }, { 0x7A, 0x28 }, /* GSP13,GSP14,GSP15 */
 539         { 0x7B, 0x22 }, { 0x7C, 0x04 }, { 0x7D, 0x07 }, /* GSP16,GST1, GST2 */
 540         { 0x7E, 0x10 }, { 0x7F, 0x28 }, { 0x80, 0x36 }, /* GST3, GST4, GST5 */
 541         { 0x81, 0x44 }, { 0x82, 0x52 }, { 0x83, 0x60 }, /* GST6, GST7, GST8 */
 542         { 0x84, 0x6C }, { 0x85, 0x78 }, { 0x86, 0x8C }, /* GST9, GST10,GST11 */
 543         { 0x87, 0x9E }, { 0x88, 0xBB }, { 0x89, 0xD2 }, /* GST12,GST13,GST14 */
 544         { 0x8A, 0xE6 }, { 0x13, 0xaF }, { 0x15, 0x02 }, /* GST15, COM8 */
 545         { 0x22, 0x8a }, /* GROS */
 546         { OV9640_REG_TERM, OV9640_VAL_TERM }
 547 };
 548
 549 static int ov9640_sensor_power_set(int power)
 550 {
 551         unsigned char expa;
 552         int err;
 553
 554         /* read current state of GPIO EXPA outputs */
 555         err = read_gpio_expa(&expa, 0x27);
 556         if (err) {
 557                 printk(KERN_ERR "Error reading GPIO EXPA\n");
 558                 return err;
 559         }
 560         /* Clear GPIO EXPA P3 (CAMERA_MODULE_EN) to power-up/down sensor */
 561         if (power)
 562                 expa |= 0x08;
 563         else
 564                 expa &= ~0x08;
 565
 566         err = write_gpio_expa(expa, 0x27);
 567         if (err) {
 568                 printk(KERN_ERR "Error writing to GPIO EXPA\n");
 569                 return err;
 570         }
 571
 572         return err;
 573 }
 574
 575 static struct v4l2_ifparm ifparm = {
 576         .if_type = V4L2_IF_TYPE_BT656,
 577         .u = {
 578                 .bt656 = {
 579                          .frame_start_on_rising_vs = 1,
 580                          .nobt_vs_inv = 1,
 581                          .mode = V4L2_IF_TYPE_BT656_MODE_NOBT_8BIT,
 582                          .clock_min = OV9640_XCLK_MIN,
 583                          .clock_max = OV9640_XCLK_MAX,
 584                  },
 585         },
 586 };
 587
 588 static int ov9640_ifparm(struct v4l2_ifparm *p)
 589 {
 590         *p = ifparm;
 591
 592         return 0;
 593 }
 594
 595 static struct ov9640_platform_data h3_ov9640_platform_data = {
 596         .power_set      = ov9640_sensor_power_set,
 597         .default_regs   = ov9640_common,
 598         .ifparm         = ov9640_ifparm,
 599 };
 600 #endif
 601
 602 static struct i2c_board_info __initdata h3_i2c_board_info[] = {
 603        {
 604                 I2C_BOARD_INFO("tps65013", 0x48),
 605                /* .irq         = OMAP_GPIO_IRQ(??), */
 606        },
 607 #if defined(CONFIG_VIDEO_OV9640) || defined(CONFIG_VIDEO_OV9640_MODULE)
 608         {
 609                 I2C_BOARD_INFO("ov9640", 0x30),
 610                 .platform_data = &h3_ov9640_platform_data,
 611         },
 612 #endif
 613         {
 614                 I2C_BOARD_INFO("isp1301_omap", 0x2d),
 615                 .irq            = OMAP_GPIO_IRQ(14),
 616         },
 617 };
 618
 619 static void __init h3_init(void)
 620 {
 621         /* Here we assume the NOR boot config:  NOR on CS3 (possibly swapped
 622          * to address 0 by a dip switch), NAND on CS2B.  The NAND driver will
 623          * notice whether a NAND chip is enabled at probe time.
 624          *
 625          * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
 626          * (which on H2 may be 16bit) on CS3.  Try detecting that in code here,
 627          * to avoid probing every possible flash configuration...
 628          */
 629         nor_resource.end = nor_resource.start = omap_cs3_phys();
 630         nor_resource.end += SZ_32M - 1;
 631
 632         nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
 633         nand_resource.end += SZ_4K - 1;
 634         if (!(omap_request_gpio(H3_NAND_RB_GPIO_PIN)))
 635                 nand_data.dev_ready = nand_dev_ready;
 636
 637         /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
 638         /* GPIO10 pullup/down register, Enable pullup on GPIO10 */
 639         omap_cfg_reg(V2_1710_GPIO10);
 640
 641         /* TSC2101 */
 642         omap_cfg_reg(W19_1610_GPIO48);
 643         gpio_request(H3_TS_GPIO, "tsc_irq");
 644         gpio_direction_input(H3_TS_GPIO);
 645         omap_cfg_reg(N14_1610_UWIRE_CS0);
 646
 647         platform_add_devices(devices, ARRAY_SIZE(devices));
 648         spi_register_board_info(h3_spi_board_info,
 649                                 ARRAY_SIZE(h3_spi_board_info));
 650         omap_board_config = h3_config;
 651         omap_board_config_size = ARRAY_SIZE(h3_config);
 652         omap_serial_init();
 653         omap_register_i2c_bus(1, 100, h3_i2c_board_info,
 654                               ARRAY_SIZE(h3_i2c_board_info));
 655         h3_mmc_init();
 656         omap_register_gpio_switches(h3_gpio_switches,
 657                                     ARRAY_SIZE(h3_gpio_switches));
 658 }
 659
 660 static void __init h3_init_smc91x(void)
 661 {
 662         omap_cfg_reg(W15_1710_GPIO40);
 663         if (omap_request_gpio(40) < 0) {
 664                 printk("Error requesting gpio 40 for smc91x irq\n");
 665                 return;
 666         }
 667 }
 668
 669 static void __init h3_init_irq(void)
 670 {
 671         omap1_init_common_hw();
 672         omap_init_irq();
 673         omap_gpio_init();
 674         h3_init_smc91x();
 675 }
 676
 677 static void __init h3_map_io(void)
 678 {
 679         omap1_map_common_io();
 680 }
 681
 682 MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
 683         /* Maintainer: Texas Instruments, Inc. */
 684         .phys_io        = 0xfff00000,
 685         .io_pg_offst    = ((0xfef00000) >> 18) & 0xfffc,
 686         .boot_params    = 0x10000100,
 687         .map_io         = h3_map_io,
 688         .init_irq       = h3_init_irq,
 689         .init_machine   = h3_init,
 690         .timer          = &omap_timer,
 691 MACHINE_END