arch/arm/mach-omap1/board-h3.c

   1 /*
   2  * linux/arch/arm/mach-omap1/board-h3.c
   3  *
   4  * This file contains OMAP1710 H3 specific code.
   5  *
   6  * Copyright (C) 2004 Texas Instruments, Inc.
   7  * Copyright (C) 2002 MontaVista Software, Inc.
   8  * Copyright (C) 2001 RidgeRun, Inc.
   9  * Author: RidgeRun, Inc.
  10  *         Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  */
  16
  17 #include <linux/types.h>
  18 #include <linux/init.h>
  19 #include <linux/major.h>
  20 #include <linux/kernel.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/errno.h>
  23 #include <linux/workqueue.h>
  24 #include <linux/i2c.h>
  25 #include <linux/mtd/mtd.h>
  26 #include <linux/mtd/nand.h>
  27 #include <linux/mtd/partitions.h>
  28 #include <linux/input.h>
  29 #include <linux/i2c/tps65010.h>
  30 #include <linux/clk.h>
  31 #include <linux/spi/spi.h>
  32 #include <linux/spi/tsc210x.h>
  33
  34 #include <asm/setup.h>
  35 #include <asm/page.h>
  36 #include <mach/hardware.h>
  37 #include <asm/gpio.h>
  38
  39 #include <asm/mach-types.h>
  40 #include <asm/mach/arch.h>
  41 #include <asm/mach/flash.h>
  42 #include <asm/mach/map.h>
  43
  44 #include <media/v4l2-int-device.h>
  45
  46 #include <mach/gpio.h>
  47 #include <mach/gpio-switch.h>
  48 #include <mach/gpioexpander.h>
  49 #include <mach/irqs.h>
  50 #include <mach/mux.h>
  51 #include <mach/tc.h>
  52 #include <mach/nand.h>
  53 #include <mach/irda.h>
  54 #include <mach/usb.h>
  55 #include <mach/keypad.h>
  56 #include <mach/dma.h>
  57 #include <mach/common.h>
  58 #include <mach/mcbsp.h>
  59 #include <mach/omap-alsa.h>
  60
  61 #include <../drivers/media/video/ov9640.h>
  62
  63 #define H3_TS_GPIO      48
  64
  65 static int h3_keymap[] = {
  66         KEY(0, 0, KEY_LEFT),
  67         KEY(0, 1, KEY_RIGHT),
  68         KEY(0, 2, KEY_3),
  69         KEY(0, 3, KEY_F10),
  70         KEY(0, 4, KEY_F5),
  71         KEY(0, 5, KEY_9),
  72         KEY(1, 0, KEY_DOWN),
  73         KEY(1, 1, KEY_UP),
  74         KEY(1, 2, KEY_2),
  75         KEY(1, 3, KEY_F9),
  76         KEY(1, 4, KEY_F7),
  77         KEY(1, 5, KEY_0),
  78         KEY(2, 0, KEY_ENTER),
  79         KEY(2, 1, KEY_6),
  80         KEY(2, 2, KEY_1),
  81         KEY(2, 3, KEY_F2),
  82         KEY(2, 4, KEY_F6),
  83         KEY(2, 5, KEY_HOME),
  84         KEY(3, 0, KEY_8),
  85         KEY(3, 1, KEY_5),
  86         KEY(3, 2, KEY_F12),
  87         KEY(3, 3, KEY_F3),
  88         KEY(3, 4, KEY_F8),
  89         KEY(3, 5, KEY_END),
  90         KEY(4, 0, KEY_7),
  91         KEY(4, 1, KEY_4),
  92         KEY(4, 2, KEY_F11),
  93         KEY(4, 3, KEY_F1),
  94         KEY(4, 4, KEY_F4),
  95         KEY(4, 5, KEY_ESC),
  96         KEY(5, 0, KEY_F13),
  97         KEY(5, 1, KEY_F14),
  98         KEY(5, 2, KEY_F15),
  99         KEY(5, 3, KEY_F16),
 100         KEY(5, 4, KEY_SLEEP),
 101         0
 102 };
 103
 104
 105 static struct mtd_partition nor_partitions[] = {
 106         /* bootloader (U-Boot, etc) in first sector */
 107         {
 108               .name             = "bootloader",
 109               .offset           = 0,
 110               .size             = SZ_128K,
 111               .mask_flags       = MTD_WRITEABLE, /* force read-only */
 112         },
 113         /* bootloader params in the next sector */
 114         {
 115               .name             = "params",
 116               .offset           = MTDPART_OFS_APPEND,
 117               .size             = SZ_128K,
 118               .mask_flags       = 0,
 119         },
 120         /* kernel */
 121         {
 122               .name             = "kernel",
 123               .offset           = MTDPART_OFS_APPEND,
 124               .size             = SZ_2M,
 125               .mask_flags       = 0
 126         },
 127         /* file system */
 128         {
 129               .name             = "filesystem",
 130               .offset           = MTDPART_OFS_APPEND,
 131               .size             = MTDPART_SIZ_FULL,
 132               .mask_flags       = 0
 133         }
 134 };
 135
 136 static struct flash_platform_data nor_data = {
 137         .map_name       = "cfi_probe",
 138         .width          = 2,
 139         .parts          = nor_partitions,
 140         .nr_parts       = ARRAY_SIZE(nor_partitions),
 141 };
 142
 143 static struct resource nor_resource = {
 144         /* This is on CS3, wherever it's mapped */
 145         .flags          = IORESOURCE_MEM,
 146 };
 147
 148 static struct platform_device nor_device = {
 149         .name           = "omapflash",
 150         .id             = 0,
 151         .dev            = {
 152                 .platform_data  = &nor_data,
 153         },
 154         .num_resources  = 1,
 155         .resource       = &nor_resource,
 156 };
 157
 158 static struct mtd_partition nand_partitions[] = {
 159 #if 0
 160         /* REVISIT: enable these partitions if you make NAND BOOT work */
 161         {
 162                 .name           = "xloader",
 163                 .offset         = 0,
 164                 .size           = 64 * 1024,
 165                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
 166         },
 167         {
 168                 .name           = "bootloader",
 169                 .offset         = MTDPART_OFS_APPEND,
 170                 .size           = 256 * 1024,
 171                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
 172         },
 173         {
 174                 .name           = "params",
 175                 .offset         = MTDPART_OFS_APPEND,
 176                 .size           = 192 * 1024,
 177         },
 178         {
 179                 .name           = "kernel",
 180                 .offset         = MTDPART_OFS_APPEND,
 181                 .size           = 2 * SZ_1M,
 182         },
 183 #endif
 184         {
 185                 .name           = "filesystem",
 186                 .size           = MTDPART_SIZ_FULL,
 187                 .offset         = MTDPART_OFS_APPEND,
 188         },
 189 };
 190
 191 /* dip switches control NAND chip access:  8 bit, 16 bit, or neither */
 192 static struct omap_nand_platform_data nand_data = {
 193         .options        = NAND_SAMSUNG_LP_OPTIONS,
 194         .parts          = nand_partitions,
 195         .nr_parts       = ARRAY_SIZE(nand_partitions),
 196 };
 197
 198 static struct resource nand_resource = {
 199         .flags          = IORESOURCE_MEM,
 200 };
 201
 202 static struct platform_device nand_device = {
 203         .name           = "omapnand",
 204         .id             = 0,
 205         .dev            = {
 206                 .platform_data  = &nand_data,
 207         },
 208         .num_resources  = 1,
 209         .resource       = &nand_resource,
 210 };
 211
 212 static struct resource smc91x_resources[] = {
 213         [0] = {
 214                 .start  = OMAP1710_ETHR_START,          /* Physical */
 215                 .end    = OMAP1710_ETHR_START + 0xf,
 216                 .flags  = IORESOURCE_MEM,
 217         },
 218         [1] = {
 219                 .start  = OMAP_GPIO_IRQ(40),
 220                 .end    = OMAP_GPIO_IRQ(40),
 221                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
 222         },
 223 };
 224
 225 static struct platform_device smc91x_device = {
 226         .name           = "smc91x",
 227         .id             = 0,
 228         .num_resources  = ARRAY_SIZE(smc91x_resources),
 229         .resource       = smc91x_resources,
 230 };
 231
 232 #define GPTIMER_BASE            0xFFFB1400
 233 #define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800))
 234 #define GPTIMER_REGS_SIZE       0x46
 235
 236 static struct resource intlat_resources[] = {
 237         [0] = {
 238                 .start  = GPTIMER_REGS(0),            /* Physical */
 239                 .end    = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
 240                 .flags  = IORESOURCE_MEM,
 241         },
 242         [1] = {
 243                 .start  = INT_1610_GPTIMER1,
 244                 .end    = INT_1610_GPTIMER1,
 245                 .flags  = IORESOURCE_IRQ,
 246         },
 247 };
 248
 249 static struct platform_device intlat_device = {
 250         .name      = "omap_intlat",
 251         .id          = 0,
 252         .num_resources  = ARRAY_SIZE(intlat_resources),
 253         .resource       = intlat_resources,
 254 };
 255
 256 static struct resource h3_kp_resources[] = {
 257         [0] = {
 258                 .start  = INT_KEYBOARD,
 259                 .end    = INT_KEYBOARD,
 260                 .flags  = IORESOURCE_IRQ,
 261         },
 262 };
 263
 264 static struct omap_kp_platform_data h3_kp_data = {
 265         .rows           = 8,
 266         .cols           = 8,
 267         .keymap         = h3_keymap,
 268         .keymapsize     = ARRAY_SIZE(h3_keymap),
 269         .rep            = 1,
 270         .delay          = 9,
 271         .dbounce        = 1,
 272 };
 273
 274 static struct platform_device h3_kp_device = {
 275         .name           = "omap-keypad",
 276         .id             = -1,
 277         .dev            = {
 278                 .platform_data = &h3_kp_data,
 279         },
 280         .num_resources  = ARRAY_SIZE(h3_kp_resources),
 281         .resource       = h3_kp_resources,
 282 };
 283
 284
 285 /* Select between the IrDA and aGPS module
 286  */
 287 static int h3_select_irda(struct device *dev, int state)
 288 {
 289         unsigned char expa;
 290         int err = 0;
 291
 292         if ((err = read_gpio_expa(&expa, 0x26))) {
 293                 printk(KERN_ERR "Error reading from I/O EXPANDER \n");
 294                 return err;
 295         }
 296
 297         /* 'P6' enable/disable IRDA_TX and IRDA_RX */
 298         if (state & IR_SEL) { /* IrDA */
 299                 if ((err = write_gpio_expa(expa | 0x40, 0x26))) {
 300                         printk(KERN_ERR "Error writing to I/O EXPANDER \n");
 301                         return err;
 302                 }
 303         } else {
 304                 if ((err = write_gpio_expa(expa & ~0x40, 0x26))) {
 305                         printk(KERN_ERR "Error writing to I/O EXPANDER \n");
 306                         return err;
 307                 }
 308         }
 309         return err;
 310 }
 311
 312 static void set_trans_mode(struct work_struct *work)
 313 {
 314         struct omap_irda_config *irda_config =
 315                 container_of(work, struct omap_irda_config, gpio_expa.work);
 316         int mode = irda_config->mode;
 317         unsigned char expa;
 318         int err = 0;
 319
 320         if ((err = read_gpio_expa(&expa, 0x27)) != 0) {
 321                 printk(KERN_ERR "Error reading from I/O expander\n");
 322         }
 323
 324         expa &= ~0x03;
 325
 326         if (mode & IR_SIRMODE) {
 327                 expa |= 0x01;
 328         } else { /* MIR/FIR */
 329                 expa |= 0x03;
 330         }
 331
 332         if ((err = write_gpio_expa(expa, 0x27)) != 0) {
 333                 printk(KERN_ERR "Error writing to I/O expander\n");
 334         }
 335 }
 336
 337 static int h3_transceiver_mode(struct device *dev, int mode)
 338 {
 339         struct omap_irda_config *irda_config = dev->platform_data;
 340
 341         irda_config->mode = mode;
 342         cancel_delayed_work(&irda_config->gpio_expa);
 343         PREPARE_DELAYED_WORK(&irda_config->gpio_expa, set_trans_mode);
 344         schedule_delayed_work(&irda_config->gpio_expa, 0);
 345
 346         return 0;
 347 }
 348
 349 static struct omap_irda_config h3_irda_data = {
 350         .transceiver_cap        = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
 351         .transceiver_mode       = h3_transceiver_mode,
 352         .select_irda            = h3_select_irda,
 353         .rx_channel             = OMAP_DMA_UART3_RX,
 354         .tx_channel             = OMAP_DMA_UART3_TX,
 355         .dest_start             = UART3_THR,
 356         .src_start              = UART3_RHR,
 357         .tx_trigger             = 0,
 358         .rx_trigger             = 0,
 359 };
 360
 361 static struct resource h3_irda_resources[] = {
 362         [0] = {
 363                 .start  = INT_UART3,
 364                 .end    = INT_UART3,
 365                 .flags  = IORESOURCE_IRQ,
 366         },
 367 };
 368
 369 static u64 irda_dmamask = 0xffffffff;
 370
 371 static struct platform_device h3_irda_device = {
 372         .name           = "omapirda",
 373         .id             = 0,
 374         .dev            = {
 375                 .platform_data  = &h3_irda_data,
 376                 .dma_mask       = &irda_dmamask,
 377         },
 378         .num_resources  = ARRAY_SIZE(h3_irda_resources),
 379         .resource       = h3_irda_resources,
 380 };
 381
 382 static struct platform_device h3_lcd_device = {
 383         .name           = "lcd_h3",
 384         .id             = -1,
 385 };
 386
 387 static struct tsc210x_config tsc_platform_data = {
 388         .use_internal           = 1,
 389         .monitor                = TSC_VBAT | TSC_TEMP,
 390         .mclk                   = "mclk",
 391 };
 392
 393 static struct spi_board_info h3_spi_board_info[] __initdata = {
 394         [0] = {
 395                 .modalias       = "tsc2101",
 396                 .bus_num        = 2,
 397                 .chip_select    = 0,
 398                 .irq            = OMAP_GPIO_IRQ(H3_TS_GPIO),
 399                 .max_speed_hz   = 16000000,
 400                 .platform_data  = &tsc_platform_data,
 401         },
 402 };
 403
 404 static struct omap_mcbsp_reg_cfg mcbsp_regs = {
 405         .spcr2 = FREE | FRST | GRST | XRST | XINTM(3),
 406         .spcr1 = RINTM(3) | RRST,
 407         .rcr2  = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) |
 408                 RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(1),
 409         .rcr1  = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16),
 410         .xcr2  = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) |
 411                 XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(1) | XFIG,
 412         .xcr1  = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16),
 413         .srgr1 = FWID(15),
 414         .srgr2 = GSYNC | CLKSP | FSGM | FPER(31),
 415
 416         .pcr0  = CLKRM | SCLKME | FSXP | FSRP | CLKXP | CLKRP,
 417         /*.pcr0 = CLKXP | CLKRP,*/        /* mcbsp: slave */
 418 };
 419
 420 static struct omap_alsa_codec_config alsa_config = {
 421         .name                   = "H3 TSC2101",
 422         .mcbsp_regs_alsa        = &mcbsp_regs,
 423         .codec_configure_dev    = NULL, /* tsc2101_configure, */
 424         .codec_set_samplerate   = NULL, /* tsc2101_set_samplerate, */
 425         .codec_clock_setup      = NULL, /* tsc2101_clock_setup, */
 426         .codec_clock_on         = NULL, /* tsc2101_clock_on, */
 427         .codec_clock_off        = NULL, /* tsc2101_clock_off, */
 428         .get_default_samplerate = NULL, /* tsc2101_get_default_samplerate, */
 429 };
 430
 431 static struct platform_device h3_mcbsp1_device = {
 432         .name   = "omap_alsa_mcbsp",
 433         .id     = 1,
 434         .dev = {
 435                 .platform_data  = &alsa_config,
 436         },
 437 };
 438
 439 static struct platform_device *devices[] __initdata = {
 440         &nor_device,
 441         &nand_device,
 442         &smc91x_device,
 443         &intlat_device,
 444         &h3_irda_device,
 445         &h3_kp_device,
 446         &h3_lcd_device,
 447         &h3_mcbsp1_device,
 448 };
 449
 450 static struct omap_usb_config h3_usb_config __initdata = {
 451         /* usb1 has a Mini-AB port and external isp1301 transceiver */
 452         .otg        = 2,
 453
 454 #ifdef CONFIG_USB_GADGET_OMAP
 455         .hmc_mode       = 19,   /* 0:host(off) 1:dev|otg 2:disabled */
 456 #elif  defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 457         /* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
 458         .hmc_mode       = 20,   /* 1:dev|otg(off) 1:host 2:disabled */
 459 #endif
 460
 461         .pins[1]        = 3,
 462 };
 463
 464 static struct omap_uart_config h3_uart_config __initdata = {
 465         .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
 466 };
 467
 468 static struct omap_lcd_config h3_lcd_config __initdata = {
 469         .ctrl_name      = "internal",
 470 };
 471
 472 static struct omap_board_config_kernel h3_config[] __initdata = {
 473         { OMAP_TAG_USB,         &h3_usb_config },
 474         { OMAP_TAG_UART,        &h3_uart_config },
 475         { OMAP_TAG_LCD,         &h3_lcd_config },
 476 };
 477
 478 #define H3_NAND_RB_GPIO_PIN     10
 479
 480 static int nand_dev_ready(struct omap_nand_platform_data *data)
 481 {
 482         return omap_get_gpio_datain(H3_NAND_RB_GPIO_PIN);
 483 }
 484
 485 #if defined(CONFIG_VIDEO_OV9640) || defined(CONFIG_VIDEO_OV9640_MODULE)
 486 /*
 487  * Common OV9640 register initialization for all image sizes, pixel formats,
 488  * and frame rates
 489  */
 490 const static struct ov9640_reg ov9640_common[] = {
 491
 492         { 0x12, 0x80 }, { 0x11, 0x80 }, { 0x13, 0x88 }, /* COM7, CLKRC, COM8 */
 493         { 0x01, 0x58 }, { 0x02, 0x24 }, { 0x04, 0x00 }, /* BLUE, RED, COM1 */
 494         { 0x0E, 0x81 }, { 0x0F, 0x4F }, { 0x14, 0xcA }, /* COM5, COM6, COM9 */
 495         { 0x16, 0x02 }, { 0x1B, 0x01 }, { 0x24, 0x70 }, /* ?, PSHFT, AEW */
 496         { 0x25, 0x68 }, { 0x26, 0xD3 }, { 0x27, 0x90 }, /* AEB, VPT, BBIAS */
 497         { 0x2A, 0x00 }, { 0x2B, 0x00 }, { 0x32, 0x24 }, /* EXHCH, EXHCL, HREF */
 498         { 0x33, 0x02 }, { 0x37, 0x02 }, { 0x38, 0x13 }, /* CHLF, ADC, ACOM */
 499         { 0x39, 0xF0 }, { 0x3A, 0x00 }, { 0x3B, 0x01 }, /* OFON, TSLB, COM11 */
 500         { 0x3D, 0x90 }, { 0x3E, 0x02 }, { 0x3F, 0xF2 }, /* COM13, COM14, EDGE */
 501         { 0x41, 0x02 }, { 0x42, 0xC8 },         /* COM16, COM17 */
 502         { 0x43, 0xF0 }, { 0x44, 0x10 }, { 0x45, 0x6C }, /* ?, ?, ? */
 503         { 0x46, 0x6C }, { 0x47, 0x44 }, { 0x48, 0x44 }, /* ?, ?, ? */
 504         { 0x49, 0x03 }, { 0x59, 0x49 }, { 0x5A, 0x94 }, /* ?, ?, ? */
 505         { 0x5B, 0x46 }, { 0x5C, 0x84 }, { 0x5D, 0x5C }, /* ?, ?, ? */
 506         { 0x5E, 0x08 }, { 0x5F, 0x00 }, { 0x60, 0x14 }, /* ?, ?, ? */
 507         { 0x61, 0xCE },                                 /* ? */
 508         { 0x62, 0x70 }, { 0x63, 0x00 }, { 0x64, 0x04 }, /* LCC1, LCC2, LCC3 */
 509         { 0x65, 0x00 }, { 0x66, 0x00 },                 /* LCC4, LCC5 */
 510         { 0x69, 0x00 }, { 0x6A, 0x3E }, { 0x6B, 0x3F }, /* HV, MBD, DBLV */
 511         { 0x6C, 0x40 }, { 0x6D, 0x30 }, { 0x6E, 0x4B }, /* GSP1, GSP2, GSP3 */
 512         { 0x6F, 0x60 }, { 0x70, 0x70 }, { 0x71, 0x70 }, /* GSP4, GSP5, GSP6 */
 513         { 0x72, 0x70 }, { 0x73, 0x70 }, { 0x74, 0x60 }, /* GSP7, GSP8, GSP9 */
 514         { 0x75, 0x60 }, { 0x76, 0x50 }, { 0x77, 0x48 }, /* GSP10,GSP11,GSP12 */
 515         { 0x78, 0x3A }, { 0x79, 0x2E }, { 0x7A, 0x28 }, /* GSP13,GSP14,GSP15 */
 516         { 0x7B, 0x22 }, { 0x7C, 0x04 }, { 0x7D, 0x07 }, /* GSP16,GST1, GST2 */
 517         { 0x7E, 0x10 }, { 0x7F, 0x28 }, { 0x80, 0x36 }, /* GST3, GST4, GST5 */
 518         { 0x81, 0x44 }, { 0x82, 0x52 }, { 0x83, 0x60 }, /* GST6, GST7, GST8 */
 519         { 0x84, 0x6C }, { 0x85, 0x78 }, { 0x86, 0x8C }, /* GST9, GST10,GST11 */
 520         { 0x87, 0x9E }, { 0x88, 0xBB }, { 0x89, 0xD2 }, /* GST12,GST13,GST14 */
 521         { 0x8A, 0xE6 }, { 0x13, 0xaF }, { 0x15, 0x02 }, /* GST15, COM8 */
 522         { 0x22, 0x8a }, /* GROS */
 523         { OV9640_REG_TERM, OV9640_VAL_TERM }
 524 };
 525
 526 static int ov9640_sensor_power_set(int power)
 527 {
 528         unsigned char expa;
 529         int err;
 530
 531         /* read current state of GPIO EXPA outputs */
 532         err = read_gpio_expa(&expa, 0x27);
 533         if (err) {
 534                 printk(KERN_ERR "Error reading GPIO EXPA\n");
 535                 return err;
 536         }
 537         /* Clear GPIO EXPA P3 (CAMERA_MODULE_EN) to power-up/down sensor */
 538         if (power)
 539                 expa |= 0x08;
 540         else
 541                 expa &= ~0x08;
 542
 543         err = write_gpio_expa(expa, 0x27);
 544         if (err) {
 545                 printk(KERN_ERR "Error writing to GPIO EXPA\n");
 546                 return err;
 547         }
 548
 549         return err;
 550 }
 551
 552 static struct v4l2_ifparm ifparm = {
 553         .if_type = V4L2_IF_TYPE_BT656,
 554         .u = {
 555                 .bt656 = {
 556                          .frame_start_on_rising_vs = 1,
 557                          .nobt_vs_inv = 1,
 558                          .mode = V4L2_IF_TYPE_BT656_MODE_NOBT_8BIT,
 559                          .clock_min = OV9640_XCLK_MIN,
 560                          .clock_max = OV9640_XCLK_MAX,
 561                  },
 562         },
 563 };
 564
 565 static int ov9640_ifparm(struct v4l2_ifparm *p)
 566 {
 567         *p = ifparm;
 568
 569         return 0;
 570 }
 571
 572 static struct ov9640_platform_data h3_ov9640_platform_data = {
 573         .power_set      = ov9640_sensor_power_set,
 574         .default_regs   = ov9640_common,
 575         .ifparm         = ov9640_ifparm,
 576 };
 577 #endif
 578
 579 static struct i2c_board_info __initdata h3_i2c_board_info[] = {
 580        {
 581                 I2C_BOARD_INFO("tps65013", 0x48),
 582                /* .irq         = OMAP_GPIO_IRQ(??), */
 583        },
 584 #if defined(CONFIG_VIDEO_OV9640) || defined(CONFIG_VIDEO_OV9640_MODULE)
 585         {
 586                 I2C_BOARD_INFO("ov9640", 0x30),
 587                 .platform_data = &h3_ov9640_platform_data,
 588         },
 589 #endif
 590         {
 591                 I2C_BOARD_INFO("isp1301_omap", 0x2d),
 592                 .irq            = OMAP_GPIO_IRQ(14),
 593         },
 594 };
 595
 596 static void __init h3_init(void)
 597 {
 598         /* Here we assume the NOR boot config:  NOR on CS3 (possibly swapped
 599          * to address 0 by a dip switch), NAND on CS2B.  The NAND driver will
 600          * notice whether a NAND chip is enabled at probe time.
 601          *
 602          * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
 603          * (which on H2 may be 16bit) on CS3.  Try detecting that in code here,
 604          * to avoid probing every possible flash configuration...
 605          */
 606         nor_resource.end = nor_resource.start = omap_cs3_phys();
 607         nor_resource.end += SZ_32M - 1;
 608
 609         nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
 610         nand_resource.end += SZ_4K - 1;
 611         if (!(omap_request_gpio(H3_NAND_RB_GPIO_PIN)))
 612                 nand_data.dev_ready = nand_dev_ready;
 613
 614         /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
 615         /* GPIO10 pullup/down register, Enable pullup on GPIO10 */
 616         omap_cfg_reg(V2_1710_GPIO10);
 617
 618         /* TSC2101 */
 619         omap_cfg_reg(W19_1610_GPIO48);
 620         gpio_request(H3_TS_GPIO, "tsc_irq");
 621         gpio_direction_input(H3_TS_GPIO);
 622         omap_cfg_reg(N14_1610_UWIRE_CS0);
 623
 624         platform_add_devices(devices, ARRAY_SIZE(devices));
 625         spi_register_board_info(h3_spi_board_info,
 626                                 ARRAY_SIZE(h3_spi_board_info));
 627         omap_board_config = h3_config;
 628         omap_board_config_size = ARRAY_SIZE(h3_config);
 629         omap_serial_init();
 630         omap_register_i2c_bus(1, 100, h3_i2c_board_info,
 631                               ARRAY_SIZE(h3_i2c_board_info));
 632         h3_mmc_init();
 633 }
 634
 635 static void __init h3_init_smc91x(void)
 636 {
 637         omap_cfg_reg(W15_1710_GPIO40);
 638         if (omap_request_gpio(40) < 0) {
 639                 printk("Error requesting gpio 40 for smc91x irq\n");
 640                 return;
 641         }
 642 }
 643
 644 static void __init h3_init_irq(void)
 645 {
 646         omap1_init_common_hw();
 647         omap_init_irq();
 648         omap_gpio_init();
 649         h3_init_smc91x();
 650 }
 651
 652 static void __init h3_map_io(void)
 653 {
 654         omap1_map_common_io();
 655 }
 656
 657 MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
 658         /* Maintainer: Texas Instruments, Inc. */
 659         .phys_io        = 0xfff00000,
 660         .io_pg_offst    = ((0xfef00000) >> 18) & 0xfffc,
 661         .boot_params    = 0x10000100,
 662         .map_io         = h3_map_io,
 663         .init_irq       = h3_init_irq,
 664         .init_machine   = h3_init,
 665         .timer          = &omap_timer,
 666 MACHINE_END